updated the oran fhi patches for xran/oai

cmake_targets/tools/oran_fhi_integration_patches/oai-1-schdule-msg4-in-slot10-and-not-schuled-ul-dl-in-mixed_slot.patch

+From dae591111a2ae0a8393d39871a9a7117a9e38d60 Mon Sep 17 00:00:00 2001
+From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
+Date: Fri, 27 Jan 2023 16:07:48 +0530
+Subject: [PATCH] schdule msg4 in slot10 and not schuled ul/dl in mixed slot
+
+---
+ openair2/LAYER2/NR_MAC_gNB/config.c            |  4 ++--
+ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c  | 11 +++++++----
+ openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c |  2 +-
+ openair2/RRC/NR/nr_rrc_config.c                |  2 +-
+ 4 files changed, 11 insertions(+), 8 deletions(-)
+
+diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c
+index e1ec0f6baf..80d1df5886 100644
+--- a/openair2/LAYER2/NR_MAC_gNB/config.c
++++ b/openair2/LAYER2/NR_MAC_gNB/config.c
+@@ -512,8 +512,8 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
+     int nr_dl_slots = n;
+     int nr_ulstart_slot = 0;
+     if (tdd) {
+-      nr_dl_slots = tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0);
+-      nr_ulstart_slot = get_first_ul_slot(tdd->nrofDownlinkSlots, tdd->nrofDownlinkSymbols, tdd->nrofUplinkSymbols);
++      nr_dl_slots = tdd->nrofDownlinkSlots;
++      nr_ulstart_slot = tdd->nrofDownlinkSlots + 1;
+       nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
+     }
+     else
+diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+index 7b545cc45c..15a148dbbb 100644
+--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
++++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+@@ -485,7 +485,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
+ 
+   *msg2_frame = rach_frame + eff_slot / nr_slots_per_frame[mu];
+   *msg2_slot = eff_slot % nr_slots_per_frame[mu];
+-
++  *msg2_slot = 7;
+   // go to previous slot if the current scheduled slot is beyond the response window
+   // and if the slot is not among the PDCCH monitored ones (38.213 10.1)
+   while (*msg2_frame > frame_limit
+@@ -893,7 +893,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
+   const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
+   const int n_slots_frame = nr_slots_per_frame[mu];
+   uint8_t k2 = 0;
+-  if (frame_type == TDD) {
++  if ( 0 && frame_type == TDD) {
+     int msg3_slot = get_first_ul_slot(tdd->nrofDownlinkSlots, tdd->nrofDownlinkSymbols, tdd->nrofUplinkSymbols);
+     if (tdd->nrofUplinkSymbols != 0) {
+       if (tdd->nrofUplinkSymbols < 3)
+@@ -928,8 +928,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
+     AssertFatal(ra->Msg3_tda_id < 16, "Couldn't find an appropriate TD allocation for Msg3\n");
+   }
+   else {
+-    ra->Msg3_tda_id = 0;
+-    k2 = *pusch_TimeDomainAllocationList->list.array[0]->k2;
++    ra->Msg3_tda_id = pusch_TimeDomainAllocationList->list.count-1;
++    k2 = *pusch_TimeDomainAllocationList->list.array[pusch_TimeDomainAllocationList->list.count-1]->k2;
+     abs_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
+     ra->Msg3_slot = abs_slot % nr_slots_per_frame[mu];
+   }
+@@ -1400,6 +1400,9 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
+   NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
+   NR_UE_DL_BWP_t *dl_bwp = &ra->DL_BWP;
+ 
++  if (slotP != 10)
++       return;
++
+   // if it is a DL slot, if the RA is in MSG4 state
+   if (is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[slotP / 64], slotP) &&
+       ra->state == Msg4) {
+diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+index f2d4c7946d..8cef3253fe 100644
+--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
++++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+@@ -1099,7 +1099,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
+   const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
+   AssertFatal(tdd || mac->common_channels[CC_id].frame_type == FDD, "Dynamic TDD not handled yet\n");
+   const int nr_slots_period = tdd ? n_slots_frame / get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity) : n_slots_frame;
+-  const int first_ul_slot_period = tdd ? get_first_ul_slot(tdd->nrofDownlinkSlots, tdd->nrofDownlinkSymbols, tdd->nrofUplinkSymbols) : 0;
++  const int first_ul_slot_period = tdd ? (tdd->nrofDownlinkSlots +1) : 0;
+ 
+   NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
+   NR_PUCCH_Config_t *pucch_Config = ul_bwp->pucch_Config;
+diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c
+index 1a81d1fa67..a4986793fa 100644
+--- a/openair2/RRC/NR/nr_rrc_config.c
++++ b/openair2/RRC/NR/nr_rrc_config.c
+@@ -742,7 +742,7 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){
+       struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation_msg3 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation));
+       pusch_timedomainresourceallocation_msg3->k2  = CALLOC(1,sizeof(long));
+       int no_mix_slot = ul_symb < 3 ? 1 : 0; // we need at least 2 symbols for scheduling Msg3
+-      *pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu] + no_mix_slot;
++      *pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu] + no_mix_slot + 2;
+       if(*pusch_timedomainresourceallocation_msg3->k2 < min_fb_delay)
+         *pusch_timedomainresourceallocation_msg3->k2 += nb_slots_per_period;
+       AssertFatal(*pusch_timedomainresourceallocation_msg3->k2<33,"Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n",
+-- 
+2.25.1
+

cmake_targets/tools/oran_fhi_integration_patches/oai-2-disable-dedicated-bandwidth-config-for-Amarisoft-UE-simbox.patch

+From d1ad2907b3c3572de193ae770912436fb0a96443 Mon Sep 17 00:00:00 2001
+From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
+Date: Fri, 27 Jan 2023 16:18:08 +0530
+Subject: [PATCH 2/2] disable dedicated bandwidth config for Amarisoft UE
+ simbox
+
+---
+ openair2/RRC/NR/MESSAGES/asn1_msg.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c
+index e52e637dd8..f15735b36f 100644
+--- a/openair2/RRC/NR/MESSAGES/asn1_msg.c
++++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c
+@@ -1213,10 +1213,8 @@ void fill_initial_cellGroupConfig(int uid,
+   physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook                          = NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic;
+   cellGroupConfig->physicalCellGroupConfig                                  = physicalCellGroupConfig;
+   
+-  cellGroupConfig->spCellConfig                                             = calloc(1,sizeof(*cellGroupConfig->spCellConfig));
++  cellGroupConfig->spCellConfig                                             = NULL;
+ 
+-  fill_initial_SpCellConfig(uid,cellGroupConfig->spCellConfig,scc,servingcellconfigdedicated,configuration);
+-  
+   cellGroupConfig->sCellToAddModList                                        = NULL;
+   cellGroupConfig->sCellToReleaseList                                       = NULL;
+ }
+-- 
+2.25.1
+

cmake_targets/tools/oran_fhi_integration_patches/oai-schedule-PRACH-msg2-before-the-mixed-slot.patch

-From 75895e33a3f11e98caadeebf052896937f9c231d Mon Sep 17 00:00:00 2001
-From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
-Date: Wed, 17 Aug 2022 00:29:24 +0530
-Subject: [PATCH] changes to schedule PRACH msg2 before the mixed slot
-
-Signed-off-by: thamizhselvan.k <thamizhselvan.k@vvdntech.in>
----
- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c | 7 ++++---
- openair2/RRC/NR/nr_rrc_config.c               | 2 +-
- 2 files changed, 5 insertions(+), 4 deletions(-)
-
-diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
-index 745fc1ae2b..6516fe254f 100644
---- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
-+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
-@@ -419,6 +419,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
-   if (tdd) {
-     last_dl_slot_period = tdd->nrofDownlinkSymbols == 0? (tdd->nrofDownlinkSlots-1) : tdd->nrofDownlinkSlots;
-     tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
-+    last_dl_slot_period = last_dl_slot_period - 1;
-   }
-   else{
-     if(frame_type == TDD)
-@@ -892,7 +893,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
-   const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
-   const int n_slots_frame = nr_slots_per_frame[mu];
-   uint8_t k2 = 0;
--  if (frame_type == TDD) {
-+  if (0) {
-     int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
-     int nb_slots_per_period = ((1<<mu)*10)/nb_periods_per_frame;
-     for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
-@@ -920,8 +921,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
-     AssertFatal(ra->Msg3_tda_id < 16, "Couldn't find an appropriate TD allocation for Msg3\n");
-   }
-   else {
--    ra->Msg3_tda_id = 0;
--    k2 = *pusch_TimeDomainAllocationList->list.array[0]->k2;
-+    ra->Msg3_tda_id = 2;
-+    k2 = *pusch_TimeDomainAllocationList->list.array[2]->k2;
-     temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
-     ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
-   }
-diff --git a/openair2/RRC/NR/nr_rrc_config.c b/openair2/RRC/NR/nr_rrc_config.c
-index f67fb93c23..18468f607f 100644
---- a/openair2/RRC/NR/nr_rrc_config.c
-+++ b/openair2/RRC/NR/nr_rrc_config.c
-@@ -568,7 +568,7 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){
-         int nb_slots_per_period = ((1<<mu) * 10)/nb_periods_per_frame;
-         struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation_msg3 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation));
-         pusch_timedomainresourceallocation_msg3->k2  = CALLOC(1,sizeof(long));
--        *pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu];
-+        *pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu] + 2;
-         if(*pusch_timedomainresourceallocation_msg3->k2 < min_fb_delay)
-           *pusch_timedomainresourceallocation_msg3->k2 += nb_slots_per_period;
-         AssertFatal(*pusch_timedomainresourceallocation_msg3->k2<33,"Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n",
--- 
-2.25.1
-

cmake_targets/tools/oran_fhi_integration_patches/oran-fhi-1-compile-libxran-using-gcc-and-disable-avx.patch → cmake_targets/tools/oran_fhi_integration_patches/oran-fhi-1-compile-libxran-using-gcc-and-disable-avx512.patch

+From a7f20ad7c4ada7d50f21c5a8f15b1baab37481fa Mon Sep 17 00:00:00 2001
+From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
+Date: Fri, 27 Jan 2023 15:42:36 +0530
+Subject: [PATCH 1/4] compile libxran using-gcc and disable avx512
+
+---
+ fhi_lib/build.sh     |  7 ++++---
+ fhi_lib/lib/Makefile | 23 ++++++++++++-----------
+ 2 files changed, 16 insertions(+), 14 deletions(-)
+
 diff --git a/fhi_lib/build.sh b/fhi_lib/build.sh
-index 22859b5..e24e46f 100755
+index 22859b5..575bcc5 100755
 --- a/fhi_lib/build.sh
 +++ b/fhi_lib/build.sh
-@@ -72,9 +72,9 @@ echo "MLOG      = ${MLOG}"
+@@ -70,11 +70,12 @@ echo "LIBXRANSO = ${LIBXRANSO}"
+ echo "MLOG      = ${MLOG}"
+ 
  cd $XRAN_FH_LIB_DIR
++make clean
  make $COMMAND_LINE MLOG=${MLOG} LIBXRANSO=${LIBXRANSO} #DEBUG=1 VERBOSE=1
  
 -echo 'Building xRAN Test Application'
@@ -16,7 +29,7 @@ index 22859b5..e24e46f 100755
  if [ -z ${GTEST_ROOT+x} ];
  then
 diff --git a/fhi_lib/lib/Makefile b/fhi_lib/lib/Makefile
-index 579a0c6..c553fda 100644
+index 579a0c6..de5309d 100644
 --- a/fhi_lib/lib/Makefile
 +++ b/fhi_lib/lib/Makefile
 @@ -23,11 +23,11 @@ MYCUSTOMSPACE1='------------------------------------------------------------'
@@ -39,7 +52,7 @@ index 579a0c6..c553fda 100644
  	-Wall \
  	-Wimplicit-function-declaration \
 -	-g -O3 -wd1786
-+	-g -O3 -mssse3 \
++	-g -O0 -mssse3 \
 +  -march=native
  
 -CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \

cmake_targets/tools/oran_fhi_integration_patches/oran-fhi-2-return-correct-slot_id.patch

+From f26a9e9a3b902d56fffcb40644fa7d3e17d793f9 Mon Sep 17 00:00:00 2001
+From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
+Date: Fri, 27 Jan 2023 15:43:50 +0530
+Subject: [PATCH 2/4] return correct slot_id
+
+---
+ fhi_lib/lib/src/xran_main.c | 1 +
+ 1 file changed, 1 insertion(+)
+
 diff --git a/fhi_lib/lib/src/xran_main.c b/fhi_lib/lib/src/xran_main.c
 index 17acc2a..8f5705e 100644
 --- a/fhi_lib/lib/src/xran_main.c

cmake_targets/tools/oran_fhi_integration_patches/oran-fhi-3-disable-pkt-validate-at-process_mbuf.patch

+From 3055c4a6cdb3ffa91deb4c6c11ecad0c95fef759 Mon Sep 17 00:00:00 2001
+From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
+Date: Fri, 27 Jan 2023 15:46:02 +0530
+Subject: [PATCH 3/4] disable pkt validate at process_mbuf
+
+---
+ fhi_lib/lib/src/xran_common.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
 diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
 index c4cb3fb..5bbacf7 100644
 --- a/fhi_lib/lib/src/xran_common.c

cmake_targets/tools/oran_fhi_integration_patches/oran-fhi-4-process_all_rx_ring.patch

+From 5c99462d138042f99b3a02cec013f75bbc3732a9 Mon Sep 17 00:00:00 2001
+From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
+Date: Fri, 27 Jan 2023 15:48:25 +0530
+Subject: [PATCH 4/4] process all rx ring
+
+---
+ fhi_lib/lib/src/xran_common.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
+index 5bbacf7..eaefe45 100644
+--- a/fhi_lib/lib/src/xran_common.c
++++ b/fhi_lib/lib/src/xran_common.c
+@@ -737,8 +737,8 @@ int32_t ring_processing_func(void)
+     /* UP first */
+ 
+     for (i = 0; i < ctx->io_cfg.num_vfs && i < (XRAN_VF_MAX - 1); i = i+2){
+-        if (process_ring(ctx->rx_ring[i]))
+-            return 0;
++        process_ring(ctx->rx_ring[i]);
++        process_ring(ctx->rx_ring[i+1]);
+ 
+         /* CP next */
+         if(ctx->io_cfg.id == O_RU) /* process CP only on O-RU */
+-- 
+2.25.1
+

cmake_targets/tools/oran_fhi_integration_patches/oran-fhi-4-timer-handler-not-getting-called.patch

-diff --git a/fhi_lib/lib/src/xran_main.c b/fhi_lib/lib/src/xran_main.c
-index 8f5705e..3b187fc 100644
---- a/fhi_lib/lib/src/xran_main.c
-+++ b/fhi_lib/lib/src/xran_main.c
-@@ -780,7 +780,8 @@ void tti_ota_cb(struct rte_timer *tim, void *arg)
-     }
- 
-     p_xran_dev_ctx->phy_tti_cb_done = 0;
--    xran_timer_arm_ex(&tti_to_phy_timer[xran_lib_ota_tti % 10], tti_to_phy_cb, (void*)pTCtx, tim_lcore);
-+    //xran_timer_arm_ex(&tti_to_phy_timer[xran_lib_ota_tti % 10], tti_to_phy_cb, (void*)pTCtx, tim_lcore);
-+    tti_to_phy_cb(&tti_to_phy_timer[xran_lib_ota_tti % 10],(void*)pTCtx);
- 
-     //slot index is increased to next slot at the beginning of current OTA slot
-     xran_lib_ota_tti++;
-@@ -795,11 +796,14 @@ void xran_timer_arm(struct rte_timer *tim, void* arg)
- {
-     struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
-     uint64_t t3 = MLogTick();
-+    void (*func)(void*,void *);
-+    func = arg;
- 
-     if (xran_if_current_state == XRAN_RUNNING){
--        rte_timer_cb_t fct = (rte_timer_cb_t)arg;
--        rte_timer_init(tim);
--        rte_timer_reset_sync(tim, 0, SINGLE, p_xran_dev_ctx->fh_init.io_cfg.timing_core, fct, &timer_ctx[0]);
-+        //rte_timer_cb_t fct = (rte_timer_cb_t)arg;
-+        //rte_timer_init(tim);
-+        //rte_timer_reset_sync(tim, 0, SINGLE, p_xran_dev_ctx->fh_init.io_cfg.timing_core, fct, &timer_ctx[0]);
-+        func(NULL,&timer_ctx[0]);
-     }
-     MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick());
- }
-@@ -811,6 +815,8 @@ void xran_timer_arm_for_deadline(struct rte_timer *tim, void* arg)
-     static int timer_cnt = 0;
-     unsigned tim_lcore =  (p_xran_dev_ctx->fh_init.io_cfg.pkt_proc_core) ? p_xran_dev_ctx->pkt_proc_core_id :
-                                                                            p_xran_dev_ctx->fh_init.io_cfg.timing_core;
-+    void (*func)(void*,void *);
-+    func = arg;
- 
-     int32_t rx_tti;
-     int32_t cc_id;
-@@ -828,9 +834,10 @@ void xran_timer_arm_for_deadline(struct rte_timer *tim, void* arg)
-     cb_timer_ctx[timer_cnt].tti_to_process = rx_tti;
- 
-     if (xran_if_current_state == XRAN_RUNNING){
--        rte_timer_cb_t fct = (rte_timer_cb_t)arg;
--        rte_timer_init(tim);
--        rte_timer_reset_sync(tim, 0, SINGLE, tim_lcore, fct, &cb_timer_ctx[timer_cnt++]);
-+        //rte_timer_cb_t fct = (rte_timer_cb_t)arg;
-+        //rte_timer_init(tim);
-+        //rte_timer_reset_sync(tim, 0, SINGLE, tim_lcore, fct, &cb_timer_ctx[timer_cnt++]);
-+        func(NULL,&cb_timer_ctx[timer_cnt++]);
-         if (timer_cnt >= 10*MAX_NUM_OF_XRAN_CTX)
-             timer_cnt = 0;
-     }
--- 
-2.25.1
-

cmake_targets/tools/oran_fhi_integration_patches/oran-fhi-5-handle-prach-from-ru.patch

-diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
-index 5bbacf7..270ee17 100644
---- a/fhi_lib/lib/src/xran_common.c
-+++ b/fhi_lib/lib/src/xran_common.c
-@@ -256,8 +256,9 @@ int process_mbuf(struct rte_mbuf *pkt)
-             print_dbg("Transport layer fragmentation (eCPRI) is not supported\n");
-         }
- 
--    } else if (Ant_ID >= p_x_ctx->PrachCPConfig.eAxC_offset && p_x_ctx->fh_init.prachEnable) {
-+    } else if (Ant_ID+1 >= p_x_ctx->PrachCPConfig.eAxC_offset && p_x_ctx->fh_init.prachEnable) {
-         /* PRACH packet has ruportid = num_eAxc + ant_id */
-+        Ant_ID = Ant_ID + 1;
-         Ant_ID -= p_x_ctx->PrachCPConfig.eAxC_offset;
-         symbol_total_bytes += num_bytes;
-         if (seq.e_bit == 1) {
-diff --git a/fhi_lib/lib/src/xran_main.c b/fhi_lib/lib/src/xran_main.c
-index 3b187fc..ef423d7 100644
---- a/fhi_lib/lib/src/xran_main.c
-+++ b/fhi_lib/lib/src/xran_main.c
-@@ -412,7 +412,8 @@ int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xra
-         printf("PRACH start symbol %u lastsymbol %u\n", p_xran_dev_ctx->prach_start_symbol[0], p_xran_dev_ctx->prach_last_symbol[0]);
-     }
- 
--    pPrachCPConfig->eAxC_offset = xran_get_num_eAxc(NULL);
-+    //pPrachCPConfig->eAxC_offset = xran_get_num_eAxc(NULL);
-+    pPrachCPConfig->eAxC_offset = 5;
-     print_dbg("PRACH eAxC_offset %d\n",  pPrachCPConfig->eAxC_offset);
- 
-     return (XRAN_STATUS_SUCCESS);
-@@ -1036,7 +1037,7 @@ int xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir,
-         params.numSections          = 1;//nsection;
-         params.sections             = sect_geninfo;
- 
--        ret = xran_prepare_ctrl_pkt(mbuf, &params, cc_id, ru_port_id, seq_id);
-+        ret = xran_prepare_ctrl_pkt(mbuf, &params, cc_id, ru_port_id+1, seq_id);
-         if(ret < 0) {
-             print_err("Fail to build control plane packet - [%d:%d:%d] dir=%d\n",
-                         frame_id, subframe_id, slot_id, dir);
-@@ -1269,7 +1270,8 @@ void tx_cp_ul_cb(struct rte_timer *tim, void *arg)
-                         struct xran_cp_gen_params params;
-                         struct xran_section_gen_info sect_geninfo[8];
-                         struct rte_mbuf *mbuf = xran_ethdi_mbuf_alloc();
--                        prach_port_id = ant_id + num_eAxc;
-+                        //prach_port_id = ant_id + num_eAxc;
-+												prach_port_id = 5;
-                         /* start new section information list */
-                         xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, ctx_id);
- 
-diff --git a/fhi_lib/lib/src/xran_up_api.c b/fhi_lib/lib/src/xran_up_api.c
-index a69712f..3fcea46 100644
---- a/fhi_lib/lib/src/xran_up_api.c
-+++ b/fhi_lib/lib/src/xran_up_api.c
-@@ -131,7 +131,8 @@ static int xran_build_ecpri_hdr_ex(struct rte_mbuf *mbuf,
-     ecpri_hdr->cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(ecpri_payl_size);
- 
-     /* one to one lls-CU to RU only and band sector is the same */
--    ecpri_hdr->ecpri_xtc_id = xran_compose_cid(0, 0, CC_ID, Ant_ID);
-+    //ecpri_hdr->ecpri_xtc_id = xran_compose_cid(0, 0, CC_ID, Ant_ID);
-+    ecpri_hdr->ecpri_xtc_id = xran_compose_cid(0, 0, CC_ID, 1);
- 
-     ecpri_hdr->ecpri_seq_id.seq_id = seq_id;
- 
-@@ -362,7 +363,7 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
-     xran_decompose_cid((uint16_t)ecpri_hdr->ecpri_xtc_id, &result);
- 
-     *CC_ID  = result.ccId;
--    *Ant_ID = result.ruPortId;
-+    *Ant_ID = result.ruPortId - 1;
- 
-     /* Process radio header. */
-     struct radio_app_common_hdr *radio_hdr =
--- 
-2.25.1
-