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zzha zzha
OpenXG-RAN
Commits
439095bc
Commit
439095bc
authored
Sep 08, 2020
by
Robert Schmidt
Browse files
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Plain Diff
Remove UE-specific ulsch bitmap, special phy test slot
when in phy test, only schedule UE to be in slot 8
parent
4ffc4fda
Changes
4
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4 changed files
with
27 additions
and
27 deletions
+27
-27
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+2
-12
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+23
-13
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+2
-1
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+0
-1
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
439095bc
...
@@ -398,7 +398,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -398,7 +398,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
protocol_ctxt_t
ctxt
;
protocol_ctxt_t
ctxt
;
PROTOCOL_CTXT_SET_BY_MODULE_ID
(
&
ctxt
,
module_idP
,
ENB_FLAG_YES
,
NOT_A_RNTI
,
frame
,
slot
,
module_idP
);
PROTOCOL_CTXT_SET_BY_MODULE_ID
(
&
ctxt
,
module_idP
,
ENB_FLAG_YES
,
NOT_A_RNTI
,
frame
,
slot
,
module_idP
);
uint64_t
*
ulsch_in_slot_bitmap
=
NULL
;
const
int
UE_id
=
0
;
const
int
UE_id
=
0
;
const
int
bwp_id
=
1
;
const
int
bwp_id
=
1
;
...
@@ -434,17 +433,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -434,17 +433,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
nr_rlc_tick
(
frame
,
slot
>>
*
scc
->
ssbSubcarrierSpacing
);
nr_rlc_tick
(
frame
,
slot
>>
*
scc
->
ssbSubcarrierSpacing
);
}
}
ulsch_in_slot_bitmap
=
&
RC
.
nrmac
[
module_idP
]
->
UE_list
.
UE_sched_ctrl
[
UE_id
].
ulsch_in_slot_bitmap
;
// static bitmap signaling which slot in a tdd period contains ulsch
if
(
!
(
slot
%
num_slots_per_tdd
))
{
if
(
slot
==
0
)
{
*
ulsch_in_slot_bitmap
=
0x100
;
}
else
{
*
ulsch_in_slot_bitmap
=
0x00
;
}
}
const
uint64_t
dlsch_in_slot_bitmap
=
(
1
<<
1
);
const
uint64_t
dlsch_in_slot_bitmap
=
(
1
<<
1
);
const
uint64_t
ulsch_in_slot_bitmap
=
(
1
<<
8
);
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coreset0
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coreset0
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coresetid 1
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coresetid 1
...
@@ -505,7 +495,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -505,7 +495,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// inside
// inside
if
(
UE_list
->
fiveG_connected
[
UE_id
])
{
if
(
UE_list
->
fiveG_connected
[
UE_id
])
{
int
tda
=
1
;
// time domain assignment hardcoded for now
int
tda
=
1
;
// time domain assignment hardcoded for now
schedule_fapi_ul_pdu
(
module_idP
,
frame
,
slot
,
num_slots_per_tdd
,
nr_ulmix_slots
,
tda
);
schedule_fapi_ul_pdu
(
module_idP
,
frame
,
slot
,
num_slots_per_tdd
,
nr_ulmix_slots
,
tda
,
ulsch_in_slot_bitmap
);
nr_schedule_pusch
(
module_idP
,
UE_id
,
num_slots_per_tdd
,
nr_ulmix_slots
,
frame
,
slot
);
nr_schedule_pusch
(
module_idP
,
UE_id
,
num_slots_per_tdd
,
nr_ulmix_slots
,
frame
,
slot
);
}
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
439095bc
...
@@ -811,12 +811,26 @@ int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) {
...
@@ -811,12 +811,26 @@ int8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) {
return
-
1
;
return
-
1
;
}
}
long
get_K2
(
NR_BWP_Uplink_t
*
ubwp
,
int
time_domain_assignment
,
int
mu
)
{
DevAssert
(
ubwp
);
const
NR_PUSCH_TimeDomainResourceAllocation_t
*
tda_list
=
ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
->
list
.
array
[
time_domain_assignment
];
if
(
tda_list
->
k2
)
return
*
tda_list
->
k2
;
else
if
(
mu
<
2
)
return
1
;
else
if
(
mu
==
2
)
return
2
;
else
return
3
;
}
void
schedule_fapi_ul_pdu
(
int
Mod_idP
,
void
schedule_fapi_ul_pdu
(
int
Mod_idP
,
frame_t
frameP
,
frame_t
frameP
,
sub_frame_t
slotP
,
sub_frame_t
slotP
,
int
num_slots_per_tdd
,
int
num_slots_per_tdd
,
int
ul_slots
,
int
ul_slots
,
int
time_domain_assignment
)
{
int
time_domain_assignment
,
uint64_t
ulsch_in_slot_bitmap
)
{
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
Mod_idP
];
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
Mod_idP
];
NR_COMMON_channels_t
*
cc
=
nr_mac
->
common_channels
;
NR_COMMON_channels_t
*
cc
=
nr_mac
->
common_channels
;
...
@@ -840,18 +854,14 @@ void schedule_fapi_ul_pdu(int Mod_idP,
...
@@ -840,18 +854,14 @@ void schedule_fapi_ul_pdu(int Mod_idP,
AssertFatal
(
time_domain_assignment
<
ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
->
list
.
count
,
AssertFatal
(
time_domain_assignment
<
ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
->
list
.
count
,
"time_domain_assignment %d>=%d
\n
"
,
time_domain_assignment
,
ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
->
list
.
count
);
"time_domain_assignment %d>=%d
\n
"
,
time_domain_assignment
,
ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
->
list
.
count
);
int
K2
;
int
K2
=
get_K2
(
ubwp
,
time_domain_assignment
,
mu
);
if
(
ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
->
list
.
array
[
time_domain_assignment
]
->
k2
!=
NULL
)
/* check if slot is UL, and for phy test verify that it is in first TDD
K2
=
*
ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
->
list
.
array
[
time_domain_assignment
]
->
k2
;
* period, slot 8 (for K2=2, this is at slot 6 in the gNB; because of UE
else
{
* limitations). Note that if K2 or the TDD configuration is changed, below
if
(
mu
<
2
)
K2
=
1
;
* conditions might exclude each other and never be true */
else
if
(
mu
==
2
)
K2
=
2
;
const
int
slot_idx
=
(
slotP
+
K2
)
%
num_slots_per_tdd
;
else
K2
=
3
;
if
(
is_xlsch_in_slot
(
ulsch_in_slot_bitmap
,
slot_idx
)
}
&&
(
!
get_softmodem_params
()
->
phy_test
||
slotP
==
6
))
{
if
(
is_xlsch_in_slot
(
UE_list
->
UE_sched_ctrl
[
UE_id
].
ulsch_in_slot_bitmap
,(
slotP
+
K2
)
%
num_slots_per_tdd
))
{
//nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
nfapi_nr_ul_dci_request_t
*
UL_dci_req
=
&
RC
.
nrmac
[
Mod_idP
]
->
UL_dci_req
[
0
];
nfapi_nr_ul_dci_request_t
*
UL_dci_req
=
&
RC
.
nrmac
[
Mod_idP
]
->
UL_dci_req
[
0
];
UL_dci_req
->
SFN
=
frameP
;
UL_dci_req
->
SFN
=
frameP
;
UL_dci_req
->
Slot
=
slotP
;
UL_dci_req
->
Slot
=
slotP
;
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
439095bc
...
@@ -342,7 +342,8 @@ void schedule_fapi_ul_pdu(int Mod_idP,
...
@@ -342,7 +342,8 @@ void schedule_fapi_ul_pdu(int Mod_idP,
sub_frame_t
slotP
,
sub_frame_t
slotP
,
int
num_slots_per_tdd
,
int
num_slots_per_tdd
,
int
ul_slots
,
int
ul_slots
,
int
time_domain_assignment
);
int
time_domain_assignment
,
uint64_t
ulsch_in_slot_bitmap
);
void
nr_process_mac_pdu
(
void
nr_process_mac_pdu
(
module_id_t
module_idP
,
module_id_t
module_idP
,
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
439095bc
...
@@ -283,7 +283,6 @@ typedef struct NR_UE_ul_harq {
...
@@ -283,7 +283,6 @@ typedef struct NR_UE_ul_harq {
/*! \brief scheduling control information set through an API */
/*! \brief scheduling control information set through an API */
typedef
struct
{
typedef
struct
{
uint64_t
ulsch_in_slot_bitmap
;
// static bitmap signaling which slot in a tdd period contains ulsch
NR_sched_pucch
*
sched_pucch
;
NR_sched_pucch
*
sched_pucch
;
NR_sched_pusch
*
sched_pusch
;
NR_sched_pusch
*
sched_pusch
;
uint16_t
ta_timer
;
uint16_t
ta_timer
;
...
...
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