added handling of time resources for CSS scheduling.

cmake_targets/CMakeLists.txt

@@ -1011,6 +1011,7 @@ set(SCHED_NR_SRC
   ${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
   ${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_gNB.c
   ${OPENAIR1_DIR}/SCHED_NR/nr_prach_procedures.c
+  ${OPENAIR1_DIR}/SCHED_NR/phy_frame_config_nr.c
 )
 add_library(SCHED_NR_LIB ${SCHED_NR_SRC})
 
@@ -1035,7 +1036,7 @@ set(SCHED_SRC_NR_UE
   ${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c
   ${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
   ${OPENAIR1_DIR}/SCHED_NR_UE/fapi_nr_ue_l1.c 
-  ${OPENAIR1_DIR}/SCHED_NR_UE/phy_frame_config_nr.c
+  ${OPENAIR1_DIR}/SCHED_NR/phy_frame_config_nr.c
   ${OPENAIR1_DIR}/SCHED_NR_UE/harq_nr.c
   ${OPENAIR1_DIR}/SCHED_NR_UE/pucch_uci_ue_nr.c
   ${OPENAIR1_DIR}/SCHED_NR_UE/pucch_power_control_ue_nr.c 

nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h

@@ -154,10 +154,6 @@ typedef struct {
 typedef struct {
   nfapi_uint16_tlv_t  dl_carrier_bandwidth;
   nfapi_uint16_tlv_t  ul_carrier_bandwidth;
-  nfapi_uint16_tlv_t  dl_bwp_subcarrierspacing;
-  nfapi_uint16_tlv_t  ul_bwp_subcarrierspacing;
-  nfapi_uint16_tlv_t  dl_locationandbandwidth;
-  nfapi_uint16_tlv_t  ul_locationandbandwidth;
   nfapi_uint16_tlv_t  dl_absolutefrequencypointA;
   nfapi_uint16_tlv_t  ul_absolutefrequencypointA;
   nfapi_uint16_tlv_t  dl_offsettocarrier;
@@ -173,6 +169,8 @@ typedef struct {
 #define NFAPI_NR_RF_CONFIG_UL_CARRIER_BANDWIDTH_TAG 0x500B
 #define NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG 0x500C
 #define NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG 0x500D
+#define NFAPI_NR_RF_CONFIG_DL_OFFSETTOCARRIER_TAG   0x500E
+#define NFAPI_NR_RF_CONFIG_UL_OFFSETTOCARRIER_TAG   0x500F
 
 typedef struct {
   nfapi_uint16_tlv_t  physical_cell_id;
@@ -183,9 +181,25 @@ typedef struct {
   nfapi_uint16_tlv_t  ssb_periodicity;
   nfapi_uint16_tlv_t  ss_pbch_block_power;
   nfapi_uint16_tlv_t  n_ssb_crb;
-  nfapi_uint16_tlv_t  rmsi_pdcch_config;
 } nfapi_nr_sch_config_t;
 
+typedef struct {
+  nfapi_uint16_tlv_t  dl_bandwidth;
+  nfapi_uint16_tlv_t  ul_bandwidth;
+  nfapi_uint16_tlv_t  dl_offset;
+  nfapi_uint16_tlv_t  ul_offset;
+  nfapi_uint16_tlv_t  dl_subcarrierSpacing;
+  nfapi_uint16_tlv_t  ul_subcarrierSpacing;
+} nfapi_nr_initialBWP_config_t;
+
+#define NFAPI_INITIALBWP_DL_BANDWIDTH_TAG          0x5010
+#define NFAPI_INITIALBWP_DL_OFFSET_TAG             0x5011
+#define NFAPI_INITIALBWP_DL_SUBCARRIERSPACING_TAG  0x5012
+#define NFAPI_INITIALBWP_UL_BANDWIDTH_TAG          0x5013
+#define NFAPI_INITIALBWP_UL_OFFSET_TAG             0x5014
+#define NFAPI_INITIALBWP_UL_SUBCARRIERSPACING_TAG  0x5015
+
+
 #define NFAPI_NR_SCH_CONFIG_PHYSICAL_CELL_ID_TAG 0x501E
 #define NFAPI_NR_SCH_CONFIG_HALF_FRAME_INDEX_TAG 0x501F
 #define NFAPI_NR_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG 0x5020
@@ -193,25 +207,15 @@ typedef struct {
 #define NFAPI_NR_SCH_CONFIG_SSB_PERIODICITY 0x5022
 #define NFAPI_NR_SCH_CONFIG_SS_PBCH_BLOCK_POWER 0x5023
 #define NFAPI_NR_SCH_CONFIG_N_SSB_CRB 0x5024
+#define NFAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS 16
+#define NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS 16
 
 typedef struct {
-  nfapi_uint16_tlv_t  data_scrambling_id;
-  nfapi_uint16_tlv_t  dmrs_typeA_position;
-  nfapi_uint16_tlv_t  dmrs_additional_position;
-  nfapi_uint16_tlv_t  dmrs_type;
-  nfapi_uint16_tlv_t  dmrs_max_length;
-  nfapi_uint16_tlv_t  mapping_type;
-  nfapi_uint16_tlv_t  resource_allocation;
-  nfapi_uint16_tlv_t  time_allocation_list;
-  nfapi_uint16_tlv_t  mcs_table;
-  nfapi_uint16_tlv_t  aggregation_factor;
-  nfapi_uint16_tlv_t  prb_bundling_type;
-  nfapi_uint16_tlv_t  rbg_size;
-  nfapi_uint16_tlv_t  vrb_to_prb_interleaver;
-  nfapi_uint16_tlv_t  code_block_groug_transmission;
-  nfapi_uint16_tlv_t  x_overhead;
-  nfapi_uint16_tlv_t  max_dci_codewords;
-  
+  nfapi_uint16_tlv_t  dmrs_TypeA_Position;
+  nfapi_uint16_tlv_t  num_PDSCHTimeDomainResourceAllocations;
+  nfapi_uint16_tlv_t  PDSCHTimeDomainResourceAllocation_k0[NFAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS];         
+  nfapi_uint16_tlv_t  PDSCHTimeDomainResourceAllocation_mappingType[NFAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS]; 
+  nfapi_uint16_tlv_t  PDSCHTimeDomainResourceAllocation_startSymbolAndLength[NFAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS];
 } nfapi_nr_pdsch_config_t;
 #define NFAPI_NR_PDSCH_CONFIG_TAG
 
@@ -221,20 +225,29 @@ typedef struct {
   nfapi_uint16_tlv_t  prach_msg1_SubcarrierSpacing;                                   ///// L1 parameter 'prach-Msg1SubcarrierSpacing'
   nfapi_uint16_tlv_t  restrictedSetConfig;
   nfapi_uint16_tlv_t  msg3_transformPrecoding;                                        ///// L1 parameter 'msg3-tp'
+  nfapi_uint16_tlv_t  ssb_perRACH_OccasionAndCB_PreamblesPerSSB;
+  nfapi_uint16_tlv_t  ra_ContentionResolutionTimer;
+  nfapi_uint16_tlv_t  rsrp_ThresholdSSB;
   /////////////////--------------------NR RACH-ConfigGeneric--------------------/////////////////
   nfapi_uint16_tlv_t  prach_ConfigurationIndex;                                       ///// L1 parameter 'PRACHConfigurationIndex'
   nfapi_uint16_tlv_t  prach_msg1_FDM;                                                 ///// L1 parameter 'prach-FDM'
   nfapi_uint16_tlv_t  prach_msg1_FrequencyStart;                                      ///// L1 parameter 'prach-frequency-start'
   nfapi_uint16_tlv_t  zeroCorrelationZoneConfig;
   nfapi_uint16_tlv_t  preambleReceivedTargetPower;
+  nfapi_uint16_tlv_t  preambleTransMax;
+  nfapi_uint16_tlv_t  powerRampingStep;
+  nfapi_uint16_tlv_t  ra_ResponseWindow;
 } nfapi_nr_rach_config_t;
 
 typedef struct {
   nfapi_uint16_tlv_t  groupHoppingEnabledTransformPrecoding;                          ///// L1 parameter 'Group-hopping-enabled-Transform-precoding'
   nfapi_uint16_tlv_t  msg3_DeltaPreamble;                                             ///// L1 parameter 'Delta-preamble-msg3' 
   nfapi_uint16_tlv_t  p0_NominalWithGrant;                                            ///// L1 parameter 'p0-nominal-pusch-withgrant'
-  nfapi_uint16_tlv_t  TimeDomainResourceAllocation_k2;                                ///// L1 parameter 'K2' 
-  nfapi_uint16_tlv_t  TimeDomainResourceAllocation_mappingType;                       ///// L1 parameter 'Mapping-type'
+  nfapi_uint16_tlv_t  dmrs_TypeA_Position;
+  nfapi_uint16_tlv_t  num_PUSCHTimeDomainResourceAllocations;
+  nfapi_uint16_tlv_t  PUSCHTimeDomainResourceAllocation_k2[NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS];                                ///// L1 parameter 'K2' 
+  nfapi_uint16_tlv_t  PUSCHTimeDomainResourceAllocation_mappingType[NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS];                       ///// L1 parameter 'Mapping-type'
+  nfapi_uint16_tlv_t  PUSCHTimeDomainResourceAllocation_startSymbolAndLength[NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS];
 } nfapi_nr_pusch_config_t;
 
 typedef struct {
@@ -243,21 +256,32 @@ typedef struct {
 } nfapi_nr_pucch_config_t;
 
 
+
 typedef struct {
   nfapi_tl_t tl;
-  nfapi_nr_SearchSpace_t           sib1searchSpace;
-  nfapi_nr_SearchSpace_t           sibssearchSpace; 
-  nfapi_nr_SearchSpace_t           ra_SearchSpace;
+
+  nfapi_uint16_tlv_t  controlResourceSetZero;
+  nfapi_uint16_tlv_t  searchSpaceZero;
+  
+  //  nfapi_nr_SearchSpace_t           sib1searchSpace;
+  //  nfapi_nr_SearchSpace_t           sibssearchSpace; 
+  //  nfapi_nr_SearchSpace_t           ra_SearchSpace;
 }nfapi_nr_pdcch_config_t;
 
 typedef struct {
 //NR TDD-UL-DL-ConfigCommon                ///// L1 parameter 'UL-DL-configuration-common'
-  nfapi_uint16_tlv_t  subcarrierspacing;                                     ///// L1 parameter 'reference-SCS'
+  nfapi_uint16_tlv_t  referenceSubcarrierSpacing;                                     ///// L1 parameter 'reference-SCS'
   nfapi_uint16_tlv_t  dl_ul_periodicity;                                  ///// L1 parameter 'DL-UL-transmission-periodicity'
   nfapi_uint16_tlv_t  nrofDownlinkSlots;                                              ///// L1 parameter 'number-of-DL-slots'
   nfapi_uint16_tlv_t  nrofDownlinkSymbols;                                            ///// L1 parameter 'number-of-DL-symbols-common'
   nfapi_uint16_tlv_t  nrofUplinkSlots;                                                ///// L1 parameter 'number-of-UL-slots'
   nfapi_uint16_tlv_t  nrofUplinkSymbols;                                              ///// L1 parameter 'number-of-UL-symbols-common'
+  nfapi_uint16_tlv_t  Pattern2Present;
+  nfapi_uint16_tlv_t  Pattern2_dl_ul_periodicity;                                  ///// L1 parameter 'DL-UL-transmission-periodicity'
+  nfapi_uint16_tlv_t  Pattern2_nrofDownlinkSlots;                                              ///// L1 parameter 'number-of-DL-slots'
+  nfapi_uint16_tlv_t  Pattern2_nrofDownlinkSymbols;                                            ///// L1 parameter 'number-of-DL-symbols-common'
+  nfapi_uint16_tlv_t  Pattern2_nrofUplinkSlots;                                                ///// L1 parameter 'number-of-UL-slots'
+  nfapi_uint16_tlv_t  Pattern2_nrofUplinkSymbols;                                              ///// L1 parameter 'number-of-UL-symbols-common'
 } nfapi_nr_tdd_ul_dl_config_t;
 
 typedef struct {
@@ -287,6 +311,7 @@ typedef struct {
   nfapi_nr_subframe_config_t                subframe_config;
   nfapi_nr_rf_config_t                      rf_config;
   nfapi_nr_sch_config_t                     sch_config;
+  nfapi_nr_initialBWP_config_t              initialBWP_config;
   nfapi_nr_pdsch_config_t                   pdsch_config;
   nfapi_nr_rach_config_t                    rach_config;
   nfapi_nr_pusch_config_t                   pusch_config;
@@ -593,9 +618,13 @@ typedef struct {
   uint8_t modulation;
   uint8_t modulation_order;
   uint16_t transport_block_size;
-  uint8_t nb_re_dmrs;
+  uint8_t dmrs_Type;
+  uint8_t dmrs_TypeA_Position;
+  uint8_t dmrs_maxLength; 
+  uint8_t dmrs_AdditionalPosition;
   uint8_t time_alloc_list_flag;
   uint8_t time_alloc_list;
+  uint8_t mapping_type;
   uint8_t rbg_list;
   uint8_t virtual_resource_block_assignment_flag;
   uint32_t resource_block_coding;
@@ -605,6 +634,7 @@ typedef struct {
   uint8_t number_of_subbands;
   uint8_t codebook_index[NFAPI_MAX_NUM_SUBBANDS];
   uint8_t ue_category_capacity;
+  uint8_t x_overhead;
   uint8_t pa;
   uint8_t delta_power_offset_index;
   uint8_t ngap;

openair1/PHY/NR_TRANSPORT/nr_dci.c

@@ -34,8 +34,8 @@
 #include "nr_dlsch.h"
 
 //#define DEBUG_PDCCH_DMRS
-//#define DEBUG_DCI
-//#define DEBUG_CHANNEL_CODING
+#define DEBUG_DCI
+#define DEBUG_CHANNEL_CODING
 
 
 extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];

openair1/PHY/NR_TRANSPORT/nr_dci_tools.c

@@ -32,7 +32,7 @@
 
 #include "nr_dci.h"
 
-//#define DEBUG_FILL_DCI
+#define DEBUG_FILL_DCI
 
 #include "nr_dlsch.h"
 
@@ -184,32 +184,32 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
       pos=fsize;
       *dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos)); 
 #ifdef DEBUG_FILL_DCI
-      printf("frequency-domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"frequency-domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,*dci_pdu);
 #endif
       // Time domain assignment
       pos+=4;		   
       *dci_pdu |= (((uint64_t)pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
 #ifdef DEBUG_FILL_DCI
-      printf("time-domain assignment %d  (3 bits)=> %d (0x%lx)\n",pdu_rel15->time_domain_assignment,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"time-domain assignment %d  (3 bits)=> %d (0x%lx)\n",pdu_rel15->time_domain_assignment,dci_alloc->size-pos,*dci_pdu);
 #endif
       // VRB to PRB mapping
 
       pos++;
       *dci_pdu |= ((uint64_t)pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      printf("vrb to prb mapping %d  (1 bits)=> %d (0x%lx)\n",pdu_rel15->vrb_to_prb_mapping,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"vrb to prb mapping %d  (1 bits)=> %d (0x%lx)\n",pdu_rel15->vrb_to_prb_mapping,dci_alloc->size-pos,*dci_pdu);
 #endif
       // MCS
       pos+=5;
       *dci_pdu |= ((uint64_t)pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      printf("mcs %d  (5 bits)=> %d (0x%lx)\n",pdu_rel15->mcs,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"mcs %d  (5 bits)=> %d (0x%lx)\n",pdu_rel15->mcs,dci_alloc->size-pos,*dci_pdu);
 #endif
       // TB scaling
       pos+=2;
       *dci_pdu |= ((uint64_t)pdu_rel15->tb_scaling&0x3)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      printf("tb_scaling %d  (2 bits)=> %d (0x%lx)\n",pdu_rel15->tb_scaling,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"tb_scaling %d  (2 bits)=> %d (0x%lx)\n",pdu_rel15->tb_scaling,dci_alloc->size-pos,*dci_pdu);
 #endif
       break;
 
@@ -219,7 +219,7 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
       pos++;
       *dci_pdu |= ((uint64_t)pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      printf("Format indicator %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->format_indicator,1,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"Format indicator %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->format_indicator,1,dci_alloc->size-pos,*dci_pdu);
 #endif
 
       // Freq domain assignment (275rb >> fsize = 16)
@@ -228,7 +228,7 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
       *dci_pdu |= (((uint64_t)pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
 
 #ifdef DEBUG_FILL_DCI
-      printf("Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,*dci_pdu);
 #endif
 
   uint16_t is_ra = 1;
@@ -264,70 +264,70 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
 	pos+=4;		   
 	*dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
 #ifdef DEBUG_FILL_DCI
-      printf("Time domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->time_domain_assignment,4,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->time_domain_assignment,4,dci_alloc->size-pos,*dci_pdu);
 #endif
 
 	// VRB to PRB mapping  1bit
 	pos++;
 	*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      printf("VRB to PRB %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->vrb_to_prb_mapping,1,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->vrb_to_prb_mapping,1,dci_alloc->size-pos,*dci_pdu);
 #endif
 
 	// MCS 5bit  //bit over 32, so dci_pdu ++
 	pos+=5;
 	*dci_pdu |= (pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      printf("MCS %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->mcs,5,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"MCS %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->mcs,5,dci_alloc->size-pos,*dci_pdu);
 #endif
 
 	// New data indicator 1bit
 	pos++;
 	*dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      printf("NDI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->ndi,1,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"NDI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->ndi,1,dci_alloc->size-pos,*dci_pdu);
 #endif      
 
 	// Redundancy version  2bit
 	pos+=2;
 	*dci_pdu |= (pdu_rel15->rv&0x3)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      printf("RV %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->rv,2,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"RV %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->rv,2,dci_alloc->size-pos,*dci_pdu);
 #endif
 
 	// HARQ process number  4bit
 	pos+=4;
 	*dci_pdu  |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos));
 #ifdef DEBUG_FILL_DCI
-      printf("HARQ_PID %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->harq_pid,4,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->harq_pid,4,dci_alloc->size-pos,*dci_pdu);
 #endif
 
 	// Downlink assignment index  2bit
 	pos+=2;
 	*dci_pdu |= ((pdu_rel15->dai&3)<<(dci_alloc->size-pos));
 #ifdef DEBUG_FILL_DCI
-      printf("DAI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->dai,2,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"DAI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->dai,2,dci_alloc->size-pos,*dci_pdu);
 #endif
 
 	// TPC command for scheduled PUCCH  2bit
 	pos+=2;
 	*dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos));
 #ifdef DEBUG_FILL_DCI
-      printf("TPC %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->tpc,2,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"TPC %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->tpc,2,dci_alloc->size-pos,*dci_pdu);
 #endif
 
 	// PUCCH resource indicator  3bit
 	pos+=3;
 	*dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos));
 #ifdef DEBUG_FILL_DCI
-      printf("PUCCH RI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->pucch_resource_indicator,3,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->pucch_resource_indicator,3,dci_alloc->size-pos,*dci_pdu);
 #endif
 
 	// PDSCH-to-HARQ_feedback timing indicator 3bit
 	pos+=3;
 	*dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos));
 #ifdef DEBUG_FILL_DCI
-      printf("PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->pdsch_to_harq_feedback_timing_indicator,3,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->pdsch_to_harq_feedback_timing_indicator,3,dci_alloc->size-pos,*dci_pdu);
 #endif
 
       } //end else

openair1/PHY/NR_TRANSPORT/nr_dlsch.c

@@ -291,9 +291,10 @@ for (int l=0; l<rel15->nb_layers; l++)
     //to be moved to init phase potentially, for now tx_layers 1-8 are mapped on antenna ports 1000-1007
 
   /// DMRS QPSK modulation
-  uint16_t n_dmrs = (rel15->n_prb*rel15->nb_re_dmrs)<<1;
+ int nb_re_dmrs = rel15->dmrs_Type==1?6:4;
+ uint16_t n_dmrs = (rel15->n_prb*nb_re_dmrs)<<1;
  int16_t mod_dmrs[n_dmrs<<1];
-  uint8_t dmrs_type = config.pdsch_config.dmrs_type.value;
+ uint8_t dmrs_type = rel15->dmrs_Type;
  l0 = get_l0(dmrs_type, 2);//config.pdsch_config.dmrs_typeA_position.value);
  nr_modulation(pdsch_dmrs[l0][0], n_dmrs, MOD_QPSK, mod_dmrs); // currently only codeword 0 is modulated
 #ifdef DEBUG_DLSCH

openair1/PHY/NR_TRANSPORT/nr_dlsch.h

@@ -38,7 +38,7 @@ void nr_get_time_domain_allocation_type(nfapi_nr_config_request_t config,
                                         nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
                                         nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu);
 
-void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config);
+void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15,nfapi_nr_config_request_t *cfg);
 
 uint16_t get_RIV(uint16_t rb_start, uint16_t L, uint16_t N_RB);
 
@@ -56,10 +56,6 @@ uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
 
 uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx);
 
-void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
-                nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
-                nfapi_nr_config_request_t config);
-
 void nr_pdsch_codeword_scrambling(uint8_t *in,
                          uint16_t size,
                          uint8_t q,

openair1/PHY/NR_TRANSPORT/nr_dlsch_tools.c

@@ -105,25 +105,25 @@ static inline uint8_t get_K0(uint8_t row_idx, uint8_t time_alloc_type) {
 }
 
 /*ideally combine the calculation of L in the same function once the right struct is defined*/
-uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_typeA_position) {
+uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t dmrs_TypeA_Position) {
 
   uint8_t idx;
   //uint8_t S;
 
   switch(time_alloc_type) {
     case NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A:
-      idx = (row_idx>7)? (row_idx+6) : (((row_idx-1)<<1)-1+((dmrs_typeA_position==2)?0:1));
+      idx = (row_idx>7)? (row_idx+6) : (((row_idx-1)<<1)-1+((dmrs_TypeA_Position==2)?0:1));
       return ((CP==NFAPI_CP_NORMAL)?nr_pdsch_default_time_alloc_A_S_nCP[idx] : nr_pdsch_default_time_alloc_A_S_eCP[idx]);
       break;
 
     case NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_B:
-      idx = (row_idx<14)? (row_idx-1) : (row_idx == 14)? row_idx-1+((dmrs_typeA_position==2)?0:1) : 15;
+      idx = (row_idx<14)? (row_idx-1) : (row_idx == 14)? row_idx-1+((dmrs_TypeA_Position==2)?0:1) : 15;
       return (nr_pdsch_default_time_alloc_B_S[idx]);
       break;
 
     case NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_C:
       AssertFatal((row_idx!=6)&&(row_idx!=7)&&(row_idx<17), "Invalid row index %d in %s %s\n", row_idx, __FUNCTION__, __FILE__);
-      idx = (row_idx<6)? (row_idx-1) : (row_idx<14)? (row_idx-3) : (row_idx == 14)? row_idx-3+((dmrs_typeA_position==2)?0:1) : (row_idx-2);
+      idx = (row_idx<6)? (row_idx-1) : (row_idx<14)? (row_idx-3) : (row_idx == 14)? row_idx-3+((dmrs_TypeA_Position==2)?0:1) : (row_idx-2);
       break;
 
   default:
@@ -132,16 +132,16 @@ uint8_t nr_get_S(uint8_t row_idx, uint8_t CP, uint8_t time_alloc_type, uint8_t d
   return 0; // temp warning fix
 }
 
-void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config) {
+void nr_check_time_alloc(uint8_t S, uint8_t L,nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15,nfapi_nr_config_request_t *cfg) {
 
-  switch (config.subframe_config.dl_cyclic_prefix_type.value) {
+  switch (cfg->subframe_config.dl_cyclic_prefix_type.value) {
     case NFAPI_CP_NORMAL:
-      if (config.pdsch_config.mapping_type.value == NFAPI_NR_PDSCH_MAPPING_TYPE_A) {
+      if (rel15->mapping_type == NFAPI_NR_PDSCH_MAPPING_TYPE_A) {
         AssertFatal(S<4, "Invalid value of S(%d) for mapping type A and normal CP\n", S);
 
         if (S==3)
-          AssertFatal(config.pdsch_config.mapping_type.value == 3, "Invalid S %d for dmrs_typeA_position %d\n",
-          S, config.pdsch_config.dmrs_typeA_position.value);
+          AssertFatal(rel15->dmrs_TypeA_Position == 3, "Invalid S %d for dmrs_TypeA_Position %d\n",
+          S, rel15->dmrs_TypeA_Position);
 
         AssertFatal((L>2)&&(L<15), "Invalid L %d for mapping type A and normal CP\n", L);
 
@@ -157,12 +157,12 @@ void nr_check_time_alloc(uint8_t S, uint8_t L, nfapi_nr_config_request_t config)
       break;
 
     case NFAPI_CP_EXTENDED:
-      if (config.pdsch_config.mapping_type.value == NFAPI_NR_PDSCH_MAPPING_TYPE_A) {
+      if (rel15->mapping_type == NFAPI_NR_PDSCH_MAPPING_TYPE_A) {
         AssertFatal(S<4, "Invalid value of S(%d) for mapping type A and extended CP\n", S);
 
         if (S==3)
-          AssertFatal(config.pdsch_config.dmrs_typeA_position.value == 3, "Invalid S %d for dmrs_typeA_position %d\n",
-          S, config.pdsch_config.dmrs_typeA_position.value);
+          AssertFatal(rel15->dmrs_TypeA_Position == 3, "Invalid S %d for dmrs_TypeA_Position %d\n",
+          S, rel15->dmrs_TypeA_Position);
 
         AssertFatal((L>2)&&(L<13), "Invalid L %d for mapping type A and extended CP\n", L);
 

openair1/PHY/NR_TRANSPORT/nr_tbs_tools.c

@@ -32,56 +32,6 @@
 
 #include "nr_dlsch.h"
 
-/// Target code rate tables indexed by Imcs
-uint16_t nr_target_code_rate_table1[29] = {120, 157, 193, 251, 308, 379, 449, 526, 602, 679, 340, 378, 434, 490, 553, \
-                                            616, 658, 438, 466, 517, 567, 616, 666, 719, 772, 822, 873, 910, 948};
-  // Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point
-uint16_t nr_target_code_rate_table2[28] = {120, 193, 308, 449, 602, 378, 434, 490, 553, 616, 658, 466, 517, 567, \
-                                            616, 666, 719, 772, 822, 873, 1365, 711, 754, 797, 841, 885, 1833, 948};
-uint16_t nr_target_code_rate_table3[29] = {30, 40, 50, 64, 78, 99, 120, 157, 193, 251, 308, 379, 449, 526, 602, 340, \
-                                            378, 434, 490, 553, 616, 438, 466, 517, 567, 616, 666, 719, 772};
-uint16_t nr_tbs_table[93] = {24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128, 136, 144, 152, 160, 168, 176, 184, 192, 208, 224, 240, 256, 272, 288, 304, 320, \
-                              336, 352, 368, 384, 408, 432, 456, 480, 504, 528, 552, 576, 608, 640, 672, 704, 736, 768, 808, 848, 888, 928, 984, 1032, 1064, 1128, 1160, 1192, 1224, 1256, \
-                              1288, 1320, 1352, 1416, 1480, 1544, 1608, 1672, 1736, 1800, 1864, 1928, 2024, 2088, 2152, 2216, 2280, 2408, 2472, 2536, 2600, 2664, 2728, 2792, 2856, 2976, \
-                              3104, 3240, 3368, 3496, 3624, 3752, 3824};
-
-uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx) {
-  switch(table_idx) {
-    case 1:
-      return (((Imcs<10)||(Imcs==29))?2:((Imcs<17)||(Imcs==30))?4:((Imcs<29)||(Imcs==31))?6:-1);
-    break;
-
-    case 2:
-      return (((Imcs<5)||(Imcs==28))?2:((Imcs<11)||(Imcs==29))?4:((Imcs<20)||(Imcs==30))?6:((Imcs<28)||(Imcs==31))?8:-1);
-    break;
-
-    case 3:
-      return (((Imcs<15)||(Imcs==29))?2:((Imcs<21)||(Imcs==30))?4:((Imcs<29)||(Imcs==31))?6:-1);
-    break;
-
-    default:
-      AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
-  }
-}
-
-uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
-  switch(table_idx) {
-    case 1:
-      return (nr_target_code_rate_table1[Imcs]);
-    break;
-
-    case 2:
-      return (nr_target_code_rate_table2[Imcs]);
-    break;
-
-    case 3:
-      return (nr_target_code_rate_table3[Imcs]);
-    break;
-
-    default:
-      AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
-  }
-}
 
 static inline uint8_t is_codeword_disabled(uint8_t format, uint8_t Imcs, uint8_t rv) {
   return ((format==NFAPI_NR_DL_DCI_FORMAT_1_1)&&(Imcs==26)&&(rv==1));
@@ -103,74 +53,6 @@ static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8
     return 1;
 }
 
-void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
-                nfapi_nr_dl_config_dci_dl_pdu dci_pdu,
-                nfapi_nr_config_request_t config) {
-
-  LOG_D(MAC, "TBS calculation\n");
-
-  nfapi_nr_dl_config_pdcch_parameters_rel15_t params_rel15 = dci_pdu.pdcch_params_rel15;
-  nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_rel15 = &dlsch_pdu->dlsch_pdu_rel15;
-  uint8_t rnti_type = params_rel15.rnti_type;
-  uint8_t N_PRB_oh = ((rnti_type==NFAPI_NR_RNTI_SI)||(rnti_type==NFAPI_NR_RNTI_RA)||(rnti_type==NFAPI_NR_RNTI_P))? 0 : \
-  (config.pdsch_config.x_overhead.value);
-  uint8_t N_PRB_DMRS = (config.pdsch_config.dmrs_type.value == NFAPI_NR_DMRS_TYPE1)?6:4; //This only works for antenna port 1000
-  uint8_t N_sh_symb = dlsch_rel15->nb_symbols;
-  uint8_t Imcs = dlsch_rel15->mcs_idx;
-  uint16_t N_RE_prime = NR_NB_SC_PER_RB*N_sh_symb - N_PRB_DMRS - N_PRB_oh;
-  LOG_D(MAC, "N_RE_prime %d for %d symbols %d DMRS per PRB and %d overhead\n", N_RE_prime, N_sh_symb, N_PRB_DMRS, N_PRB_oh);
-
-  uint16_t N_RE, Ninfo, Ninfo_prime, C, TBS=0, R;
-  uint8_t table_idx, Qm, n, scale;
-
-  /*uint8_t mcs_table = config.pdsch_config.mcs_table.value;
-  uint8_t ss_type = params_rel15.search_space_type;
-  uint8_t dci_format = params_rel15.dci_format;
-  get_table_idx(mcs_table, dci_format, rnti_type, ss_type);*/
-  table_idx = 1;
-  scale = ((table_idx==2)&&((Imcs==20)||(Imcs==26)))?11:10;
-  
-  N_RE = min(156, N_RE_prime)*dlsch_rel15->n_prb;
-  R = nr_get_code_rate(Imcs, table_idx);
-  Qm = nr_get_Qm(Imcs, table_idx);
-  Ninfo = (N_RE*R*Qm*dlsch_rel15->nb_layers)>>scale;
-
-  if (Ninfo <= 3824) {
-    n = max(3, (log2(Ninfo)-6));
-    Ninfo_prime = max(24, (Ninfo>>n)<<n);
-    for (int i=0; i<93; i++)
-      if (nr_tbs_table[i] >= Ninfo_prime) {
-        TBS = nr_tbs_table[i];
-        break;
-      }
-  }
-  else {
-    n = log2(Ninfo-24)-5;
-    Ninfo_prime = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
-
-    if (R<256) {
-      C = CEILIDIV((Ninfo_prime+24),3816);
-      TBS = (C<<3)*CEILIDIV((Ninfo_prime+24),(C<<3)) - 24;
-    }
-    else {
-      if (Ninfo_prime>8424) {
-        C = CEILIDIV((Ninfo_prime+24),8424);
-        TBS = (C<<3)*CEILIDIV((Ninfo_prime+24),(C<<3)) - 24;
-      }
-      else
-        TBS = ((CEILIDIV((Ninfo_prime+24),8))<<3) - 24;
-    }    
-  }
-
-  dlsch_rel15->coding_rate = R;
-  dlsch_rel15->modulation_order = Qm;
-  dlsch_rel15->transport_block_size = TBS;
-  dlsch_rel15->nb_re_dmrs = N_PRB_DMRS;
-  dlsch_rel15->nb_mod_symbols = N_RE_prime*dlsch_rel15->n_prb*dlsch_rel15->nb_codewords;
-
-  LOG_D(MAC, "TBS %d : N_RE %d  N_PRB_DMRS %d N_sh_symb %d N_PRB_oh %d Ninfo %d Ninfo_prime %d R %d Qm %d table %d scale %d nb_symbols %d\n",
-  TBS, N_RE, N_PRB_DMRS, N_sh_symb, N_PRB_oh, Ninfo, Ninfo_prime, R, Qm, table_idx, scale, dlsch_rel15->nb_mod_symbols);
-}
 
 uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs, uint8_t Qm, uint8_t Nl) {
 	uint32_t G;

openair1/PHY/NR_UE_TRANSPORT/dci_nr.c

@@ -43,16 +43,13 @@
 #include "assertions.h"
 #include "T.h"
 
-//#define DEBUG_DCI_ENCODING 1
-//#define DEBUG_DCI_DECODING 1
-//#define DEBUG_PHY
+#define DEBUG_DCI_DECODING 1
 
 //#define NR_LTE_PDCCH_DCI_SWITCH
 #define NR_PDCCH_DCI_RUN              // activates new nr functions
-//#define NR_PDCCH_DCI_DEBUG            // activates NR_PDCCH_DCI_DEBUG logs
+#define NR_PDCCH_DCI_DEBUG            // activates NR_PDCCH_DCI_DEBUG logs
 #define NR_NBR_CORESET_ACT_BWP 3      // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
 #define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
-#define PDCCH_TEST_POLAR_TEMP_FIX
 
 
 #ifdef LOG_I
@@ -919,7 +916,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
     */
 #endif
 #ifdef DEBUG_DCI_DECODING
-    printf("demapping: nr_tti_rx %d, mi %d, tdd_config %d\n",nr_tti_rx,get_mi(frame_parms,nr_tti_rx),frame_parms->tdd_config);
+    printf("demapping: nr_tti_rx %d, mi %d\n",nr_tti_rx,get_mi(frame_parms,nr_tti_rx));
 #endif
   }
 

openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c

@@ -237,10 +237,18 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
   uint32_t Tbslbrm = 950984;
   uint16_t nb_rb = 30;
   double Coderate = 0.0;
-  nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
-  uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
-  uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
-  uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
+
+  nfapi_nr_dl_config_dlsch_pdu_rel15_t *dl_config_pdu = &harq_process->dl_config_pdu;
+  uint8_t dmrs_Type = dl_config_pdu->dmrs_Type;
+  AssertFatal(dmrs_Type == 1 || dmrs_Type == 2,"Illegal dmrs_type %d\n",dmrs_Type);
+  uint8_t nb_re_dmrs = (dmrs_Type==1)?6:4;
+  uint8_t dmrs_TypeA_Position = dl_config_pdu->dmrs_TypeA_Position;
+  AssertFatal(dmrs_TypeA_Position == 2 || dmrs_TypeA_Position == 3,"Illegal dmrs_TypeA_Position %d\n",dmrs_TypeA_Position);
+  uint16_t dmrs_maxLength = dl_config_pdu->dmrs_maxLength;
+  AssertFatal(dmrs_maxLength == 1 || dmrs_maxLength == 2,"Illegal dmrs_maxLength %d\n",dmrs_maxLength);
+  uint16_t dmrs_AdditionalPosition = dl_config_pdu->dmrs_AdditionalPosition;
+  AssertFatal(dmrs_AdditionalPosition >= 0 && dmrs_AdditionalPosition <= 4,"Illegal dmrs_additional_symbols %d\n",dmrs_AdditionalPosition);
+
 
   uint32_t i,j;
 
@@ -293,12 +301,12 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
 
   harq_process->trials[harq_process->round]++;
 
-  harq_process->TBS = nr_compute_tbs(harq_process->mcs,nb_rb,nb_symb_sch,nb_re_dmrs,length_dmrs, harq_process->Nl);
+  harq_process->TBS = nr_compute_tbs(harq_process->mcs,nb_rb,nb_symb_sch,nb_re_dmrs,dmrs_maxLength, harq_process->Nl);
 
   A = harq_process->TBS;
   ret = dlsch->max_ldpc_iterations;
 
-  harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, harq_process->Qm,harq_process->Nl);
+  harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, dmrs_maxLength, harq_process->Qm,harq_process->Nl);
   G = harq_process->G;
 
   LOG_I(PHY,"DLSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_symb_sch %d nb_rb %d\n",harq_pid,A,G, harq_process->mcs, harq_process->Nl, nb_symb_sch,nb_rb);

openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h

@@ -256,6 +256,8 @@ typedef struct {
   uint8_t DCINdi;
   /// DLSCH status flag indicating
   SCH_status_t status;
+  /// Dynamic Configuration from FAPI
+  nfapi_nr_dl_config_dlsch_pdu_rel15_t dl_config_pdu;
   /// Transport block size
   uint32_t TBS;
   /// The payload + CRC size in bits

openair1/SCHED_NR/nr_ru_procedures.c

@@ -123,7 +123,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
 
   start_meas(&ru->ofdm_mod_stats);
 
-  if (nr_slot_select(cfg,slot) == SF_UL) return;
+  if (nr_slot_select(fp,frame_tx,slot) == SF_UL) return;
 
   // this copy should be done in the precoding thread (currently inactive)
   for (int aa=0;aa<ru->nb_tx;aa++)
@@ -133,7 +133,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
 
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
 
-  if (nr_slot_select(cfg,slot)==SF_DL) {
+  if (nr_slot_select(fp,frame_tx,slot)==SF_DL) {
     // If this is not an S-tti
     if (pthread_mutex_timedlock(&proc->mutex_feptx,&wait) != 0) {
       printf("[RU] ERROR pthread_mutex_lock for feptx thread (IC %d)\n", proc->instance_cnt_feptx);
@@ -232,8 +232,8 @@ void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
     memcpy((void*)ru->common.txdataF_BF[aa],
 	   (void*)ru->gNB_list[0]->common_vars.txdataF[aa], fp->samples_per_slot_wCP*sizeof(int32_t));
 
-  if ((nr_slot_select(cfg,slot)==SF_DL)||
-      ((nr_slot_select(cfg,slot)==SF_S))) {
+  if ((nr_slot_select(fp,frame_tx,slot)==SF_DL)||
+      ((nr_slot_select(fp,frame_tx,slot)==SF_S))) {
     //    LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
 
     nr_feptx0(ru,slot,0,fp->symbols_per_slot);

openair1/SCHED_NR_UE/phy_frame_config_nr.c → openair1/SCHED_NR/phy_frame_config_nr.c

@@ -250,7 +250,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
 *
 *********************************************************************/
 
-int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
+int nr_slot_select(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
 {
   /* for FFD all slot can be considered as an uplink */
   if (frame_parms->frame_type == FDD) {

openair1/SCHED_NR/phy_frame_config_nr.h

@@ -78,7 +78,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
  *  @param nr_tti   : slot number
     @returns nr_slot_t : downlink or uplink */
 
-nr_slot_t slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
+nr_slot_t nr_slot_select(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
 
 /** \brief This function frees tdd configuration for nr
  *  @param frame_parms NR DL Frame parameters

openair1/SCHED_NR/phy_procedures_nr_common.c

@@ -32,10 +32,3 @@
 
 #include "sched_nr.h"
 
-nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg,unsigned char slot)
-{
-  if (cfg->subframe_config.duplex_mode.value == FDD)
-    return(SF_DL);
-  LOG_E(PHY,"Not developped TDD mode\n");
-  return -1;
-}

openair1/SCHED_NR/phy_procedures_nr_gNB.c

@@ -155,7 +155,8 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
   else 
     ssb_frame_periodicity = (cfg->sch_config.ssb_periodicity.value)/10 ;  // 10ms is the frame length
 
-  if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_slot_select(cfg,slot)==SF_UL)) return;
+  if ((cfg->subframe_config.duplex_mode.value == TDD) && 
+      ((nr_slot_select(fp,frame,slot)&NR_UPLINK_SLOT) > 0)) return;
 
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1);
 
@@ -208,7 +209,8 @@ void phy_procedures_gNB_RX(PHY_VARS_gNB *gNB,
   NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
   nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
 
-  if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_slot_select(cfg,slot)==SF_DL)) return;
+  if ((cfg->subframe_config.duplex_mode.value == TDD) && 
+      ((nr_slot_select(fp,frame,slot)&NR_DOWNLINK_SLOT)==SF_DL)) return;
 
   //  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX,1);
 

openair1/SCHED_NR/sched_nr.h

@@ -32,9 +32,9 @@
 #include "PHY_INTERFACE/phy_interface.h"
 #include "SCHED/sched_eNB.h"
 #include "PHY/NR_TRANSPORT/nr_dci.h"
+#include "phy_frame_config_nr.h"
 
 
-nr_slot_t nr_slot_select (nfapi_nr_config_request_t *cfg, unsigned char slot);
 void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
 void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, int frame_tx,int slot_tx, int do_meas);
 void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot);

openair1/SCHED_NR_UE/phy_procedures_nr_ue.c

@@ -3791,18 +3791,27 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
   NR_UE_PDSCH *pdsch_vars;
   uint8_t is_cw0_active = 0;
   uint8_t is_cw1_active = 0;
-  nfapi_nr_config_request_t *cfg = &ue->nrUE_config;
-  uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
-  uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
-  uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
-  uint16_t nb_symb_sch = 9;
+
 
   if (dlsch0==NULL)
     AssertFatal(0,"dlsch0 should be defined at this level \n");
 
   harq_pid = dlsch0->current_harq_pid;
   is_cw0_active = dlsch0->harq_processes[harq_pid]->status;
-  nb_symb_sch = dlsch0->harq_processes[harq_pid]->nb_symbols;
+  uint16_t nb_symb_sch = dlsch0->harq_processes[harq_pid]->nb_symbols;
+
+  nfapi_nr_dl_config_dlsch_pdu_rel15_t *dl_config_pdu = &dlsch0->harq_processes[harq_pid]->dl_config_pdu;
+  uint8_t dmrs_Type = dl_config_pdu->dmrs_Type;
+  AssertFatal(dmrs_Type == 1 || dmrs_Type == 2,"Illegal dmrs_type %d\n",dmrs_Type);
+  uint8_t nb_re_dmrs = (dmrs_Type==1)?6:4;
+  uint8_t dmrs_TypeA_Position = dl_config_pdu->dmrs_TypeA_Position;
+  AssertFatal(dmrs_TypeA_Position == 2 || dmrs_TypeA_Position == 3,"Illegal dmrs_TypeA_Position %d\n",dmrs_TypeA_Position);
+  uint16_t dmrs_maxLength = dl_config_pdu->dmrs_maxLength;
+  AssertFatal(dmrs_maxLength == 1 || dmrs_maxLength == 2,"Illegal dmrs_maxLength %d\n",dmrs_maxLength);
+  uint16_t dmrs_AdditionalPosition = dl_config_pdu->dmrs_AdditionalPosition;
+  AssertFatal(dmrs_AdditionalPosition >= 0 && dmrs_AdditionalPosition <= 4,"Illegal dmrs_additional_symbols %d\n",dmrs_AdditionalPosition);
+  //  uint16_t nb_symb_sch = dl_config_pdu->nb_symbols;
+  //  AssertFatal(nb_symb_sch >= 1 && nb_symb_sch <= 14,"Illegal nb_symb_sch %d\n",nb_symb_sch);
 
   if(dlsch1)
     is_cw1_active = dlsch1->harq_processes[harq_pid]->status;
@@ -3863,7 +3872,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
       dlsch0->harq_processes[harq_pid]->G = nr_get_G(dlsch0->harq_processes[harq_pid]->nb_rb,
 						     nb_symb_sch,
 						     nb_re_dmrs,
-						     length_dmrs,
+						     dmrs_maxLength,
 						     dlsch0->harq_processes[harq_pid]->Qm,
 						     dlsch0->harq_processes[harq_pid]->Nl);
 #if UE_TIMING_TRACE
@@ -3947,7 +3956,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
           dlsch1->harq_processes[harq_pid]->G = nr_get_G(dlsch1->harq_processes[harq_pid]->nb_rb,
 							 nb_symb_sch,
 							 nb_re_dmrs,
-							 length_dmrs,
+							 dmrs_maxLength,
 							 dlsch1->harq_processes[harq_pid]->Qm,
 							 dlsch1->harq_processes[harq_pid]->Nl);
 #if UE_TIMING_TRACE

openair2/GNB_APP/gnb_config.c

@@ -352,9 +352,9 @@ void RCconfig_NR_L1(void) {
 
 
   if (RC.gNB == NULL) {
-    RC.gNB                       = (PHY_VARS_gNB ***)malloc((1+NUMBER_OF_gNB_MAX)*sizeof(PHY_VARS_gNB**));
+    RC.gNB                       = (PHY_VARS_gNB **)malloc((1+NUMBER_OF_gNB_MAX)*sizeof(PHY_VARS_gNB*));
     LOG_I(NR_PHY,"RC.gNB = %p\n",RC.gNB);
-    memset(RC.gNB,0,(1+NUMBER_OF_gNB_MAX)*sizeof(PHY_VARS_gNB**));
+    memset(RC.gNB,0,(1+NUMBER_OF_gNB_MAX)*sizeof(PHY_VARS_gNB*));
   }
 
   config_getlist( &L1_ParamList,L1_Params,sizeof(L1_Params)/sizeof(paramdef_t), NULL);
@@ -505,7 +505,6 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
    ////////// Physical parameters
 
 
-  printf("SCCsParams[15].i64ptr %p (%p)\n",SCCsParams[15].i64ptr,scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0);
 
   /* get global parameters, defined outside any section in the config file */
  

openair2/LAYER2/NR_MAC_gNB/config.c

@@ -50,30 +50,6 @@ extern void mac_top_init_gNB(void);
 extern uint8_t nfapi_mode;
  
 
-void config_nr_mib(int Mod_idP, 
-		   int subcarrierSpacingCommon, 
-		   uint32_t ssb_SubcarrierOffset,
-		   int dmrs_TypeA_Position,
-		   uint32_t pdcch_ConfigSIB1
-                ){
-  nfapi_nr_config_request_t *cfg = &RC.nrmac[Mod_idP]->config[0];
-
-  cfg->num_tlv=0;
-  
-  cfg->rf_config.dl_subcarrierspacing.value  = subcarrierSpacingCommon;
-
-  cfg->rf_config.dl_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG;
-  cfg->num_tlv++;
-  
-  cfg->rf_config.ul_subcarrierspacing.value  = subcarrierSpacingCommon;
-  cfg->rf_config.ul_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG;
-  cfg->num_tlv++;
-
-  cfg->sch_config.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
-  cfg->sch_config.ssb_subcarrier_offset.tl.tag = NFAPI_NR_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG;
-  cfg->num_tlv++; 
-}
-
 void config_common(int Mod_idP, 
 		   NR_ServingCellConfigCommon_t *scc
                   ){
@@ -110,9 +86,50 @@ void config_common(int Mod_idP,
   cfg->num_tlv++;
   LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->rf_config.dl_carrier_bandwidth.value);
 
-  cfg->rf_config.ul_carrier_bandwidth.value    = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
-  cfg->rf_config.ul_carrier_bandwidth.tl.tag   = NFAPI_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG;  //temporary
+  cfg->rf_config.ul_carrier_bandwidth.value    = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
+  cfg->rf_config.ul_carrier_bandwidth.tl.tag   = NFAPI_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG; 
+  cfg->num_tlv++;
+
+  cfg->rf_config.dl_subcarrierspacing.value    = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
+  cfg->rf_config.dl_subcarrierspacing.tl.tag   = NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG;
+  cfg->num_tlv++;
+
+  cfg->rf_config.ul_subcarrierspacing.value    = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
+  cfg->rf_config.ul_subcarrierspacing.tl.tag   = NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG;
+  cfg->num_tlv++;
+
+  cfg->rf_config.dl_offsettocarrier.value    = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
+  cfg->rf_config.dl_offsettocarrier.tl.tag   = NFAPI_NR_RF_CONFIG_DL_OFFSETTOCARRIER_TAG;
+  cfg->num_tlv++;
+
+  cfg->rf_config.ul_offsettocarrier.value    = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
+  cfg->rf_config.ul_offsettocarrier.tl.tag   = NFAPI_NR_RF_CONFIG_UL_OFFSETTOCARRIER_TAG;
+  cfg->num_tlv++;
+ 
+  // InitialBWP configuration
+
+  cfg->initialBWP_config.dl_bandwidth.value    = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
+  cfg->initialBWP_config.dl_bandwidth.tl.tag   = NFAPI_INITIALBWP_DL_BANDWIDTH_TAG; //temporary
+  cfg->num_tlv++;
+  cfg->initialBWP_config.dl_offset.value    = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
+  cfg->initialBWP_config.dl_offset.tl.tag   = NFAPI_INITIALBWP_DL_OFFSET_TAG; //temporary
+  cfg->num_tlv++;
+  cfg->initialBWP_config.dl_subcarrierSpacing.value    = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
+  cfg->initialBWP_config.dl_subcarrierSpacing.tl.tag   = NFAPI_INITIALBWP_DL_SUBCARRIERSPACING_TAG; //temporary
+  cfg->num_tlv++;
+  LOG_I(PHY,"%s() initialBWP_dl_Bandwidth.RBstart.SCS :%d.%d.%d\n", __FUNCTION__, cfg->initialBWP_config.dl_bandwidth.value,cfg->initialBWP_config.dl_offset.value,cfg->initialBWP_config.dl_subcarrierSpacing.value);
+
+  cfg->initialBWP_config.ul_bandwidth.value    = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
+  cfg->initialBWP_config.ul_bandwidth.tl.tag   = NFAPI_INITIALBWP_UL_BANDWIDTH_TAG; 
+  cfg->num_tlv++;
+  cfg->initialBWP_config.ul_offset.value    = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
+  cfg->initialBWP_config.ul_offset.tl.tag   = NFAPI_INITIALBWP_UL_OFFSET_TAG; //temporary
+  cfg->num_tlv++;
+  cfg->initialBWP_config.ul_subcarrierSpacing.value    = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
+  cfg->initialBWP_config.ul_subcarrierSpacing.tl.tag   = NFAPI_INITIALBWP_DL_SUBCARRIERSPACING_TAG; //temporary
   cfg->num_tlv++;
+  LOG_I(PHY,"%s() initialBWP_ul_Bandwidth.RBstart.SCS :%d.%d.%d\n", __FUNCTION__, cfg->initialBWP_config.ul_bandwidth.value,cfg->initialBWP_config.ul_offset.value,cfg->initialBWP_config.ul_subcarrierSpacing.value);
+
 
   cfg->rach_config.prach_RootSequenceIndex.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
   if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
@@ -130,6 +147,28 @@ void config_common(int Mod_idP,
   cfg->rach_config.zeroCorrelationZoneConfig.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
   cfg->rach_config.preambleReceivedTargetPower.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower;
 
+  // PDCCH-ConfigCommon
+  cfg->pdcch_config.controlResourceSetZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero;
+  cfg->pdcch_config.searchSpaceZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero;
+
+  // PDSCH-ConfigCommon
+  cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
+  cfg->pdsch_config.dmrs_TypeA_Position.value = scc->dmrs_TypeA_Position;
+  AssertFatal(cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations.value<=NFAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS,"illegal TimeDomainAllocation count %d\n",cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations.value);
+  for (int i=0;i<cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations.value;i++) {
+    cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_k0[i].value=*scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
+    cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_mappingType[i].value=scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType;
+    cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_startSymbolAndLength[i].value=scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
+  }
+
+  // PUSCH-ConfigCommon
+  cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count;
+  cfg->pusch_config.dmrs_TypeA_Position.value = scc->dmrs_TypeA_Position+2;
+  AssertFatal(cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value<=NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS,"illegal TimeDomainAllocation count %d\n",cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value);
+  for (int i=0;i<cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value;i++) {
+    cfg->pusch_config.PUSCHTimeDomainResourceAllocation_k2[i].value=*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2;
+  }
+
   //cfg->sch_config.half_frame_index.value = 0; Fix in PHY
   //cfg->sch_config.n_ssb_crb.value = 86;       Fix in PHY
 
@@ -145,14 +184,6 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
                            ){
 
   AssertFatal(scc!=NULL,"scc is null\n");
-  config_nr_mib(Mod_idP, 
-		*scc->subcarrierSpacing,
-		ssb_SubcarrierOffset,
-		scc->dmrs_TypeA_Position,
-		*scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero * 16 + *scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero
-		);
-
-
   AssertFatal(scc->ssb_PositionsInBurst->present == NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap, "SSB Bitmap is not 8-bits!\n");
 
   config_common(Mod_idP, 

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -55,13 +55,14 @@ void nr_schedule_css_dlsch_phytest(module_id_t   module_idP,
   uint16_t rnti = 0x1234;
 
   uint16_t sfn_sf = frameP << 7 | slotP;
-  int dl_carrier_bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
+  int dlBWP_carrier_bandwidth = cfg->initialBWP_config.dl_bandwidth.value;
 
   // everything here is hard-coded to 30 kHz
   int scs               = get_dlscs(cfg);
   int slots_per_frame   = get_spf(cfg);
+
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
-    LOG_D(MAC, "Scheduling common search space DCI type 1 for CC_id %d\n",CC_id);
+    LOG_D(MAC, "Scheduling common search space DCI type 1 dlBWP BW.firstRB %d.%d\n",cfg->initialBWP_config.dl_bandwidth.value,cfg->initialBWP_config.dl_offset.value);
 
 
     dl_req = &nr_mac->DL_req[CC_id].dl_config_request_body;
@@ -80,9 +81,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t   module_idP,
     nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15;
 
     dlsch_pdu_rel15->start_prb = 0;
-    dlsch_pdu_rel15->n_prb = 50;
-    dlsch_pdu_rel15->start_symbol = 2;
-    dlsch_pdu_rel15->nb_symbols = 8;
+    dlsch_pdu_rel15->n_prb = 6;
+
     dlsch_pdu_rel15->rnti = rnti;
     dlsch_pdu_rel15->nb_layers =1;
     dlsch_pdu_rel15->nb_codewords = 1;
@@ -90,17 +90,27 @@ void nr_schedule_css_dlsch_phytest(module_id_t   module_idP,
     dlsch_pdu_rel15->ndi = 1;
     dlsch_pdu_rel15->redundancy_version = 0;
 
+    dlsch_pdu_rel15->dmrs_TypeA_Position = cfg->pdsch_config.dmrs_TypeA_Position.value;
 
     nr_configure_css_dci_initial(params_rel15,
-				 scs, scs, nr_FR1, 0, 0, 0,
+				 scs, 
+				 scs, 
+				 nr_FR1, 
+				 0, 
+				 0, 
+				 0,
 				 sfn_sf, slotP,
 				 slots_per_frame,
-				 dl_carrier_bandwidth);
+				 dlBWP_carrier_bandwidth);
 
     params_rel15->first_slot = 0;
 
     pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value);
-    pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV
+    pdu_rel15->time_domain_assignment = 0;
+
+        
+    dlsch_pdu_rel15->start_symbol = extract_startSymbol(cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_startSymbolAndLength[pdu_rel15->time_domain_assignment].value);
+    dlsch_pdu_rel15->nb_symbols   = extract_length(cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_startSymbolAndLength[pdu_rel15->time_domain_assignment].value);
     pdu_rel15->vrb_to_prb_mapping = 1;
     pdu_rel15->mcs = 9;
     pdu_rel15->tb_scaling = 1;
@@ -128,10 +138,9 @@ void nr_schedule_css_dlsch_phytest(module_id_t   module_idP,
     params_rel15->rnti_type = NFAPI_NR_RNTI_C;
     params_rel15->dci_format = NFAPI_NR_DL_DCI_FORMAT_1_0;
     //params_rel15->aggregation_level = 1;
-    LOG_D(MAC, "DCI type 1 params: rmsi_pdcch_config %d, rnti %d, rnti_type %d, dci_format %d\n \
+    LOG_D(MAC, "DCI type 1 params: rnti %x, rnti_type %d, dci_format %d\n \
                 coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d  \n \
                 ss params : nb_ss_sets_per_slot %d, first symb %d, nb_slots %d, sfn_mod2 %d, first slot %d\n",
-                0,
                 params_rel15->rnti,
                 params_rel15->rnti_type,
                 params_rel15->dci_format,
@@ -144,7 +153,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t   module_idP,
                 params_rel15->nb_slots,
                 params_rel15->sfn_mod2,
                 params_rel15->first_slot);
-  nr_get_tbs(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu, *cfg);
+  nr_get_tbs(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu);
   LOG_D(MAC, "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d\n",
   dlsch_pdu_rel15->start_prb,
   dlsch_pdu_rel15->n_prb,
@@ -278,7 +287,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t   module_idP,
                 params_rel15->rb_offset,
                 params_rel15->first_symbol,
                 params_rel15->search_space_type);
-  nr_get_tbs(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu, *cfg);
+  nr_get_tbs(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu);
   LOG_D(MAC, "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d\n",
   dlsch_pdu_rel15->start_prb,
   dlsch_pdu_rel15->n_prb,

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -357,6 +357,7 @@ void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel1
   //frequencyDomainResources
   uint8_t count=0, start=0, start_set=0;
   uint64_t bitmap = coreset->frequency_domain_resources;
+
   for (int i=0; i<45; i++)
     if ((bitmap>>(44-i))&1) {
       count++;
@@ -462,3 +463,175 @@ int get_symbolsperslot(nfapi_nr_config_request_t *cfg) {
 
 }
 
+/// Target code rate tables indexed by Imcs
+uint16_t nr_target_code_rate_table1[29] = {120, 157, 193, 251, 308, 379, 449, 526, 602, 679, 340, 378, 434, 490, 553, \
+                                            616, 658, 438, 466, 517, 567, 616, 666, 719, 772, 822, 873, 910, 948};
+  // Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point
+uint16_t nr_target_code_rate_table2[28] = {120, 193, 308, 449, 602, 378, 434, 490, 553, 616, 658, 466, 517, 567, \
+                                            616, 666, 719, 772, 822, 873, 1365, 711, 754, 797, 841, 885, 1833, 948};
+uint16_t nr_target_code_rate_table3[29] = {30, 40, 50, 64, 78, 99, 120, 157, 193, 251, 308, 379, 449, 526, 602, 340, \
+                                            378, 434, 490, 553, 616, 438, 466, 517, 567, 616, 666, 719, 772};
+uint16_t nr_tbs_table[93] = {24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128, 136, 144, 152, 160, 168, 176, 184, 192, 208, 224, 240, 256, 272, 288, 304, 320, \
+                              336, 352, 368, 384, 408, 432, 456, 480, 504, 528, 552, 576, 608, 640, 672, 704, 736, 768, 808, 848, 888, 928, 984, 1032, 1064, 1128, 1160, 1192, 1224, 1256, \
+                              1288, 1320, 1352, 1416, 1480, 1544, 1608, 1672, 1736, 1800, 1864, 1928, 2024, 2088, 2152, 2216, 2280, 2408, 2472, 2536, 2600, 2664, 2728, 2792, 2856, 2976, \
+                              3104, 3240, 3368, 3496, 3624, 3752, 3824};
+
+uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx) {
+  switch(table_idx) {
+    case 1:
+      return (((Imcs<10)||(Imcs==29))?2:((Imcs<17)||(Imcs==30))?4:((Imcs<29)||(Imcs==31))?6:-1);
+    break;
+
+    case 2:
+      return (((Imcs<5)||(Imcs==28))?2:((Imcs<11)||(Imcs==29))?4:((Imcs<20)||(Imcs==30))?6:((Imcs<28)||(Imcs==31))?8:-1);
+    break;
+
+    case 3:
+      return (((Imcs<15)||(Imcs==29))?2:((Imcs<21)||(Imcs==30))?4:((Imcs<29)||(Imcs==31))?6:-1);
+    break;
+
+    default:
+      AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
+  }
+}
+
+uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
+  switch(table_idx) {
+    case 1:
+      return (nr_target_code_rate_table1[Imcs]);
+    break;
+
+    case 2:
+      return (nr_target_code_rate_table2[Imcs]);
+    break;
+
+    case 3:
+      return (nr_target_code_rate_table3[Imcs]);
+    break;
+
+    default:
+      AssertFatal(0, "Invalid MCS table index %d (expected in range [1,3])\n", table_idx);
+  }
+}
+
+void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
+                nfapi_nr_dl_config_dci_dl_pdu dci_pdu) {
+
+  LOG_D(MAC, "TBS calculation\n");
+
+  nfapi_nr_dl_config_pdcch_parameters_rel15_t params_rel15 = dci_pdu.pdcch_params_rel15;
+  nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_rel15 = &dlsch_pdu->dlsch_pdu_rel15;
+  uint8_t rnti_type = params_rel15.rnti_type;
+  uint8_t N_PRB_oh = ((rnti_type==NFAPI_NR_RNTI_SI)||(rnti_type==NFAPI_NR_RNTI_RA)||(rnti_type==NFAPI_NR_RNTI_P))? 0 : \
+  (dlsch_rel15->x_overhead);
+  uint8_t N_PRB_DMRS = (dlsch_rel15->dmrs_Type==1)?6:4; //This only works for antenna port 1000
+  uint8_t N_sh_symb = dlsch_rel15->nb_symbols;
+  uint8_t Imcs = dlsch_rel15->mcs_idx;
+  uint16_t N_RE_prime = NR_NB_SC_PER_RB*N_sh_symb - N_PRB_DMRS - N_PRB_oh;
+  LOG_D(MAC, "N_RE_prime %d for %d symbols %d DMRS per PRB and %d overhead\n", N_RE_prime, N_sh_symb, N_PRB_DMRS, N_PRB_oh);
+
+  uint16_t N_RE, Ninfo, Ninfo_prime, C, TBS=0, R;
+  uint8_t table_idx, Qm, n, scale;
+
+  //uint8_t mcs_table = config.pdsch_config.mcs_table.value;
+  //uint8_t ss_type = params_rel15.search_space_type;
+  //uint8_t dci_format = params_rel15.dci_format;
+  //get_table_idx(mcs_table, dci_format, rnti_type, ss_type);
+  table_idx = 1;
+  scale = ((table_idx==2)&&((Imcs==20)||(Imcs==26)))?11:10;
+  
+  N_RE = min(156, N_RE_prime)*dlsch_rel15->n_prb;
+  R = nr_get_code_rate(Imcs, table_idx);
+  Qm = nr_get_Qm(Imcs, table_idx);
+  Ninfo = (N_RE*R*Qm*dlsch_rel15->nb_layers)>>scale;
+
+  if (Ninfo <= 3824) {
+    n = max(3, (log2(Ninfo)-6));
+    Ninfo_prime = max(24, (Ninfo>>n)<<n);
+    for (int i=0; i<93; i++)
+      if (nr_tbs_table[i] >= Ninfo_prime) {
+        TBS = nr_tbs_table[i];
+        break;
+      }
+  }
+  else {
+    n = log2(Ninfo-24)-5;
+    Ninfo_prime = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
+
+    if (R<256) {
+      C = CEILIDIV((Ninfo_prime+24),3816);
+      TBS = (C<<3)*CEILIDIV((Ninfo_prime+24),(C<<3)) - 24;
+    }
+    else {
+      if (Ninfo_prime>8424) {
+        C = CEILIDIV((Ninfo_prime+24),8424);
+        TBS = (C<<3)*CEILIDIV((Ninfo_prime+24),(C<<3)) - 24;
+      }
+      else
+        TBS = ((CEILIDIV((Ninfo_prime+24),8))<<3) - 24;
+    }    
+  }
+
+  dlsch_rel15->coding_rate = R;
+  dlsch_rel15->modulation_order = Qm;
+  dlsch_rel15->transport_block_size = TBS;
+  dlsch_rel15->nb_mod_symbols = N_RE_prime*dlsch_rel15->n_prb*dlsch_rel15->nb_codewords;
+
+  LOG_D(MAC, "TBS %d : N_RE %d  N_PRB_DMRS %d N_sh_symb %d N_PRB_oh %d Ninfo %d Ninfo_prime %d R %d Qm %d table %d scale %d nb_symbols %d\n",
+  TBS, N_RE, N_PRB_DMRS, N_sh_symb, N_PRB_oh, Ninfo, Ninfo_prime, R, Qm, table_idx, scale, dlsch_rel15->nb_mod_symbols);
+}
+
+int NRRIV2BW(int locationAndBandwidth,int N_RB) {
+  int tmp = locationAndBandwidth/N_RB;
+  int tmp2 = locationAndBandwidth%N_RB;
+
+  if (tmp <= (N_RB-tmp2+1)) return(tmp);
+  else                      return(N_RB-tmp);
+
+}
+
+int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB) {
+  int tmp = locationAndBandwidth/N_RB;
+  int tmp2 = locationAndBandwidth%N_RB;
+  
+  if (tmp <= (N_RB-tmp2+1)) return(tmp2);
+  else                      return(N_RB-tmp2);
+}
+
+int extract_startSymbol(int startSymbolAndLength) {
+  int tmp = startSymbolAndLength/14;
+  int tmp2 = startSymbolAndLength%14;
+
+  if (tmp > 0 && tmp < (14-tmp2)) return(tmp2);
+  else                            return(13-tmp2);
+}
+
+int extract_length(int startSymbolAndLength) {
+  int tmp = startSymbolAndLength/14;
+  int tmp2 = startSymbolAndLength%14;
+
+  if (tmp > 0 && tmp < (14-tmp2)) return(tmp);
+  else                            return(15-tmp2);
+}
+ 
+void fill_initialBWPDLtimeDomainAllocaion(nfapi_nr_config_request_t *cfg,int time_domain_assignment,int *k0,int *mappingType,int *start_symbol,int *length) {
+  AssertFatal(time_domain_assignment < cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations.value,"DL time_domain_assignment %d >= %d\n",
+	      time_domain_assignment,cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations.value);
+  *k0           = cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_k0[time_domain_assignment].value;
+  *mappingType = cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_mappingType[time_domain_assignment].value;
+  *start_symbol = extract_startSymbol(cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_startSymbolAndLength[time_domain_assignment].value);
+  *length       = extract_length(cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_startSymbolAndLength[time_domain_assignment].value);
+
+}
+
+
+
+void fill_initialBWPULtimeDomainAllocaion(nfapi_nr_config_request_t *cfg,int time_domain_assignment,int *k2, int *mappingType, int *start_symbol,int *length) {
+  AssertFatal(time_domain_assignment < cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value,"UL time_domain_assignment %d >= %d\n",
+	      time_domain_assignment,cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value);
+
+  *k2           = cfg->pusch_config.PUSCHTimeDomainResourceAllocation_k2[time_domain_assignment].value;
+  *mappingType = cfg->pusch_config.PUSCHTimeDomainResourceAllocation_mappingType[time_domain_assignment].value;
+  *start_symbol = extract_startSymbol(cfg->pusch_config.PUSCHTimeDomainResourceAllocation_startSymbolAndLength[time_domain_assignment].value);
+  *length       = extract_length(cfg->pusch_config.PUSCHTimeDomainResourceAllocation_startSymbolAndLength[time_domain_assignment].value);
+}

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -108,11 +108,12 @@ uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn);
 
 uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw);
 
-void config_nr_mib(int Mod_idP, 
-		   int subCarrierSpacingCommon, 
-		   uint32_t ssb_SubcarrierOffset,
-		   int dmrs_TypeA_Position,
-		   uint32_t pdcch_ConfigSIB1
-		   );
+void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
+                nfapi_nr_dl_config_dci_dl_pdu dci_pdu);
+
+int NRRIV2BW(int locationAndBandwidth,int N_RB);
+
+int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB);
+
 
 #endif /*__LAYER2_NR_MAC_PROTO_H__*/