commit prior to merge

cmake_targets/CMakeLists.txt

@@ -2574,7 +2574,7 @@ add_executable(nr_dlsim
   ${OPENAIR_DIR}/common/utils/backtrace.c
   ${OPENAIR_DIR}/common/utils/system.c
   ${T_SOURCE})   
-target_link_libraries(nr_dlsim  -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON RRC_LIB NR_RRC_LIB CONFIG_LIB L2_NR -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
+target_link_libraries(nr_dlsim  -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON MAC_NR RRC_LIB NR_RRC_LIB CONFIG_LIB L2_NR -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
 
 add_executable(nr_prachsim
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/prachsim.c 

nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h

@@ -51,8 +51,8 @@
 #define FAPI_NR_UL_CONFIG_LIST_NUM 10
 
 #define FAPI_NR_UL_CONFIG_TYPE_PRACH 0x01
-#define FAPI_NR_UL_CONFIG_TYPE_PUCCH 0x02
-#define FAPI_NR_UL_CONFIG_TYPE_PUSCH 0x03
+#define FAPI_NR_UL_CONFIG_TYPE_UCI   0x02
+#define FAPI_NR_UL_CONFIG_TYPE_ULSCH 0x03
 #define FAPI_NR_UL_CONFIG_TYPE_SRS   0x04
 
 

nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h

@@ -197,11 +197,11 @@ typedef struct {
 } fapi_nr_rx_indication_body_t;
 
 ///
-#define NFAPI_RX_IND_MAX_PDU 100
+#define FAPI_RX_IND_MAX_PDU 100
 typedef struct {
   uint32_t sfn_slot;
   uint16_t number_pdus;
-  fapi_nr_rx_indication_body_t rx_indication_body[NFAPI_RX_IND_MAX_PDU];
+  fapi_nr_rx_indication_body_t rx_indication_body[FAPI_RX_IND_MAX_PDU];
 } fapi_nr_rx_indication_t;
 
 typedef struct {
@@ -224,7 +224,7 @@ typedef struct {
   fapi_nr_tx_request_body_t *tx_request_body;
 } fapi_nr_tx_request_t;
 
-    typedef struct {
+typedef struct {
   uint8_t preamble_index;
   uint8_t prach_configuration_index;
   uint16_t preamble_length;
@@ -239,7 +239,7 @@ typedef struct {
   uint16_t rsrp_threshold_ssb;
   uint16_t rsrp_threshold_sul;
   uint16_t prach_freq_offset;
-    } fapi_nr_ul_config_prach_pdu;
+} fapi_nr_ul_config_prach_pdu;
 
 typedef struct {
 
@@ -322,7 +322,7 @@ typedef struct {
         // pathlossReferenceRSs        SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M
         int8_t                 twoPUCCH_PC_AdjustmentStates;
 
-    } fapi_nr_ul_config_pucch_pdu;
+    } fapi_nr_ul_config_uci_pdu;
 
     typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t;
     typedef struct{
@@ -352,23 +352,39 @@ typedef struct {
         uint8_t maxCodeBlockGroupsPerTransportBlock;
         uint8_t ptrs_dmrs_association_port;
         uint8_t beta_offset_ind;
-    } fapi_nr_ul_config_pusch_pdu_rel15_t;
+    } fapi_nr_ul_config_ulsch_pdu_rel15_t;
 
 typedef struct {
   uint16_t rnti;
-  fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15;
-} fapi_nr_ul_config_pusch_pdu;
+  fapi_nr_ul_config_ulsch_pdu_rel15_t ulsch_pdu_rel15;
+} fapi_nr_ul_config_ulsch_pdu;
 
 typedef struct {
 
 } fapi_nr_ul_config_srs_pdu;
 
+// nFAPI enums
+typedef enum {
+  FAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0,
+  FAPI_NR_DL_CONFIG_BCH_PDU_TYPE,
+  FAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE,
+  FAPI_NR_DL_CONFIG_PCH_PDU_TYPE,
+} fapi_nr_dl_config_pdu_type_e;
+
+// nFAPI enums
+typedef enum {
+  FAPI_NR_UL_CONFIG_PRACH_PDU_TYPE = 0,
+  FAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE,
+  FAPI_NR_UL_CONFIG_UCI_PDU_TYPE,
+  FAPI_NR_UL_CONFIG_SRS_PDU_TYPE,
+} fapi_nr_ul_config_pdu_type_e;
+
 typedef struct {
   uint8_t pdu_type;
   union {
     fapi_nr_ul_config_prach_pdu prach_config_pdu;
-    fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
-    fapi_nr_ul_config_pusch_pdu ulsch_config_pdu;
+    fapi_nr_ul_config_uci_pdu uci_config_pdu;
+    fapi_nr_ul_config_ulsch_pdu ulsch_config_pdu;
     fapi_nr_ul_config_srs_pdu srs_config_pdu;
   };
 } fapi_nr_ul_config_request_pdu_t;
@@ -436,6 +452,20 @@ typedef struct {
   //  to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
 } fapi_nr_dl_config_dlsch_pdu_rel15_t;
 
+typedef struct {
+
+  uint8_t subcarrier_spacing_common;
+  uint8_t ssb_subcarrier_offset;
+  uint8_t dmrs_type_a_position;
+  uint8_t pdcch_config_sib1;
+  uint8_t cell_barred;
+  uint8_t intra_frequency_reselection;
+
+  uint16_t system_frame_number;
+  uint8_t ssb_index;
+  uint8_t half_frame_bit;
+} fapi_nr_dl_config_bch_pdu;
+
 typedef struct {
   uint16_t rnti;
   fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15;
@@ -444,6 +474,7 @@ typedef struct {
 typedef struct {
   uint8_t pdu_type;
   union {
+    fapi_nr_dl_config_bch_pdu bch_config_pdu;
     fapi_nr_dl_config_dci_pdu dci_config_pdu;
     fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
   };
@@ -461,6 +492,154 @@ typedef struct {
 //
 
     
+typedef struct {
+  uint8_t  numerology_index_mu;
+  uint8_t duplex_mode;
+  uint8_t  dl_cyclic_prefix_type;
+  uint8_t  ul_cyclic_prefix_type;
+} fapi_nr_subframe_config_t;
+
+typedef struct {
+  uint16_t  dl_carrier_bandwidth;
+  uint16_t  ul_carrier_bandwidth;
+  uint16_t  dl_absolutefrequencypointA;
+  uint16_t  ul_absolutefrequencypointA;
+  uint16_t  dl_offsettocarrier;
+  uint16_t  ul_offsettocarrier;
+  uint16_t  dl_subcarrierspacing;
+  uint16_t  ul_subcarrierspacing;
+  uint16_t  dl_specificcarrier_k0;
+  uint16_t  ul_specificcarrier_k0;
+  uint16_t  NIA_subcarrierspacing;
+} fapi_nr_rf_config_t;
+
+typedef struct {
+  uint16_t  physical_cell_id;
+  uint8_t   half_frame_index;
+  uint16_t  ssb_subcarrier_offset;
+  uint16_t  ssb_sib1_position_in_burst; // in sib1
+  uint64_t  ssb_scg_position_in_burst;  // in servingcellconfigcommon 
+  uint8_t  ssb_periodicity;
+  uint16_t  ss_pbch_block_power;
+  uint16_t  n_ssb_crb;
+} fapi_nr_sch_config_t;
+
+typedef struct {
+  uint16_t  dl_bandwidth;
+  uint16_t  ul_bandwidth;
+  uint16_t  dl_offset;
+  uint16_t  ul_offset;
+  uint8_t   dl_subcarrierSpacing;
+  uint8_t   ul_subcarrierSpacing;
+} fapi_nr_initialBWP_config_t;
+
+#define FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS 16
+#define FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS 16
+
+typedef struct {
+  uint16_t  dmrs_TypeA_Position;
+  uint16_t  num_PDSCHTimeDomainResourceAllocations;
+  uint16_t  PDSCHTimeDomainResourceAllocation_k0[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS];         
+  uint16_t  PDSCHTimeDomainResourceAllocation_mappingType[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS]; 
+  uint16_t  PDSCHTimeDomainResourceAllocation_startSymbolAndLength[FAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS];
+} fapi_nr_pdsch_config_t;
+
+typedef struct {
+  uint16_t  prach_RootSequenceIndex;                                        ///// L1 parameter 'PRACHRootSequenceIndex'
+  uint16_t  prach_msg1_SubcarrierSpacing;                                   ///// L1 parameter 'prach-Msg1SubcarrierSpacing'
+  uint16_t  restrictedSetConfig;
+  uint16_t  msg3_transformPrecoding;                                        ///// L1 parameter 'msg3-tp'
+  uint16_t  ssb_perRACH_OccasionAndCB_PreamblesPerSSB;
+  uint16_t  ra_ContentionResolutionTimer;
+  uint16_t  rsrp_ThresholdSSB;
+  /////////////////--------------------NR RACH-ConfigGeneric--------------------/////////////////
+  uint16_t  prach_ConfigurationIndex;                                       ///// L1 parameter 'PRACHConfigurationIndex'
+  uint16_t  prach_msg1_FDM;                                                 ///// L1 parameter 'prach-FDM'
+  uint16_t  prach_msg1_FrequencyStart;                                      ///// L1 parameter 'prach-frequency-start'
+  uint16_t  zeroCorrelationZoneConfig;
+  uint16_t  preambleReceivedTargetPower;
+  uint16_t  preambleTransMax;
+  uint16_t  powerRampingStep;
+  uint16_t  ra_ResponseWindow;
+} fapi_nr_rach_config_t;
+
+typedef struct {
+  uint16_t  groupHoppingEnabledTransformPrecoding;                          ///// L1 parameter 'Group-hopping-enabled-Transform-precoding'
+  uint16_t  msg3_DeltaPreamble;                                             ///// L1 parameter 'Delta-preamble-msg3' 
+  uint16_t  p0_NominalWithGrant;                                            ///// L1 parameter 'p0-nominal-pusch-withgrant'
+  uint16_t  dmrs_TypeA_Position;
+  uint16_t  num_PUSCHTimeDomainResourceAllocations;
+  uint16_t  PUSCHTimeDomainResourceAllocation_k2[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS];                                ///// L1 parameter 'K2' 
+  uint16_t  PUSCHTimeDomainResourceAllocation_mappingType[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS];                       ///// L1 parameter 'Mapping-type'
+  uint16_t  PUSCHTimeDomainResourceAllocation_startSymbolAndLength[FAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS];
+} fapi_nr_pusch_config_t;
+
+typedef struct {
+  uint8_t pucch_resource_common;
+  uint16_t  pucch_GroupHopping;                                             ///// L1 parameter 'PUCCH-GroupHopping' 
+  uint8_t hopping_id;
+  uint16_t  p0_nominal;                                                     ///// L1 parameter 'p0-nominal-pucch'
+} fapi_nr_pucch_config_t;
+
+typedef struct {
+  uint8_t  controlResourceSetZero;
+  uint8_t  searchSpaceZero;
+  
+  //  fapi_nr_SearchSpace_t           sib1searchSpace;
+  //  fapi_nr_SearchSpace_t           sibssearchSpace; 
+  //  fapi_nr_SearchSpace_t           ra_SearchSpace;
+} fapi_nr_pdcch_config_t;
+
+typedef struct {
+//NR TDD-UL-DL-ConfigCommon                ///// L1 parameter 'UL-DL-configuration-common'
+  uint16_t  referenceSubcarrierSpacing;                                     ///// L1 parameter 'reference-SCS'
+  uint16_t  dl_ul_periodicity;                                  ///// L1 parameter 'DL-UL-transmission-periodicity'
+  uint16_t  nrofDownlinkSlots;                                              ///// L1 parameter 'number-of-DL-slots'
+  uint16_t  nrofDownlinkSymbols;                                            ///// L1 parameter 'number-of-DL-symbols-common'
+  uint16_t  nrofUplinkSlots;                                                ///// L1 parameter 'number-of-UL-slots'
+  uint16_t  nrofUplinkSymbols;                                              ///// L1 parameter 'number-of-UL-symbols-common'
+  uint16_t  Pattern2Present;
+  uint16_t  Pattern2_dl_ul_periodicity;                                  ///// L1 parameter 'DL-UL-transmission-periodicity'
+  uint16_t  Pattern2_nrofDownlinkSlots;                                              ///// L1 parameter 'number-of-DL-slots'
+  uint16_t  Pattern2_nrofDownlinkSymbols;                                            ///// L1 parameter 'number-of-DL-symbols-common'
+  uint16_t  Pattern2_nrofUplinkSlots;                                                ///// L1 parameter 'number-of-UL-slots'
+  uint16_t  Pattern2_nrofUplinkSymbols;                                              ///// L1 parameter 'number-of-UL-symbols-common'
+} fapi_nr_tdd_ul_dl_config_t;
+
+#define FAPI_MAX_NUM_RF_BANDS 16
+typedef struct {
+        uint16_t number_rf_bands;
+        uint16_t rf_band[FAPI_MAX_NUM_RF_BANDS];
+} fapi_rf_bands_t;
+
+typedef struct
+{
+  fapi_rf_bands_t rf_bands;
+
+  uint32_t nrarfcn;
+
+  // nfapi_nmm_frequency_bands_t nmm_gsm_frequency_bands;
+  // nfapi_nmm_frequency_bands_t nmm_umts_frequency_bands;
+  // nfapi_nmm_frequency_bands_t nmm_lte_frequency_bands;
+  // nfapi_uint8_tlv_t nmm_uplink_rssi_supported;
+
+} fapi_nr_fapi_t;
+
+typedef struct {
+  fapi_nr_fapi_t                           fapi_config;
+  fapi_nr_subframe_config_t                subframe_config;
+  fapi_nr_rf_config_t                      rf_config;
+  fapi_nr_sch_config_t                     sch_config;
+  fapi_nr_initialBWP_config_t              initialBWP_config;
+  fapi_nr_pdsch_config_t                   pdsch_config;
+  fapi_nr_rach_config_t                    rach_config;
+  fapi_nr_pusch_config_t                   pusch_config;
+  fapi_nr_pucch_config_t                   pucch_config;
+  fapi_nr_pdcch_config_t                   pdcch_config;
+  fapi_nr_tdd_ul_dl_config_t               tdd_ul_dl_config;
+  //  fapi_nr_ratematchpattern_t               ratematchpattern;
+  //  fapi_nr_ratematchpattern_lte_crs_t       ratematchpattern_lte_crs;
+} fapi_nr_config_request_t;
 
 typedef struct {
   fapi_nr_coreset_t coreset;
@@ -544,19 +723,6 @@ typedef struct {
   uint8_t p0_nominal;
 } fapi_nr_pucch_config_common_t;
 
-typedef struct {
-
-  uint8_t subcarrier_spacing_common;
-  uint8_t ssb_subcarrier_offset;
-  uint8_t dmrs_type_a_position;
-  uint8_t pdcch_config_sib1;
-  uint8_t cell_barred;
-  uint8_t intra_frequency_reselection;
-
-  uint16_t system_frame_number;
-  uint8_t ssb_index;
-  uint8_t half_frame_bit;
-} fapi_nr_pbch_config_t;
 
 typedef struct {
         
@@ -693,7 +859,6 @@ typedef struct {
   fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
   fapi_nr_sps_config_t sps_config;
   fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
-
 } fapi_nr_dl_bwp_dedicated_config_t;
 
 typedef struct {
@@ -907,17 +1072,4 @@ typedef struct {
 #define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED    0x08
 #define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED    0x10
 
-typedef struct {
-  uint32_t config_mask;
-
-  fapi_nr_pbch_config_t pbch_config;  //  MIB
-
-  fapi_nr_dl_bwp_common_config_t     dl_bwp_common;
-  fapi_nr_dl_bwp_dedicated_config_t  dl_bwp_dedicated;
-
-  fapi_nr_ul_bwp_common_config_t     ul_bwp_common;
-  fapi_nr_ul_bwp_dedicated_config_t  ul_bwp_dedicated;
-
-} fapi_nr_config_request_t;
-
 #endif

nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h

@@ -44,11 +44,16 @@ typedef enum {
   NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE,
   NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE,
   NFAPI_NR_DL_CONFIG_PCH_PDU_TYPE,
-  NFAPI_NR_DL_CONFIG_NBCH_PDU_TYPE,
-  NFAPI_NR_DL_CONFIG_NPDCCH_PDU_TYPE,
-  NFAPI_NR_DL_CONFIG_NDLSCH_PDU_TYPE
 } nfapi_nr_dl_config_pdu_type_e;
 
+// nFAPI enums
+typedef enum {
+  NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE = 0,
+  NFAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE,
+  NFAPI_NR_UL_CONFIG_UCI_PDU_TYPE,
+  NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE,
+} nfapi_nr_ul_config_pdu_type_e;
+
 //These TLVs are used exclusively by nFAPI
 typedef struct
 {
@@ -251,6 +256,7 @@ typedef struct {
 } nfapi_nr_pusch_config_t;
 
 typedef struct {
+  uint8_t pucch_resource_common;
   nfapi_uint16_tlv_t  pucch_GroupHopping;                                             ///// L1 parameter 'PUCCH-GroupHopping' 
   nfapi_uint16_tlv_t  p0_nominal;                                                     ///// L1 parameter 'p0-nominal-pucch'
 } nfapi_nr_pucch_config_t;
@@ -655,18 +661,6 @@ typedef struct {
   nfapi_nr_coreset_t   pagingControlResourceSets;
 }nfapi_nr_dl_config_pch_pdu_rel15_t;
 
-typedef struct {
-  
-} nfapi_nr_dl_config_nbch_pdu_rel15_t;
-
-typedef struct {
-  
-} nfapi_nr_dl_config_npdcch_pdu_rel15_t;
-
-typedef struct {
-  
-} nfapi_nr_dl_config_ndlsch_pdu_rel15_t;
-
 typedef struct {
   nfapi_nr_dl_config_dci_dl_pdu_rel15_t     dci_dl_pdu_rel15;
   nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params_rel15;
@@ -682,12 +676,10 @@ typedef struct {
   nfapi_nr_dl_config_bch_pdu_rel15_t        bch_pdu_rel15;
   nfapi_nr_dl_config_dlsch_pdu              dlsch_pdu;
   nfapi_nr_dl_config_pch_pdu_rel15_t        pch_pdu_rel15;
-  nfapi_nr_dl_config_nbch_pdu_rel15_t       nbch_pdu_rel15;
-  nfapi_nr_dl_config_npdcch_pdu_rel15_t     npdcch_pdu_rel15;
-  nfapi_nr_dl_config_ndlsch_pdu_rel15_t     ndlsch_pdu_rel15;
   };
 } nfapi_nr_dl_config_request_pdu_t;
 
+ 
 typedef struct {
   nfapi_tl_t tl;
   uint8_t   number_dci;
@@ -739,9 +731,37 @@ typedef struct {
     uint8_t beta_offset_ind;
 } nfapi_nr_ul_config_ulsch_pdu_rel15_t;
 
+
+
+
+
 typedef struct {
   uint16_t rnti;
   nfapi_nr_ul_config_ulsch_pdu_rel15_t ulsch_pdu_rel15;
 } nfapi_nr_ul_config_ulsch_pdu;
 
+typedef struct {
+  uint8_t pdu_type;
+  uint8_t pdu_size;
+
+  union {
+    //    nfapi_nr_ul_config_uci_pdu uci_pdu;
+    nfapi_nr_ul_config_ulsch_pdu ulsch_pdu;
+    //    nfapi_nr_ul_config_srs_pdu srs_pdu;
+  };
+} nfapi_nr_ul_config_request_pdu_t;
+
+typedef struct {
+  nfapi_tl_t tl;
+  uint8_t   number_pdu;
+  nfapi_nr_ul_config_request_pdu_t *ul_config_pdu_list;
+} nfapi_nr_ul_config_request_body_t;
+
+typedef struct {
+  nfapi_p7_message_header_t header;
+  uint16_t sfn_sf;
+  nfapi_nr_ul_config_request_body_t ul_config_request_body;
+  nfapi_vendor_extension_tlv_t vendor_extension;
+} nfapi_nr_ul_config_request_t;
+
 #endif

openair1/PHY/NR_TRANSPORT/nr_dci.c

@@ -187,6 +187,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
   cset_start_symb = pdcch_params.first_symbol;
   cset_nsymb = pdcch_params.n_symb;
   dci_idx = 0;
+  LOG_D(PHY, "Coreset rb_offset %d\n",pdcch_params.rb_offset);
   LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
   // DMRS length is per OFDM symbol
   uint16_t dmrs_length = (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS)?

openair1/PHY/NR_TRANSPORT/nr_dci_tools.c

@@ -184,7 +184,7 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
       pos=fsize;
       *dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos)); 
 #ifdef DEBUG_FILL_DCI
-      LOG_D(PHY,"frequency-domain assignment %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",pdu_rel15->frequency_domain_assignment,fsize,N_RB,dci_alloc->size-pos,*dci_pdu);
 #endif
       // Time domain assignment
       pos+=4;		   
@@ -219,7 +219,7 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
       pos++;
       *dci_pdu |= ((uint64_t)pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos);
 #ifdef DEBUG_FILL_DCI
-      LOG_D(PHY,"Format indicator %d (%d bits)=> %d (0x%lx)\n",pdu_rel15->format_indicator,1,dci_alloc->size-pos,*dci_pdu);
+      LOG_D(PHY,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",pdu_rel15->format_indicator,1,N_RB,dci_alloc->size-pos,*dci_pdu);
 #endif
 
       // Freq domain assignment (275rb >> fsize = 16)

openair1/PHY/NR_TRANSPORT/nr_prach.c

@@ -645,3 +645,4 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
   if (gNB) stop_meas(&gNB->rx_prach);
 
 }
+

openair1/PHY/NR_UE_TRANSPORT/dci_nr.c

@@ -778,7 +778,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
   // For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1)
   //uint32_t n_BWP_start = 0;
   //uint32_t n_rb_offset = 0;
-  uint32_t n_rb_offset                                      = pdcch_vars2->coreset[nb_coreset_active].rb_offset/*+(int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)*/;
+  uint32_t n_rb_offset                                      = pdcch_vars2->coreset[nb_coreset_active].rb_offset;/*+(int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB);*/
   // start time position for CORESET
   // parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot
   uint8_t start_symbol = 0;

openair1/SCHED_NR/fapi_nr_l1.c

@@ -89,6 +89,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
   uint8_t                       CC_id        = Sched_INFO->CC_id;
   nfapi_nr_dl_config_request_t  *DL_req      = Sched_INFO->DL_req;
   nfapi_tx_request_t            *TX_req      = Sched_INFO->TX_req;
+  nfapi_nr_ul_config_request_t  *UL_req      = Sched_INFO->UL_req;
   frame_t                       frame        = Sched_INFO->frame;
   sub_frame_t                   slot         = Sched_INFO->slot;
 
@@ -98,10 +99,9 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
   gNB         = RC.gNB[Mod_id];
 
   uint8_t number_dl_pdu             = DL_req->dl_config_request_body.number_pdu;
+  uint8_t number_ul_pdu             = UL_req->ul_config_request_body.number_pdu;
 
-  nfapi_nr_dl_config_request_pdu_t *dl_config_pdu;
  
-  int i;
 
   LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d \n",
         frame,slot,
@@ -115,8 +115,8 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
 
   gNB->pdcch_vars.num_dci=0;
 
-  for (i=0;i<number_dl_pdu;i++) {
-    dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
+  for (int i=0;i<number_dl_pdu;i++) {
+    nfapi_nr_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
     LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
     switch (dl_config_pdu->pdu_type) {
       case NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE:
@@ -162,4 +162,13 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
     oai_nfapi_nr_dl_config_req(Sched_INFO->DL_req); // DJP - .dl_config_request_body.dl_config_pdu_list[0]); // DJP - FIXME TODO - yuk - only copes with 1 pdu
   }
 
+  for (int i=0;i<number_ul_pdu;i++) {
+    nfapi_nr_ul_config_request_pdu_t *ul_config_pdu = &UL_req->ul_config_request_body.ul_config_pdu_list[i];
+    LOG_D(PHY,"NFAPI: ul_pdu %d : type %d\n",i,ul_config_pdu->pdu_type);
+    switch (ul_config_pdu->pdu_type) {
+      case NFAPI_NR_UL_CONFIG_ULSCH_PDU_TYPE:
+        //handle_nr_nfapi_ulsch_pdu(gNB,frame,slot,&ul_config_pdu->ulsch_pdu);
+	break;
+    }
+  }
 }

openair1/SCHED_NR_UE/defs.h

@@ -123,7 +123,9 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e
   @param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
   @param phy_vars_rn pointer to RN variables
 */
-int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode,fapi_nr_pbch_config_t pbch_config);
+int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
+			   uint8_t do_pdcch_flag,runmode_t mode,
+			   fapi_nr_dl_config_request_t *DLconfigreq);
 int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
 
 

openair1/SCHED_NR_UE/fapi_nr_ue_l1.c

@@ -136,54 +136,54 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
     if(scheduled_response->ul_config != NULL){
       fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
       for(i=0; i<ul_config->number_pdus; ++i){
-	if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){
+	if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_ULSCH){
 	  // pusch config pdu
-	  fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
-	  uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr;
-	  ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs;
-	  ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb;
-	  ulsch0->harq_processes[current_harq_pid]->nb_symbols = pusch_config_pdu->number_symbols;
-	  ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol;
-	  ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
-	  ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
-	  ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
-	  ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
-	}
-	if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
+	  fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
+	  uint8_t current_harq_pid = ulsch_config_pdu->harq_process_nbr;
+	  ulsch0->harq_processes[current_harq_pid]->nb_rb = ulsch_config_pdu->number_rbs;
+	  ulsch0->harq_processes[current_harq_pid]->first_rb = ulsch_config_pdu->start_rb;
+	  ulsch0->harq_processes[current_harq_pid]->nb_symbols = ulsch_config_pdu->number_symbols;
+	  ulsch0->harq_processes[current_harq_pid]->start_symbol = ulsch_config_pdu->start_symbol;
+	  ulsch0->harq_processes[current_harq_pid]->mcs = ulsch_config_pdu->mcs;
+	  ulsch0->harq_processes[current_harq_pid]->DCINdi = ulsch_config_pdu->ndi;
+	  ulsch0->harq_processes[current_harq_pid]->rvidx = ulsch_config_pdu->rv;
+	  ulsch0->f_pusch = ulsch_config_pdu->absolute_delta_PUSCH;
+	}
+	if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_UCI){
 	  // pucch config pdu
-	  fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
+	  fapi_nr_ul_config_uci_pdu *uci_config_pdu = &ul_config->ul_config_list[i].uci_config_pdu;
 	  uint8_t pucch_resource_id = 0; //FIXME!!!
 	  uint8_t format = 1; // FIXME!!!
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId;
-	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal;
-	  /*                     pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
-				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
-				 pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
-				 pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
-				 pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
-				 pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
-				 pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = uci_config_pdu->initialCyclicShift;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = uci_config_pdu->nrofSymbols;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = uci_config_pdu->startingSymbolIndex;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = uci_config_pdu->nrofPRBs;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = uci_config_pdu->startingPRB;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = uci_config_pdu->timeDomainOCC;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = uci_config_pdu->occ_length;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = uci_config_pdu->occ_Index;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = uci_config_pdu->intraSlotFrequencyHopping;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = uci_config_pdu->secondHopPRB; // Not sure this parameter is used
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = uci_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = uci_config_pdu->pi2PBSK;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = uci_config_pdu->pucch_GroupHopping;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = uci_config_pdu->hoppingId;
+	  PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = uci_config_pdu->p0_nominal;
+	  /*                     pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = uci_config_pdu->initialCyclicShift;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = uci_config_pdu->nrofSymbols;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = uci_config_pdu->startingSymbolIndex;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = uci_config_pdu->nrofPRBs;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = uci_config_pdu->startingPRB;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = uci_config_pdu->timeDomainOCC;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = uci_config_pdu->occ_length;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = uci_config_pdu->occ_Index;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = uci_config_pdu->intraSlotFrequencyHopping;
+				 pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = uci_config_pdu->secondHopPRB; // Not sure this parameter is used
+				 pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = uci_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
+				 pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = uci_config_pdu->pi2PBSK;
+				 pucch_config_common->pucch_GroupHopping = uci_config_pdu->pucch_GroupHopping;
+				 pucch_config_common->hoppingId = uci_config_pdu->hoppingId;
+				 pucch_config_common->p0_nominal = uci_config_pdu->p0_nominal;*/
 	}
 	if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){
 	  // prach config pdu
@@ -214,37 +214,17 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
 int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
 
   if(phy_config != NULL){
-    if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
     LOG_I(MAC,"[L1][IF module][PHY CONFIG]\n");
-      LOG_I(MAC,"subcarrier spacing:          %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
-      LOG_I(MAC,"ssb carrier offset:          %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
-      LOG_I(MAC,"dmrs type A position:        %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
-      LOG_I(MAC,"pdcch config sib1:           %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
-      LOG_I(MAC,"cell barred:                 %d\n", phy_config->config_req.pbch_config.cell_barred);
-      LOG_I(MAC,"intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
-      LOG_I(MAC,"system frame number:         %d\n", phy_config->config_req.pbch_config.system_frame_number);
-      LOG_I(MAC,"ssb index:                   %d\n", phy_config->config_req.pbch_config.ssb_index);
-      LOG_I(MAC,"half frame bit:              %d\n", phy_config->config_req.pbch_config.half_frame_bit);
-      LOG_I(MAC,"-------------------------------\n");
-
-    }
-        
-    if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
-            
-    }
+    LOG_I(MAC,"subcarrier spacing:          %d\n", phy_config->config_req.rf_config.dl_subcarrierspacing);
+    LOG_I(MAC,"ssb carrier offset:          %d\n", phy_config->config_req.sch_config.ssb_subcarrier_offset);
+    LOG_I(MAC,"dmrs TypeA Position:         %d\n", phy_config->config_req.pdsch_config.dmrs_TypeA_Position);
+    LOG_I(MAC,"controlResourceSetZero:      %d\n", phy_config->config_req.pdcch_config.controlResourceSetZero);
+    LOG_I(MAC,"searchSapceZero:             %d\n", phy_config->config_req.pdcch_config.searchSpaceZero);
     
-    if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
-            
-    }
-
-    if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
-            
-    }
+    LOG_I(MAC,"-------------------------------\n");
 
-    if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
         
   }
-  }
     
   
 

openair1/SCHED_NR_UE/phy_procedures_nr_ue.c

@@ -4341,30 +4341,37 @@ void *UE_thread_slot1_dl_processing(void *arg) {
 #endif
 
 
-int is_pbch_in_slot(fapi_nr_pbch_config_t pbch_config, int frame, int slot, int periodicity, uint16_t slots_per_frame)  {
+fapi_nr_dl_config_bch_pdu *is_pbch_in_slot(fapi_nr_dl_config_request_t *DLconfigreq, int frame, int slot, int periodicity, uint16_t slots_per_frame)  {
 
-  int ssb_slot_decoded = (pbch_config.ssb_index)/2;
+  for (int i=0;i<DLconfigreq->number_pdus;i++) {
 
+    if (DLconfigreq->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_BCH_PDU_TYPE) {
+      int ssb_slot_decoded = (DLconfigreq->dl_config_list[i].bch_config_pdu.ssb_index)/2;
+      // All this checking should be done MAC
       if (periodicity == 5) {  
 	// check for pbch in corresponding slot each half frame
-    if (pbch_config.half_frame_bit)
-      return(slot == ssb_slot_decoded || slot == ssb_slot_decoded - slots_per_frame/2);
-    else
-      return(slot == ssb_slot_decoded || slot == ssb_slot_decoded + slots_per_frame/2);
+	if (DLconfigreq->dl_config_list[i].bch_config_pdu.half_frame_bit) {
+	  if (slot == ssb_slot_decoded || slot == ssb_slot_decoded - slots_per_frame/2) return(&DLconfigreq->dl_config_list[i].bch_config_pdu);
+	}
+	else {
+	  if (slot == ssb_slot_decoded || slot == ssb_slot_decoded + slots_per_frame/2) return(&DLconfigreq->dl_config_list[i].bch_config_pdu);
+	}
       }
       else {
 	// if the current frame is supposed to contain ssb
-    if (!((frame-(pbch_config.system_frame_number))%(periodicity/10)))
-      return(slot == ssb_slot_decoded);
-    else
-      return 0;
+	if (!((frame-(DLconfigreq->dl_config_list[i].bch_config_pdu.system_frame_number))%(periodicity/10))) {
+	  if (slot == ssb_slot_decoded)  return(&DLconfigreq->dl_config_list[i].bch_config_pdu);
+	}
+      }
+    }
   }
+  return NULL;
 }
 
 
 int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
 			   uint8_t do_pdcch_flag,runmode_t mode,
-			   fapi_nr_pbch_config_t pbch_config) {
+			   fapi_nr_dl_config_request_t *DLconfigreq) {
 
 
 
@@ -4372,7 +4379,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
   int pilot1;
   int frame_rx = proc->frame_rx;
   int nr_tti_rx = proc->nr_tti_rx;
-  int slot_pbch;
   NR_UE_PDCCH *pdcch_vars  = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0];
   NR_UE_DLSCH_t   **dlsch = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id];
   uint8_t harq_pid = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid;
@@ -4545,10 +4551,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
     VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
   }
 
-  slot_pbch = is_pbch_in_slot(pbch_config, frame_rx, nr_tti_rx, ssb_periodicity, ue->frame_parms.slots_per_frame);
+  fapi_nr_dl_config_bch_pdu *bch_config = is_pbch_in_slot(DLconfigreq, frame_rx, nr_tti_rx, ssb_periodicity, ue->frame_parms.slots_per_frame);
 
   // looking for pbch only in slot where it is supposed to be
-  if ((ue->decode_MIB == 1) && slot_pbch)
+  if ((ue->decode_MIB == 1) && bch_config)
     {
       LOG_D(PHY," ------  PBCH ChannelComp/LLR: frame.slot %d.%d ------  \n", frame_rx%1024, nr_tti_rx);
 
@@ -4563,7 +4569,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
 #if UE_TIMING_TRACE
   	start_meas(&ue->dlsch_channel_estimation_stats);
 #endif
-   	nr_pbch_channel_estimation(ue,0,nr_tti_rx,(ue->symbol_offset+i)%(ue->frame_parms.symbols_per_slot),i-1,(pbch_config.ssb_index)&7,pbch_config.half_frame_bit);
+   	nr_pbch_channel_estimation(ue,0,nr_tti_rx,(ue->symbol_offset+i)%(ue->frame_parms.symbols_per_slot),i-1,(bch_config->ssb_index)&7,bch_config->half_frame_bit);
 #if UE_TIMING_TRACE
   	stop_meas(&ue->dlsch_channel_estimation_stats);
 #endif

openair1/SIMULATION/NR_PHY/dlsim.c

@@ -72,6 +72,7 @@ RAN_CONTEXT_t RC;
 
 
 double cpuf;
+int sf_ahead=4;
 
 // dummy functions
 int nfapi_mode=0;
@@ -85,7 +86,6 @@ int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0
 int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) {return(0);}
 
 
-NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);}
 
 int dummy_nr_ue_dl_indication(nr_downlink_indication_t *dl_info){return(0);}
 int dummy_nr_ue_ul_indication(nr_uplink_indication_t *ul_info){return(0);}
@@ -596,12 +596,58 @@ int main(int argc, char **argv)
   frame_parms->N_RB_DL = N_RB_DL;
   frame_parms->N_RB_UL = N_RB_DL;
 
+  RC.nb_nr_macrlc_inst = 1;
+  mac_top_init_gNB();
+  gNB_mac = RC.nrmac[0];
+  gNB_RRC_INST rrc;
+  NR_ServingCellConfigCommon_t scc;
+  rrc.carrier.servingcellconfigcommon = &scc;
+  prepare_scc_sim(&scc);
+  *scc.physCellId = Nid_cell;
+  *scc.subcarrierSpacing=NR_SubcarrierSpacing_kHz30;
+  *scc.downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB=660960;
+  *scc.downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]=78;
+  scc.downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA=660000;
+  scc.downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0;
+  scc.downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30;
+  scc.downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_DL;
+  scc.downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth=13036;
+  scc.downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing=NR_SubcarrierSpacing_kHz30;
+  scc.downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->present=NR_SetupRelease_PDCCH_ConfigCommon_PR_setup;
+  *scc.downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=12;
+  *scc.downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero=0;
+  *scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0=0;
+  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
+  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=40;
+  *scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0=0;
+  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
+  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=53;
+  *scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0=0;
+  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
+  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=54;
+  scc.ssb_PositionsInBurst->present=NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap;
+  scc.tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing=NR_SubcarrierSpacing_kHz30;
+  scc.tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity=NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms0p5;
+  scc.tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity = -1;
+  for (int i=scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count-1;i>=3;i--) {
+    *scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0=-1;
+  }
+
+  for (int i=scc.uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count-1;i>=0;i--) {
+    *scc.uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[i]->k2=-1;
+  }
+  scc.ssb_PositionsInBurst->present = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap;
+  scc.dmrs_TypeA_Position = NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; 
+  fix_scc_sim(&scc,0xff);
+  AssertFatal((gNB->if_inst         = NR_IF_Module_init(0))!=NULL,"Cannot register interface");
+  gNB->if_inst->NR_PHY_config_req      = nr_phy_config_request;
+  rrc_mac_config_req_gNB(0,0,&scc);
+  phy_init_nr_gNB(gNB,0,0);
+
   // stub to configure frame_parms
-  nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
+  //  nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
   // call MAC to configure common parameters
 
-  phy_init_nr_gNB(gNB,0,0);
-  mac_top_init_gNB();
 
 
   double fs,bw;
@@ -696,50 +742,7 @@ int main(int argc, char **argv)
   nr_gold_pbch(UE);
   nr_gold_pdcch(UE,0,2);
 
-  RC.nb_nr_macrlc_inst = 1;
-  mac_top_init_gNB();
-  gNB_mac = RC.nrmac[0];
-  gNB_RRC_INST rrc;
-  NR_ServingCellConfigCommon_t scc;
-  rrc.carrier.servingcellconfigcommon = &scc;
-  prepare_scc_sim(&scc);
-  *scc.physCellId = Nid_cell;
-  *scc.subcarrierSpacing=NR_SubcarrierSpacing_kHz30;
-  *scc.downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB=660960;
-  *scc.downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]=78;
-  scc.downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA=660000;
-  scc.downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier=0;
-  scc.downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing=NR_SubcarrierSpacing_kHz30;
-  scc.downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth=N_RB_DL;
-  scc.downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth=13036;
-  scc.downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing=NR_SubcarrierSpacing_kHz30;
-  scc.downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->present=NR_SetupRelease_PDCCH_ConfigCommon_PR_setup;
-  *scc.downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=12;
-  *scc.downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero=0;
-  *scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->k0=0;
-  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
-  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength=40;
-  *scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0=0;
-  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
-  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength=53;
-  *scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0=0;
-  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType=NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
-  scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength=54;
-  scc.ssb_PositionsInBurst->present=NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap;
-  scc.tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing=NR_SubcarrierSpacing_kHz30;
-  scc.tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity=NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms0p5;
-  scc.tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity = -1;
-  for (int i=scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count-1;i>=3;i--) {
-    *scc.downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0=-1;
-  }
 
-  for (int i=scc.uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count-1;i>=0;i--) {
-    *scc.uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[i]->k2=-1;
-  }
-  scc.ssb_PositionsInBurst->present = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap;
-  scc.dmrs_TypeA_Position = NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; 
-  fix_scc_sim(&scc,0xff);
-  config_common(0,&scc);
    
   nr_l2_init_ue();
   UE_mac = get_mac_inst(0);
@@ -838,7 +841,7 @@ int main(int argc, char **argv)
   rrc.carrier.MIB = (uint8_t*) malloc(4);
   rrc.carrier.sizeof_MIB = do_MIB_NR(&rrc,0);
 
-  nr_rrc_mac_config_req_ue(0,0,0,rrc.carrier.mib.message.choice.mib,NULL,NULL,NULL);
+  nr_rrc_mac_config_req_ue(0,0,0,rrc.carrier.mib.message.choice.mib,&scc,NULL,NULL,NULL);
 
   // Initial bandwidth part configuration -- full carrier bandwidth
   UE_mac->initial_bwp_dl.bwp_id = 0;
@@ -898,9 +901,6 @@ int main(int argc, char **argv)
   UE_mac->scheduled_response.frame = frame;
   UE_mac->scheduled_response.slot = slot;
 
-  UE_mac->phy_config.config_req.pbch_config.system_frame_number = frame;
-  UE_mac->phy_config.config_req.pbch_config.ssb_index = 0;
-  UE_mac->phy_config.config_req.pbch_config.half_frame_bit = 0;
 
   for (SNR=snr0; SNR<snr1; SNR+=.2) {
 
@@ -953,7 +953,8 @@ int main(int argc, char **argv)
 			       0,
 			       do_pdcch_flag,
 			       normal_txrx,
-			       UE_mac->phy_config.config_req.pbch_config);
+			       &UE_mac->dl_config_request);
+
 
 	if (n_trials==1) {
 	  LOG_M("rxsigF0.m","rxsF0", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[0],slot_length_complex_samples_no_prefix,1,1);

openair2/LAYER2/NR_MAC_UE/config_ue.c

@@ -35,20 +35,114 @@
 
 #include "NR_MAC-CellGroupConfig.h"
 
+void config_common_ue(NR_UE_MAC_INST_t *mac) {
+
+  fapi_nr_config_request_t        *cfg = &mac->phy_config.config_req;
+  NR_ServingCellConfigCommon_t    *scc = mac->scc;
+
+  mac->if_module->phy_config_request(&mac->phy_config);
+
+  cfg->sch_config.physical_cell_id = *scc->physCellId;
+  cfg->sch_config.ssb_scg_position_in_burst = scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0];
+
+  cfg->subframe_config.duplex_mode                          = 1;
+
+  cfg->fapi_config.rf_bands.number_rf_bands       = 1;
+  cfg->fapi_config.rf_bands.rf_band[0]            = *(long*)scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];  
+
+  cfg->fapi_config.nrarfcn                  = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA;
+
+  //  cfg->subframe_config.numerology_index_mu = 1;
+
+  cfg->rf_config.dl_carrier_bandwidth    = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
+  LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->rf_config.dl_carrier_bandwidth);
+
+  cfg->rf_config.ul_carrier_bandwidth    = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
+
+  cfg->rf_config.dl_subcarrierspacing    = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
+
+  cfg->rf_config.ul_subcarrierspacing    = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
+
+
+  cfg->rf_config.dl_offsettocarrier    = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
+
+  cfg->rf_config.ul_offsettocarrier    = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
+ 
+  // InitialBWP configuration
+
+  cfg->initialBWP_config.dl_bandwidth    = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
+
+  cfg->initialBWP_config.dl_offset    = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
+
+  cfg->initialBWP_config.dl_subcarrierSpacing    = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
+
+  LOG_I(PHY,"%s() initialBWP_dl_Bandwidth.RBstart.SCS :%d.%d.%d\n", __FUNCTION__, cfg->initialBWP_config.dl_bandwidth,cfg->initialBWP_config.dl_offset,cfg->initialBWP_config.dl_subcarrierSpacing);
+
+  cfg->initialBWP_config.ul_bandwidth    = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
+
+  cfg->initialBWP_config.ul_offset    = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
+
+  cfg->initialBWP_config.ul_subcarrierSpacing    = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
+
+  LOG_I(PHY,"%s() initialBWP_ul_Bandwidth.RBstart.SCS :%d.%d.%d\n", __FUNCTION__, cfg->initialBWP_config.ul_bandwidth,cfg->initialBWP_config.ul_offset,cfg->initialBWP_config.ul_subcarrierSpacing);
+
+
+  cfg->rach_config.prach_RootSequenceIndex = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
+  if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
+    cfg->rach_config.prach_msg1_SubcarrierSpacing = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
+  else cfg->rach_config.prach_msg1_SubcarrierSpacing=cfg->rf_config.dl_subcarrierspacing;
+
+  cfg->rach_config.restrictedSetConfig = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig;
+  if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder)
+    cfg->rach_config.msg3_transformPrecoding = 1;
+  else cfg->rach_config.msg3_transformPrecoding = 0;
+
+  cfg->rach_config.prach_ConfigurationIndex = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;  
+  cfg->rach_config.prach_msg1_FDM = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM;            
+  cfg->rach_config.prach_msg1_FrequencyStart = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart; 
+  cfg->rach_config.zeroCorrelationZoneConfig = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
+  cfg->rach_config.preambleReceivedTargetPower = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower;
+
+  // PDCCH-ConfigCommon
+  cfg->pdcch_config.controlResourceSetZero = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero;
+  cfg->pdcch_config.searchSpaceZero = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero;
+
+  // PDSCH-ConfigCommon
+  cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
+  cfg->pdsch_config.dmrs_TypeA_Position = scc->dmrs_TypeA_Position;
+  AssertFatal(cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations<=NFAPI_NR_PDSCH_CONFIG_MAXALLOCATIONS,"illegal TimeDomainAllocation count %d\n",cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations);
+  for (int i=0;i<cfg->pdsch_config.num_PDSCHTimeDomainResourceAllocations;i++) {
+    cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_k0[i]=*scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
+    cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_mappingType[i]=scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType;
+    cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_startSymbolAndLength[i]=scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
+  }
+
+  // PUSCH-ConfigCommon
+  cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count;
+  cfg->pusch_config.dmrs_TypeA_Position = scc->dmrs_TypeA_Position+2;
+  AssertFatal(cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations<=NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS,"illegal TimeDomainAllocation count %d\n",cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations);
+  for (int i=0;i<cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations;i++) {
+    cfg->pusch_config.PUSCHTimeDomainResourceAllocation_k2[i]=*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2;
+  }
+}
+
 int nr_rrc_mac_config_req_ue(
     module_id_t                     module_id,
     int                             cc_idP,
     uint8_t                         gNB_index,
     NR_MIB_t                        *mibP,
+    NR_ServingCellConfigCommon_t    *sccP,
     NR_MAC_CellGroupConfig_t        *mac_cell_group_configP,
     NR_PhysicalCellGroupConfig_t    *phy_cell_group_configP,
-    NR_SpCellConfig_t               *spcell_configP ){
+    NR_SpCellConfig_t               *spCell_ConfigP ){
 
     NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
 
 //    NR_ServingCellConfig_t *serving_cell_config = spcell_configP->spCellConfigDedicated;
 //  TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc.
 
+    NR_ServingCellConfigCommon_t    *scc;
+
     if(mibP != NULL){
         mac->mib = mibP;    //  update by every reception
     }
@@ -120,13 +214,18 @@ int nr_rrc_mac_config_req_ue(
     }
 
 //  TODO check
-#if 0
-    if(serving_cell_config_configP != NULL ){
-        //config_phy(NULL, spcell_config);
-        mac->servCellIndex = spcell_config->servCellIndex;
+
+    if(spCell_ConfigP != NULL ){
+        mac->servCellIndex = spCell_ConfigP->servCellIndex;
+	if (spCell_ConfigP->reconfigurationWithSync) {
+	  mac->scc = spCell_ConfigP->reconfigurationWithSync->spCellConfigCommon;
+	  config_common_ue(mac);
+	}
+	mac->scd = spCell_ConfigP->spCellConfigDedicated;
     }
 
 
+#if 0
     if(serving_cell_config != NULL ){
         if(serving_cell_config->tdd_UL_DL_ConfigurationDedicated != NULL ){
             mac->tdd_UL_DL_ConfigurationDedicated = serving_cell_config->tdd_UL_DL_ConfigurationDedicated;

openair2/LAYER2/NR_MAC_UE/mac_defs.h

@@ -70,6 +70,9 @@ typedef enum {
 /*!\brief Top level UE MAC structure */
 typedef struct {
 
+  NR_ServingCellConfigCommon_t    *scc;
+  NR_ServingCellConfig_t          *scd;
+  int                             servCellIndex;
   ////  MAC config
   NR_DRX_Config_t    	          *drx_Config;
   NR_SchedulingRequestConfig_t    *schedulingRequestConfig;

openair2/LAYER2/NR_MAC_UE/mac_proto.h

@@ -63,6 +63,7 @@ int8_t nr_ue_decode_mib(
    \param cc_id                     component carrier id
    \param gNB_index                 gNB index
    \param mibP                      pointer to RRC message MIB
+   \param sccP                      pointer to ServingCellConfigCommon structure,
    \param mac_cell_group_configP    pointer to RRC message MAC-related in cell group config 
    \param phy_cell_group_configP    pointer to RRC message PHY-related in cell group config
    \param spcell_configP            pointer to RRC message serving cell config*/
@@ -71,6 +72,7 @@ int nr_rrc_mac_config_req_ue(
     int cc_id, 
     uint8_t gNB_index, 
     NR_MIB_t *mibP, 
+    NR_ServingCellConfigCommon_t    *sccP,
     NR_MAC_CellGroupConfig_t *mac_cell_group_configP, 
     NR_PhysicalCellGroupConfig_t *phy_cell_group_configP, 
     NR_SpCellConfig_t *spcell_configP );

openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c

@@ -48,22 +48,22 @@ uint32_t get_ssb_slot(uint32_t ssb_index){
 }
 
 uint8_t table_9_2_2_1[16][8]={
-{0,12,2, 0, 0,3,0,0},
-{0,12,2, 0, 0,4,8,0},
-{0,12,2, 3, 0,4,8,0},
-{1,10,4, 0, 0,6,0,0},
-{1,10,4, 0, 0,3,6,9},
-{1,10,4, 2, 0,3,6,9},
-{1,10,4, 4, 0,3,6,9},
-{1,4, 10,0, 0,6,0,0},
-{1,4, 10,0, 0,3,6,9},
-{1,4, 10,2, 0,3,6,9},
-{1,4, 10,4, 0,3,6,9},
-{1,0, 14,0, 0,6,0,0},
-{1,0, 14,0, 0,3,6,9},
-{1,0, 14,2, 0,3,6,9},
-{1,0, 14,4, 0,3,6,9},
-{1,0, 14,26,0,3,0,0}
+  {0,12,2, 0, 0,3,0,0},
+  {0,12,2, 0, 0,4,8,0},
+  {0,12,2, 3, 0,4,8,0},
+  {1,10,4, 0, 0,6,0,0},
+  {1,10,4, 0, 0,3,6,9},
+  {1,10,4, 2, 0,3,6,9},
+  {1,10,4, 4, 0,3,6,9},
+  {1,4, 10,0, 0,6,0,0},
+  {1,4, 10,0, 0,3,6,9},
+  {1,4, 10,2, 0,3,6,9},
+  {1,4, 10,4, 0,3,6,9},
+  {1,0, 14,0, 0,6,0,0},
+  {1,0, 14,0, 0,3,6,9},
+  {1,0, 14,2, 0,3,6,9},
+  {1,0, 14,4, 0,3,6,9},
+  {1,0, 14,26,0,3,0,0}
 };
 int8_t nr_ue_process_dlsch(module_id_t module_id,
 			   int cc_id,
@@ -79,6 +79,8 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
 
   //ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
   // First we need to verify if DCI ind contains a ul-sch to be perfomred. If it does, we will handle a PUSCH in the UL_CONFIG_REQ.
+
+  /*  
   ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH;
   for (int i=0; i<10; i++) {
     if (dci_ind->dci_list[i].dci_format < 2) ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
@@ -111,15 +113,15 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
   } else { // If DCI ind is not format 0_0 or 0_1, we will handle a PUCCH in the UL_CONFIG_REQ
     ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH;
     // If we handle PUCCH common
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format              = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][0];              /* format   0    1    2    3    4    */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift  = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][4];  /*          x    x                   */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols         = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][2];         /*          x    x    x    x    x    */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][1]; /*          x    x    x    x    x    */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC = 0;       /*               x                   */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs = 0;            /*                    x    x         */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB         = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][3];         /*                                     maxNrofPhysicalResourceBlocks  = 275 */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length = 0;          /*                              x    */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index = 0;           /*                              x    */
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format              = table_9_2_2_1[phy_config->config_req.pucch_config.pucch_resource_common][0];              // format   0    1    2    3    4    
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift  = table_9_2_2_1[phy_config->config_req.pucch_config.pucch_resource_common][4];  //          x    x                   
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols         = table_9_2_2_1[phy_config->config_req.pucch_config.pucch_resource_common][2];         //          x    x    x    x    x    
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex = table_9_2_2_1[phy_config->config_req.pucch_config.pucch_resource_common][1]; //          x    x    x    x    x    
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC = 0;       //               x                   
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs = 0;            //                    x    x         
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB         = table_9_2_2_1[phy_config->config_req.pucch_config.pucch_resource_common][3];         //                                     maxNrofPhysicalResourceBlocks  = 275 
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length = 0;          //                              x    
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index = 0;           //                              x    
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.intraSlotFrequencyHopping = 0;
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.secondHopPRB = 0;
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = 0;
@@ -128,15 +130,17 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = 0;
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = 0;
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = 0;
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping  = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId           = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal          = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping  = phy_config->config_req.pucch_config.pucch_group_hopping;
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId           = phy_config->config_req.pucch_config.hopping_id;
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal          = phy_config->config_req.pucch_config.p0_nominal;
+
     for (int i=0;i<NUMBER_PUCCH_FORMAT_NR;i++) ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0;
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0;     /* INTEGER (1..8)     */
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0;     // INTEGER (1..8)     
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
+
     // If we handle PUCCH dedicated
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format              = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].format;              /* format   0    1    2    3    4    */
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format              = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].format;              // format   0    1    2    3    4    
     switch (ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format){
     case pucch_format1_nr:
       ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.inter_slot_frequency_hopping;
@@ -173,25 +177,27 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
     default:
       break;
     }
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift        = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].initial_cyclic_shift;  /*          x    x                   */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols               = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_symbols;         /*          x    x    x    x    x    */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex       = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_symbol_index; /*          x    x    x    x    x    */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC             = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].time_domain_occ;       /*               x                   */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs                  = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_prbs;            /*                    x    x         */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB               = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_prb;         /*                                     maxNrofPhysicalResourceBlocks  = 275 */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length                = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_length;          /*                              x    */
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index                 = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_index;           /*                              x    */
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift        = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].initial_cyclic_shift;  //          x    x                   
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols               = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_symbols;         //          x    x    x    x    x    
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex       = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_symbol_index; //          x    x    x    x    x    
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC             = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].time_domain_occ;       //               x                   
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs                  = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_prbs;            //                    x    x         
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB               = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_prb;         //                                     maxNrofPhysicalResourceBlocks  = 275 
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length                = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_length;          //                              x    
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index                 = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_index;           //                              x    
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.intraSlotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].intra_slot_frequency_hopping;
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.secondHopPRB              = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].second_hop_prb;
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping        = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId                 = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal                = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
+
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping        = phy_config->config_req.pucch_config.pucch_group_hopping;
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId                 = phy_config->config_req.pucch_config.hopping_id;
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal                = phy_config->config_req.pucch_config.p0_nominal;
     for (int i=0;i<NUMBER_PUCCH_FORMAT_NR; i++) ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0;
-      ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0;     /* INTEGER (1..8)     */
+    ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0;     // INTEGER (1..8)     
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
     ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
 
   }
+  */
   if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
     mac->if_module->scheduled_response(&mac->scheduled_response);
   }
@@ -482,7 +488,7 @@ int8_t nr_ue_decode_mib(
       //  38.213 Table 13-13
       AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n");
       //  PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
-//                sfn_c = SFN_C_EQ_SFN_SSB;
+      //                sfn_c = SFN_C_EQ_SFN_SSB;
       n_c = get_ssb_slot(ssb_index);
       switch(ssb_index & 0x3){    //  ssb_index(i) mod 4
       case 0: 
@@ -504,7 +510,7 @@ int8_t nr_ue_decode_mib(
       //  38.213 Table 13-14
       AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n");
       //  PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
-//                sfn_c = SFN_C_EQ_SFN_SSB;
+      //                sfn_c = SFN_C_EQ_SFN_SSB;
       n_c = get_ssb_slot(ssb_index);
       switch(ssb_index & 0x7){    //  ssb_index(i) mod 8
       case 0: 
@@ -546,7 +552,7 @@ int8_t nr_ue_decode_mib(
       //  38.213 Table 13-15
       AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n");
       //  PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
-//                sfn_c = SFN_C_EQ_SFN_SSB;
+      //                sfn_c = SFN_C_EQ_SFN_SSB;
       n_c = get_ssb_slot(ssb_index);
       switch(ssb_index & 0x3){    //  ssb_index(i) mod 4
       case 0: 
@@ -583,20 +589,13 @@ int8_t nr_ue_decode_mib(
   mac->type0_pdcch_ss_n_c = n_c;
         
   // fill in the elements in config request inside P5 message
-	    mac->phy_config.config_req.pbch_config.system_frame_number = frame;    //  after calculation
-	    mac->phy_config.config_req.pbch_config.subcarrier_spacing_common = mac->mib->subCarrierSpacingCommon;
-	    mac->phy_config.config_req.pbch_config.ssb_subcarrier_offset = ssb_subcarrier_offset;  //  after calculation
-	    mac->phy_config.config_req.pbch_config.dmrs_type_a_position = mac->mib->dmrs_TypeA_Position;
-#if (NR_RRC_VERSION >= MAKE_VERSION(15, 3, 0))
-	    mac->phy_config.config_req.pbch_config.pdcch_config_sib1 = (mac->mib->pdcch_ConfigSIB1.controlResourceSetZero) * 16 + (mac->mib->pdcch_ConfigSIB1.searchSpaceZero);
-#else
-	    mac->phy_config.config_req.pbch_config.pdcch_config_sib1 = mac->mib->pdcch_ConfigSIB1;
-#endif
-	    mac->phy_config.config_req.pbch_config.cell_barred = mac->mib->cellBarred;
-	    mac->phy_config.config_req.pbch_config.intra_frequency_reselection = mac->mib->intraFreqReselection;
-	    mac->phy_config.config_req.pbch_config.half_frame_bit = half_frame_bit;
-	    mac->phy_config.config_req.pbch_config.ssb_index = ssb_index;
-	    mac->phy_config.config_req.config_mask |= FAPI_NR_CONFIG_REQUEST_MASK_PBCH;
+  
+  //mac->phy_config.config_req.pbch_config.system_frame_number = frame;    //  after calculation
+  mac->phy_config.config_req.rf_config.dl_subcarrierspacing      = mac->mib->subCarrierSpacingCommon;
+  mac->phy_config.config_req.sch_config.ssb_subcarrier_offset    = ssb_subcarrier_offset;  //  after calculation
+  mac->phy_config.config_req.pdsch_config.dmrs_TypeA_Position    = mac->mib->dmrs_TypeA_Position;
+  mac->phy_config.config_req.pdcch_config.controlResourceSetZero = (mac->mib->pdcch_ConfigSIB1.controlResourceSetZero);
+  mac->phy_config.config_req.pdcch_config.searchSpaceZero        = mac->mib->pdcch_ConfigSIB1.searchSpaceZero;
 
   if(mac->if_module != NULL && mac->if_module->phy_config_request != NULL){
     mac->if_module->phy_config_request(&mac->phy_config);
@@ -709,371 +708,371 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
 // next four columns contain table 7.3.1.1.2-4: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder=disabled and maxRank = 2
 // next four columns contain table 7.3.1.1.2-5: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder= enabled, or if transformPrecoder= disabled and maxRank = 1
 uint8_t table_7_3_1_1_2_2_3_4_5[64][20] = {
-{1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0},
-{1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1},
-{1,  2,  1,  2,  1,  2,  1,  2,  1,  2,  1,  2,  2,  0,  2,  0,  1,  2,  0,  0},
-{1,  3,  1,  3,  1,  3,  1,  3,  1,  3,  1,  3,  1,  2,  0,  0,  1,  3,  0,  0},
-{2,  0,  2,  0,  2,  0,  1,  4,  1,  4,  0,  0,  1,  3,  0,  0,  1,  4,  0,  0},
-{2,  1,  2,  1,  2,  1,  1,  5,  1,  5,  0,  0,  1,  4,  0,  0,  1,  5,  0,  0},
-{2,  2,  2,  2,  2,  2,  1,  6,  1,  6,  0,  0,  1,  5,  0,  0,  0,  0,  0,  0},
-{2,  3,  2,  3,  2,  3,  1,  7,  1,  7,  0,  0,  2,  1,  0,  0,  0,  0,  0,  0},
-{2,  4,  2,  4,  2,  4,  1,  8,  1,  8,  0,  0,  2,  2,  0,  0,  0,  0,  0,  0},
-{2,  5,  2,  5,  2,  5,  1,  9,  1,  9,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{3,  0,  3,  0,  3,  0,  1,  10, 1,  10, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{4,  0,  4,  0,  4,  0,  1,  11, 1,  11, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  4,  1,  4,  0,  0,  1,  12, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  5,  1,  5,  0,  0,  1,  13, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  6,  1,  6,  0,  0,  1,  14, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  7,  1,  7,  0,  0,  1,  15, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  8,  1,  8,  0,  0,  1,  16, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  9,  1,  9,  0,  0,  1,  17, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  10, 1,  10, 0,  0,  1,  18, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  11, 1,  11, 0,  0,  1,  19, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  6,  2,  6,  0,  0,  1,  20, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  7,  2,  7,  0,  0,  1,  21, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  8,  2,  8,  0,  0,  1,  22, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  9,  2,  9,  0,  0,  1,  23, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  10, 2,  10, 0,  0,  1,  24, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  11, 2,  11, 0,  0,  1,  25, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  12, 2,  12, 0,  0,  1,  26, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  13, 2,  13, 0,  0,  1,  27, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{3,  1,  3,  1,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{3,  2,  3,  2,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{4,  1,  4,  1,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{4,  2,  4,  2,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  12, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  13, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  14, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  15, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  16, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  17, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  18, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  19, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  20, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  21, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  22, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  23, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  24, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  25, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  26, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{1,  27, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  14, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  15, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  16, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  17, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  18, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  19, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  20, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{2,  21, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{3,  3,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{3,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{3,  5,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{3,  6,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{4,  3,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{4,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
-{0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0}
+  {1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0,  1,  0},
+  {1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1,  1},
+  {1,  2,  1,  2,  1,  2,  1,  2,  1,  2,  1,  2,  2,  0,  2,  0,  1,  2,  0,  0},
+  {1,  3,  1,  3,  1,  3,  1,  3,  1,  3,  1,  3,  1,  2,  0,  0,  1,  3,  0,  0},
+  {2,  0,  2,  0,  2,  0,  1,  4,  1,  4,  0,  0,  1,  3,  0,  0,  1,  4,  0,  0},
+  {2,  1,  2,  1,  2,  1,  1,  5,  1,  5,  0,  0,  1,  4,  0,  0,  1,  5,  0,  0},
+  {2,  2,  2,  2,  2,  2,  1,  6,  1,  6,  0,  0,  1,  5,  0,  0,  0,  0,  0,  0},
+  {2,  3,  2,  3,  2,  3,  1,  7,  1,  7,  0,  0,  2,  1,  0,  0,  0,  0,  0,  0},
+  {2,  4,  2,  4,  2,  4,  1,  8,  1,  8,  0,  0,  2,  2,  0,  0,  0,  0,  0,  0},
+  {2,  5,  2,  5,  2,  5,  1,  9,  1,  9,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {3,  0,  3,  0,  3,  0,  1,  10, 1,  10, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {4,  0,  4,  0,  4,  0,  1,  11, 1,  11, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  4,  1,  4,  0,  0,  1,  12, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  5,  1,  5,  0,  0,  1,  13, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  6,  1,  6,  0,  0,  1,  14, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  7,  1,  7,  0,  0,  1,  15, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  8,  1,  8,  0,  0,  1,  16, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  9,  1,  9,  0,  0,  1,  17, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  10, 1,  10, 0,  0,  1,  18, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  11, 1,  11, 0,  0,  1,  19, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  6,  2,  6,  0,  0,  1,  20, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  7,  2,  7,  0,  0,  1,  21, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  8,  2,  8,  0,  0,  1,  22, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  9,  2,  9,  0,  0,  1,  23, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  10, 2,  10, 0,  0,  1,  24, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  11, 2,  11, 0,  0,  1,  25, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  12, 2,  12, 0,  0,  1,  26, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  13, 2,  13, 0,  0,  1,  27, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {3,  1,  3,  1,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {3,  2,  3,  2,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {4,  1,  4,  1,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {4,  2,  4,  2,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  12, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  13, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  14, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  15, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  16, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  17, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  18, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  19, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  20, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  21, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  22, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  23, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  24, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  25, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  26, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {1,  27, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  14, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  15, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  16, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  17, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  18, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  19, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  20, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {2,  21, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {3,  3,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {3,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {3,  5,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {3,  6,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {4,  3,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {4,  4,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0},
+  {0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0}
 };
 uint8_t table_7_3_1_1_2_12[14][3] = {
-{1,0,1},
-{1,1,1},
-{2,0,1},
-{2,1,1},
-{2,2,1},
-{2,3,1},
-{2,0,2},
-{2,1,2},
-{2,2,2},
-{2,3,2},
-{2,4,2},
-{2,5,2},
-{2,6,2},
-{2,7,2}
+  {1,0,1},
+  {1,1,1},
+  {2,0,1},
+  {2,1,1},
+  {2,2,1},
+  {2,3,1},
+  {2,0,2},
+  {2,1,2},
+  {2,2,2},
+  {2,3,2},
+  {2,4,2},
+  {2,5,2},
+  {2,6,2},
+  {2,7,2}
 };
 uint8_t table_7_3_1_1_2_13[10][4] = {
-{1,0,1,1},
-{2,0,1,1},
-{2,2,3,1},
-{2,0,2,1},
-{2,0,1,2},
-{2,2,3,2},
-{2,4,5,2},
-{2,6,7,2},
-{2,0,4,2},
-{2,2,6,2}
+  {1,0,1,1},
+  {2,0,1,1},
+  {2,2,3,1},
+  {2,0,2,1},
+  {2,0,1,2},
+  {2,2,3,2},
+  {2,4,5,2},
+  {2,6,7,2},
+  {2,0,4,2},
+  {2,2,6,2}
 };
 uint8_t table_7_3_1_1_2_14[3][5] = {
-{2,0,1,2,1},
-{2,0,1,4,2},
-{2,2,3,6,2}
+  {2,0,1,2,1},
+  {2,0,1,4,2},
+  {2,2,3,6,2}
 };
 uint8_t table_7_3_1_1_2_15[4][6] = {
-{2,0,1,2,3,1},
-{2,0,1,4,5,2},
-{2,2,3,6,7,2},
-{2,0,2,4,6,2}
+  {2,0,1,2,3,1},
+  {2,0,1,4,5,2},
+  {2,2,3,6,7,2},
+  {2,0,2,4,6,2}
 };
 uint8_t table_7_3_1_1_2_16[12][2] = {
-{1,0},
-{1,1},
-{2,0},
-{2,1},
-{2,2},
-{2,3},
-{3,0},
-{3,1},
-{3,2},
-{3,3},
-{3,4},
-{3,5}
+  {1,0},
+  {1,1},
+  {2,0},
+  {2,1},
+  {2,2},
+  {2,3},
+  {3,0},
+  {3,1},
+  {3,2},
+  {3,3},
+  {3,4},
+  {3,5}
 };
 uint8_t table_7_3_1_1_2_17[7][3] = {
-{1,0,1},
-{2,0,1},
-{2,2,3},
-{3,0,1},
-{3,2,3},
-{3,4,5},
-{2,0,2}
+  {1,0,1},
+  {2,0,1},
+  {2,2,3},
+  {3,0,1},
+  {3,2,3},
+  {3,4,5},
+  {2,0,2}
 };
 uint8_t table_7_3_1_1_2_18[3][4] = {
-{2,0,1,2},
-{3,0,1,2},
-{3,3,4,5}
+  {2,0,1,2},
+  {3,0,1,2},
+  {3,3,4,5}
 };
 uint8_t table_7_3_1_1_2_19[2][5] = {
-{2,0,1,2,3},
-{3,0,1,2,3}
+  {2,0,1,2,3},
+  {3,0,1,2,3}
 };
 uint8_t table_7_3_1_1_2_20[28][3] = {
-{1,0,1},
-{1,1,1},
-{2,0,1},
-{2,1,1},
-{2,2,1},
-{2,3,1},
-{3,0,1},
-{3,1,1},
-{3,2,1},
-{3,3,1},
-{3,4,1},
-{3,5,1},
-{3,0,2},
-{3,1,2},
-{3,2,2},
-{3,3,2},
-{3,4,2},
-{3,5,2},
-{3,6,2},
-{3,7,2},
-{3,8,2},
-{3,9,2},
-{3,10,2},
-{3,11,2},
-{1,0,2},
-{1,1,2},
-{1,6,2},
-{1,7,2}
+  {1,0,1},
+  {1,1,1},
+  {2,0,1},
+  {2,1,1},
+  {2,2,1},
+  {2,3,1},
+  {3,0,1},
+  {3,1,1},
+  {3,2,1},
+  {3,3,1},
+  {3,4,1},
+  {3,5,1},
+  {3,0,2},
+  {3,1,2},
+  {3,2,2},
+  {3,3,2},
+  {3,4,2},
+  {3,5,2},
+  {3,6,2},
+  {3,7,2},
+  {3,8,2},
+  {3,9,2},
+  {3,10,2},
+  {3,11,2},
+  {1,0,2},
+  {1,1,2},
+  {1,6,2},
+  {1,7,2}
 };
 uint8_t table_7_3_1_1_2_21[19][4] = {
-{1,0,1,1},
-{2,0,1,1},
-{2,2,3,1},
-{3,0,1,1},
-{3,2,3,1},
-{3,4,5,1},
-{2,0,2,1},
-{3,0,1,2},
-{3,2,3,2},
-{3,4,5,2},
-{3,6,7,2},
-{3,8,9,2},
-{3,10,11,2},
-{1,0,1,2},
-{1,6,7,2},
-{2,0,1,2},
-{2,2,3,2},
-{2,6,7,2},
-{2,8,9,2}
+  {1,0,1,1},
+  {2,0,1,1},
+  {2,2,3,1},
+  {3,0,1,1},
+  {3,2,3,1},
+  {3,4,5,1},
+  {2,0,2,1},
+  {3,0,1,2},
+  {3,2,3,2},
+  {3,4,5,2},
+  {3,6,7,2},
+  {3,8,9,2},
+  {3,10,11,2},
+  {1,0,1,2},
+  {1,6,7,2},
+  {2,0,1,2},
+  {2,2,3,2},
+  {2,6,7,2},
+  {2,8,9,2}
 };
 uint8_t table_7_3_1_1_2_22[6][5] = {
-{2,0,1,2,1},
-{3,0,1,2,1},
-{3,3,4,5,1},
-{3,0,1,6,2},
-{3,2,3,8,2},
-{3,4,5,10,2}
+  {2,0,1,2,1},
+  {3,0,1,2,1},
+  {3,3,4,5,1},
+  {3,0,1,6,2},
+  {3,2,3,8,2},
+  {3,4,5,10,2}
 };
 uint8_t table_7_3_1_1_2_23[5][6] = {
-{2,0,1,2,3,1},
-{3,0,1,2,3,1},
-{3,0,1,6,7,2},
-{3,2,3,8,9,2},
-{3,4,5,10,11,2}
+  {2,0,1,2,3,1},
+  {3,0,1,2,3,1},
+  {3,0,1,6,7,2},
+  {3,2,3,8,9,2},
+  {3,4,5,10,11,2}
 };
 uint8_t table_7_3_2_3_3_1[12][5] = {
-{1,0,0,0,0},
-{1,1,0,0,0},
-{1,0,1,0,0},
-{2,0,0,0,0},
-{2,1,0,0,0},
-{2,2,0,0,0},
-{2,3,0,0,0},
-{2,0,1,0,0},
-{2,2,3,0,0},
-{2,0,1,2,0},
-{2,0,1,2,3},
-{2,0,2,0,0}
+  {1,0,0,0,0},
+  {1,1,0,0,0},
+  {1,0,1,0,0},
+  {2,0,0,0,0},
+  {2,1,0,0,0},
+  {2,2,0,0,0},
+  {2,3,0,0,0},
+  {2,0,1,0,0},
+  {2,2,3,0,0},
+  {2,0,1,2,0},
+  {2,0,1,2,3},
+  {2,0,2,0,0}
 };
 uint8_t table_7_3_2_3_3_2_oneCodeword[31][6] = {
-{1,0,0,0,0,1},
-{1,1,0,0,0,1},
-{1,0,1,0,0,1},
-{2,0,0,0,0,1},
-{2,1,0,0,0,1},
-{2,2,0,0,0,1},
-{2,3,0,0,0,1},
-{2,0,1,0,0,1},
-{2,2,3,0,0,1},
-{2,0,1,2,0,1},
-{2,0,1,2,3,1},
-{2,0,2,0,0,1},
-{2,0,0,0,0,2},
-{2,1,0,0,0,2},
-{2,2,0,0,0,2},
-{2,3,0,0,0,2},
-{2,4,0,0,0,2},
-{2,5,0,0,0,2},
-{2,6,0,0,0,2},
-{2,7,0,0,0,2},
-{2,0,1,0,0,2},
-{2,2,3,0,0,2},
-{2,4,5,0,0,2},
-{2,6,7,0,0,2},
-{2,0,4,0,0,2},
-{2,2,6,0,0,2},
-{2,0,1,4,0,2},
-{2,2,3,6,0,2},
-{2,0,1,4,5,2},
-{2,2,3,6,7,2},
-{2,0,2,4,6,2}
+  {1,0,0,0,0,1},
+  {1,1,0,0,0,1},
+  {1,0,1,0,0,1},
+  {2,0,0,0,0,1},
+  {2,1,0,0,0,1},
+  {2,2,0,0,0,1},
+  {2,3,0,0,0,1},
+  {2,0,1,0,0,1},
+  {2,2,3,0,0,1},
+  {2,0,1,2,0,1},
+  {2,0,1,2,3,1},
+  {2,0,2,0,0,1},
+  {2,0,0,0,0,2},
+  {2,1,0,0,0,2},
+  {2,2,0,0,0,2},
+  {2,3,0,0,0,2},
+  {2,4,0,0,0,2},
+  {2,5,0,0,0,2},
+  {2,6,0,0,0,2},
+  {2,7,0,0,0,2},
+  {2,0,1,0,0,2},
+  {2,2,3,0,0,2},
+  {2,4,5,0,0,2},
+  {2,6,7,0,0,2},
+  {2,0,4,0,0,2},
+  {2,2,6,0,0,2},
+  {2,0,1,4,0,2},
+  {2,2,3,6,0,2},
+  {2,0,1,4,5,2},
+  {2,2,3,6,7,2},
+  {2,0,2,4,6,2}
 };
 uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = {
-{2,0,1,2,3,4,0,0,0,2},
-{2,0,1,2,3,4,6,0,0,2},
-{2,0,1,2,3,4,5,6,0,2},
-{2,0,1,2,3,4,5,6,7,2}
+  {2,0,1,2,3,4,0,0,0,2},
+  {2,0,1,2,3,4,6,0,0,2},
+  {2,0,1,2,3,4,5,6,0,2},
+  {2,0,1,2,3,4,5,6,7,2}
 };
 uint8_t table_7_3_2_3_3_3_oneCodeword[24][5] = {
-{1,0,0,0,0},
-{1,1,0,0,0},
-{1,0,1,0,0},
-{2,0,0,0,0},
-{2,1,0,0,0},
-{2,2,0,0,0},
-{2,3,0,0,0},
-{2,0,1,0,0},
-{2,2,3,0,0},
-{2,0,1,2,0},
-{2,0,1,2,3},
-{3,0,0,0,0},
-{3,1,0,0,0},
-{3,2,0,0,0},
-{3,3,0,0,0},
-{3,4,0,0,0},
-{3,5,0,0,0},
-{3,0,1,0,0},
-{3,2,3,0,0},
-{3,4,5,0,0},
-{3,0,1,2,0},
-{3,3,4,5,0},
-{3,0,1,2,3},
-{2,0,2,0,0}
+  {1,0,0,0,0},
+  {1,1,0,0,0},
+  {1,0,1,0,0},
+  {2,0,0,0,0},
+  {2,1,0,0,0},
+  {2,2,0,0,0},
+  {2,3,0,0,0},
+  {2,0,1,0,0},
+  {2,2,3,0,0},
+  {2,0,1,2,0},
+  {2,0,1,2,3},
+  {3,0,0,0,0},
+  {3,1,0,0,0},
+  {3,2,0,0,0},
+  {3,3,0,0,0},
+  {3,4,0,0,0},
+  {3,5,0,0,0},
+  {3,0,1,0,0},
+  {3,2,3,0,0},
+  {3,4,5,0,0},
+  {3,0,1,2,0},
+  {3,3,4,5,0},
+  {3,0,1,2,3},
+  {2,0,2,0,0}
 };
 uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = {
-{3,0,1,2,3,4,0},
-{3,0,1,2,3,4,5}
+  {3,0,1,2,3,4,0},
+  {3,0,1,2,3,4,5}
 };
 uint8_t table_7_3_2_3_3_4_oneCodeword[58][6] = {
-{1,0,0,0,0,1},
-{1,1,0,0,0,1},
-{1,0,1,0,0,1},
-{2,0,0,0,0,1},
-{2,1,0,0,0,1},
-{2,2,0,0,0,1},
-{2,3,0,0,0,1},
-{2,0,1,0,0,1},
-{2,2,3,0,0,1},
-{2,0,1,2,0,1},
-{2,0,1,2,3,1},
-{3,0,0,0,0,1},
-{3,1,0,0,0,1},
-{3,2,0,0,0,1},
-{3,3,0,0,0,1},
-{3,4,0,0,0,1},
-{3,5,0,0,0,1},
-{3,0,1,0,0,1},
-{3,2,3,0,0,1},
-{3,4,5,0,0,1},
-{3,0,1,2,0,1},
-{3,3,4,5,0,1},
-{3,0,1,2,3,1},
-{2,0,2,0,0,1},
-{3,0,0,0,0,2},
-{3,1,0,0,0,2},
-{3,2,0,0,0,2},
-{3,3,0,0,0,2},
-{3,4,0,0,0,2},
-{3,5,0,0,0,2},
-{3,6,0,0,0,2},
-{3,7,0,0,0,2},
-{3,8,0,0,0,2},
-{3,9,0,0,0,2},
-{3,10,0,0,0,2},
-{3,11,0,0,0,2},
-{3,0,1,0,0,2},
-{3,2,3,0,0,2},
-{3,4,5,0,0,2},
-{3,6,7,0,0,2},
-{3,8,9,0,0,2},
-{3,10,11,0,0,2},
-{3,0,1,6,0,2},
-{3,2,3,8,0,2},
-{3,4,5,10,0,2},
-{3,0,1,6,7,2},
-{3,2,3,8,9,2},
-{3,4,5,10,11,2},
-{1,0,0,0,0,2},
-{1,1,0,0,0,2},
-{1,6,0,0,0,2},
-{1,7,0,0,0,2},
-{1,0,1,0,0,2},
-{1,6,7,0,0,2},
-{2,0,1,0,0,2},
-{2,2,3,0,0,2},
-{2,6,7,0,0,2},
-{2,8,9,0,0,2}
+  {1,0,0,0,0,1},
+  {1,1,0,0,0,1},
+  {1,0,1,0,0,1},
+  {2,0,0,0,0,1},
+  {2,1,0,0,0,1},
+  {2,2,0,0,0,1},
+  {2,3,0,0,0,1},
+  {2,0,1,0,0,1},
+  {2,2,3,0,0,1},
+  {2,0,1,2,0,1},
+  {2,0,1,2,3,1},
+  {3,0,0,0,0,1},
+  {3,1,0,0,0,1},
+  {3,2,0,0,0,1},
+  {3,3,0,0,0,1},
+  {3,4,0,0,0,1},
+  {3,5,0,0,0,1},
+  {3,0,1,0,0,1},
+  {3,2,3,0,0,1},
+  {3,4,5,0,0,1},
+  {3,0,1,2,0,1},
+  {3,3,4,5,0,1},
+  {3,0,1,2,3,1},
+  {2,0,2,0,0,1},
+  {3,0,0,0,0,2},
+  {3,1,0,0,0,2},
+  {3,2,0,0,0,2},
+  {3,3,0,0,0,2},
+  {3,4,0,0,0,2},
+  {3,5,0,0,0,2},
+  {3,6,0,0,0,2},
+  {3,7,0,0,0,2},
+  {3,8,0,0,0,2},
+  {3,9,0,0,0,2},
+  {3,10,0,0,0,2},
+  {3,11,0,0,0,2},
+  {3,0,1,0,0,2},
+  {3,2,3,0,0,2},
+  {3,4,5,0,0,2},
+  {3,6,7,0,0,2},
+  {3,8,9,0,0,2},
+  {3,10,11,0,0,2},
+  {3,0,1,6,0,2},
+  {3,2,3,8,0,2},
+  {3,4,5,10,0,2},
+  {3,0,1,6,7,2},
+  {3,2,3,8,9,2},
+  {3,4,5,10,11,2},
+  {1,0,0,0,0,2},
+  {1,1,0,0,0,2},
+  {1,6,0,0,0,2},
+  {1,7,0,0,0,2},
+  {1,0,1,0,0,2},
+  {1,6,7,0,0,2},
+  {2,0,1,0,0,2},
+  {2,2,3,0,0,2},
+  {2,6,7,0,0,2},
+  {2,8,9,0,0,2}
 };
 uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = {
-{3,0,1,2,3,4,0,0,0,1},
-{3,0,1,2,3,4,5,0,0,1},
-{2,0,1,2,3,6,0,0,0,2},
-{2,0,1,2,3,6,8,0,0,2},
-{2,0,1,2,3,6,7,8,0,2},
-{2,0,1,2,3,6,7,8,9,2}
+  {3,0,1,2,3,4,0,0,0,1},
+  {3,0,1,2,3,4,5,0,0,1},
+  {2,0,1,2,3,6,0,0,0,2},
+  {2,0,1,2,3,6,8,0,0,2},
+  {2,0,1,2,3,6,7,8,0,2},
+  {2,0,1,2,3,6,7,8,9,2}
 };
 int8_t nr_ue_process_dci_freq_dom_resource_assignment(
-  fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
+						      fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu,
 						      fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
 						      uint16_t n_RB_ULBWP,
 						      uint16_t n_RB_DLBWP,
 						      uint16_t riv
-){
+						      ){
   uint16_t l_RB;
   uint16_t start_RB;
   uint16_t tmp_RIV;
 
-/*
+  /*
    * TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink)
    * when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used
    */
@@ -1100,7 +1099,7 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(
     dlsch_config_pdu->start_rb = start_RB;
   }
   if(ulsch_config_pdu != NULL){
-/*
+    /*
      * TS 38.214 subclause 6.1.2.2 Resource allocation in frequency domain (uplink)
      */
     /*
@@ -1128,11 +1127,11 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(
 }
 
 int8_t nr_ue_process_dci_time_dom_resource_assignment(
-  fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
+						      fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu,
 						      fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
 						      uint8_t time_domain_ind,
 						      long dmrs_typeA_pos //0=pos2,1=pos3
-){
+						      ){
   uint8_t k_offset=0;
   uint8_t sliv_S=0;
   uint8_t sliv_L=0;
@@ -1248,7 +1247,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
     {j+3,0,10}  // row index 16
     };*/
 
-/*
+  /*
    * TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink)
    */
   if(dlsch_config_pdu != NULL){
@@ -1299,7 +1298,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
 
   switch(dci_format){
   case format0_0:
-/*
+    /*
      *  with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI
      *    0  IDENTIFIER_DCI_FORMATS:
      *    10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
@@ -1315,16 +1314,17 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
      */
     ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
     ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
-            fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
+    fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
     /* IDENTIFIER_DCI_FORMATS */
     /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
     nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
     /* TIME_DOM_RESOURCE_ASSIGNMENT */
     nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
     /* FREQ_HOPPING_FLAG */
+    /*
     if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
 	(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
-              ulsch_config_pdu_0_0->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;
+	ulsch_config_pdu_0_0->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;*/
     /* MCS */
     ulsch_config_pdu_0_0->mcs = dci->mcs;
     /* NDI */
@@ -1357,7 +1357,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     break;
 
   case format0_1:
-/*
+    /*
      *  with CRC scrambled by C-RNTI or CS-RNTI or SP-CSI-RNTI or new-RNTI
      *    0  IDENTIFIER_DCI_FORMATS:
      *    1  CARRIER_IND
@@ -1387,7 +1387,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
      */
     ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
     ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
-            fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_1 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
+    fapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_config_pdu_0_1 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
     /* IDENTIFIER_DCI_FORMATS */
     /* CARRIER_IND */
     /* SUL_IND_0_1 */
@@ -1398,9 +1398,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     /* TIME_DOM_RESOURCE_ASSIGNMENT */
     nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
     /* FREQ_HOPPING_FLAG */
+    /*
     if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
 	(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
-              ulsch_config_pdu_0_1->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;
+	ulsch_config_pdu_0_1->pusch_freq_hopping = (dci->freq_hopping_flag == 0)? pusch_freq_hopping_disabled:pusch_freq_hopping_enabled;*/
     /* MCS */
     ulsch_config_pdu_0_1->mcs = dci->mcs;
     /* NDI */
@@ -1432,6 +1433,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     /* SRS_RESOURCE_IND */
     //FIXME!!
     /* PRECOD_NBR_LAYERS */
+    /*
     if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.tx_config == tx_config_nonCodebook));
     // 0 bits if the higher layer parameter txConfig = nonCodeBook
     if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.tx_config == tx_config_codebook)){
@@ -1502,8 +1504,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
 	}
       }
     }
+    */
     /* ANTENNA_PORTS */
+    
     uint8_t rank=0; // We need to initialize rank FIXME!!!
+    /*
     if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) &&
 	(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.dmrs_type == 1) &&
 	(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.max_length == 1)) { // tables 7.3.1.1.2-6
@@ -1629,6 +1634,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
 	ulsch_config_pdu_0_1->n_front_load_symb = table_7_3_1_1_2_23[dci->antenna_ports][5];
       }
     }
+    */
     /* SRS_REQUEST */
     // if SUL is supported in the cell, there is an additional bit in thsi field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!!
     ulsch_config_pdu_0_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212
@@ -1637,6 +1643,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     /* CBGTI */
     ulsch_config_pdu_0_1->maxCodeBlockGroupsPerTransportBlock = dci->cbgti;
     /* PTRS_DMRS */
+    /*
     if (((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_disabled) &&
 	 (mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.dmrs_ul_for_pusch_mapping_type_a.ptrs_uplink_config == 0)) ||
 	((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.transform_precoder == transform_precoder_enabled) &&
@@ -1644,6 +1651,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     } else {
       ulsch_config_pdu_0_1->ptrs_dmrs_association_port = dci->ptrs_dmrs;
     }
+    */
     /* BETA_OFFSET_IND */
     // Table 9.3-3 in [5, TS 38.213]
     ulsch_config_pdu_0_1->beta_offset_ind = dci->beta_offset_ind;
@@ -1657,7 +1665,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     break;
 
   case format1_0: 
-/*
+    /*
      *  with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI
      *    0  IDENTIFIER_DCI_FORMATS:
      *    11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
@@ -1784,7 +1792,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     break;
 
   case format1_1:        
-/*
+    /*
      *  with CRC scrambled by C-RNTI or CS-RNTI or new-RNTI
      *    0  IDENTIFIER_DCI_FORMATS:
      *    1  CARRIER_IND:
@@ -1825,8 +1833,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     /* TIME_DOM_RESOURCE_ASSIGNMENT */
     nr_ue_process_dci_time_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
     /* VRB_TO_PRB_MAPPING */
+    /*
     if (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.resource_allocation != 0)
       dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
+    */
     /* PRB_BUNDLING_SIZE_IND */
     dlsch_config_pdu_1_1->prb_bundling_size_ind = dci->prb_bundling_size_ind;
     /* RATE_MATCHING_IND */
@@ -1866,9 +1876,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     if (dci->pucch_resource_ind == 7) dlsch_config_pdu_1_1->pucch_resource_id = 0; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!!
     /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */
     // according to TS 38.213 Table 9.2.3-1
-            dlsch_config_pdu_1_1-> pdsch_to_harq_feedback_time_ind = mac->phy_config.config_req.ul_bwp_dedicated.pucch_config_dedicated.dl_data_to_ul_ack[dci->pdsch_to_harq_feedback_time_ind];
+    /*
+      dlsch_config_pdu_1_1-> pdsch_to_harq_feedback_time_ind = mac->phy_config.config_req.ul_bwp_dedicated.pucch_config_dedicated.dl_data_to_ul_ack[dci->pdsch_to_harq_feedback_time_ind];*/
     /* ANTENNA_PORTS */
     uint8_t n_codewords = 1; // FIXME!!!
+    /*
     if ((mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.dmrs_type == 1) &&
 	(mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.dmrs_dl_for_pdsch_mapping_type_a.max_length == 1)){
       // Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
@@ -1946,6 +1958,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
 	dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports][9];
       }
     }
+    */
     /* TCI */
     if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){
       // 0 bit if higher layer parameter tci-PresentInDCI is not enabled

openair2/LAYER2/NR_MAC_gNB/config.c

@@ -58,6 +58,7 @@ void config_common(int Mod_idP,
   int mu = 1;
 
 
+
   cfg->sch_config.physical_cell_id.value = *scc->physCellId;
   cfg->sch_config.ssb_scg_position_in_burst.value = scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0];
  

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -348,8 +348,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
                                     *cfg))
           nr_schedule_uss_dlsch_phytest(module_idP, frameP, slotP);
 
-      rnti = UE_RNTI(module_idP, i);
-      CC_id = UE_PCCID(module_idP, i);
+      
+      rnti = 0;//UE_RNTI(module_idP, i);
+      CC_id = 0;//UE_PCCID(module_idP, i);
       //int spf = get_spf(cfg);
   
       if (((frameP&127) == 0) && (slotP == 0)) {
@@ -388,7 +389,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
         if(RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer >=
           RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer_thres) {
           RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer = 0;
-        
+	  /*
           for (int ue_id_l = 0; ue_id_l < MAX_MOBILES_PER_GNB; ue_id_l++) {
             if (reestablish_rnti_map[ue_id_l][0] == rnti) {
             // clear currentC-RNTI from map
@@ -396,7 +397,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
             reestablish_rnti_map[ue_id_l][1] = 0;
             break;
             }
-          }
+	    }*/
       
           // Note: This should not be done in the MAC!
           for (int ii=0; ii<MAX_MOBILES_PER_GNB; ii++) {
@@ -431,15 +432,16 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
               }
             }
           }
-          rrc_mac_remove_ue(module_idP,rnti);
+	  //          rrc_mac_remove_ue(module_idP,rnti);
         }
       } //END if (RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer > 0)
+
     } //END if (UE_list->active[i])
   } //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
   
   PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frameP, slotP,module_idP);
   
-  pdcp_run(&ctxt);
+  //  pdcp_run(&ctxt);
 
   //rrc_rx_tx(&ctxt, CC_id);
 

openair2/NR_PHY_INTERFACE/NR_IF_Module.c

@@ -60,6 +60,7 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
     AssertFatal(UL_info->rach_ind.rach_indication_body.number_of_preambles==1,"More than 1 preamble not supported\n");
     UL_info->rach_ind.rach_indication_body.number_of_preambles=0;
     LOG_D(MAC,"UL_info[Frame %d, Slot %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->slot, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf));
+    /*
     initiate_ra_proc(UL_info->module_id,
          UL_info->CC_id,
          NFAPI_SFNSF2SFN(UL_info->rach_ind.sfn_sf),
@@ -71,51 +72,31 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
          ,0
 #endif
          );
+    */
   }
 
-#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
-  if (UL_info->rach_ind_br.rach_indication_body.number_of_preambles>0) {
-
-    AssertFatal(UL_info->rach_ind_br.rach_indication_body.number_of_preambles<5,"More than 4 preambles not supported\n");
-    for (i=0;i<UL_info->rach_ind_br.rach_indication_body.number_of_preambles;i++) {
-      AssertFatal(UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type>0,
-      "Got regular PRACH preamble, not BL/CE\n");
-      LOG_D(MAC,"Frame %d, Slot %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->slot,
-      UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type-1);
-      initiate_ra_proc(UL_info->module_id,
-           UL_info->CC_id,
-           UL_info->frame,
-           UL_info->slot,
-           UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.preamble,
-           UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.timing_advance,
-           UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.rnti,
-           UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type);
-    }
-    UL_info->rach_ind_br.rach_indication_body.number_of_preambles=0;
-  }
-#endif
 }
 
 void handle_nr_sr(NR_UL_IND_t *UL_info) {
 
-  int i;
 
   if (nfapi_mode == 1)  // PNF
   {
     if (UL_info->sr_ind.sr_indication_body.number_of_srs>0)
     {
-      oai_nfapi_sr_indication(&UL_info->sr_ind);
+      //      oai_nfapi_sr_indication(&UL_info->sr_ind);
     }
   }
   else
   {
-    for (i=0;i<UL_info->sr_ind.sr_indication_body.number_of_srs;i++)
+    /*
+    for (int i=0;i<UL_info->sr_ind.sr_indication_body.number_of_srs;i++)
       SR_indication(UL_info->module_id,
           UL_info->CC_id,
           UL_info->frame,
           UL_info->slot,
           UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].rx_ue_information.rnti,
-          UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].ul_cqi_information.ul_cqi);
+          UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].ul_cqi_information.ul_cqi);*/
   }
 
   UL_info->sr_ind.sr_indication_body.number_of_srs=0;
@@ -123,7 +104,6 @@ void handle_nr_sr(NR_UL_IND_t *UL_info) {
 
 void handle_nr_cqi(NR_UL_IND_t *UL_info) {
 
-  int i;
 
   if (nfapi_mode == 1)
   {
@@ -136,14 +116,15 @@ void handle_nr_cqi(NR_UL_IND_t *UL_info) {
       ind.sfn_sf = UL_info->frame<<4 | UL_info->slot;
       ind.cqi_indication_body = UL_info->cqi_ind;
 
-      oai_nfapi_cqi_indication(&ind);
+      //      oai_nfapi_cqi_indication(&ind);
 
       UL_info->cqi_ind.number_of_cqis=0;
     }
   }
   else
   {
-    for (i=0;i<UL_info->cqi_ind.number_of_cqis;i++) 
+    /*
+    for (int i=0;i<UL_info->cqi_ind.number_of_cqis;i++) 
       cqi_indication(UL_info->module_id,
           UL_info->CC_id,
           UL_info->frame,
@@ -152,44 +133,43 @@ void handle_nr_cqi(NR_UL_IND_t *UL_info) {
           &UL_info->cqi_ind.cqi_pdu_list[i].cqi_indication_rel9,
           UL_info->cqi_ind.cqi_raw_pdu_list[i].pdu,
           &UL_info->cqi_ind.cqi_pdu_list[i].ul_cqi_information);
-
+    */
     UL_info->cqi_ind.number_of_cqis=0;
   }
 }
 
 void handle_nr_harq(NR_UL_IND_t *UL_info) {
 
-  int i;
 
   if (nfapi_mode == 1 && UL_info->harq_ind.harq_indication_body.number_of_harqs>0) // PNF
   {
     //LOG_D(PHY, "UL_info->harq_ind.harq_indication_body.number_of_harqs:%d Send to VNF\n", UL_info->harq_ind.harq_indication_body.number_of_harqs);
 
-    int retval = oai_nfapi_harq_indication(&UL_info->harq_ind);
+    /*    int retval = oai_nfapi_harq_indication(&UL_info->harq_ind);
 
     if (retval!=0)
     {
       LOG_E(PHY, "Failed to encode NFAPI HARQ_IND retval:%d\n", retval);
     }
-
+    */
     UL_info->harq_ind.harq_indication_body.number_of_harqs = 0;
   }
   else
   {
-    for (i=0;i<UL_info->harq_ind.harq_indication_body.number_of_harqs;i++)
+    /*
+    for (int i=0;i<UL_info->harq_ind.harq_indication_body.number_of_harqs;i++)
       harq_indication(UL_info->module_id,
           UL_info->CC_id,
           NFAPI_SFNSF2SFN(UL_info->harq_ind.sfn_sf),
           NFAPI_SFNSF2SF(UL_info->harq_ind.sfn_sf),
           &UL_info->harq_ind.harq_indication_body.harq_pdu_list[i]);
-
+    */
     UL_info->harq_ind.harq_indication_body.number_of_harqs=0;
   }
 }
 
 void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
 
-  int i,j;
 
   if(nfapi_mode == 1)
   {
@@ -197,7 +177,7 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
     {
       //LOG_D(PHY,"UL_info->crc_ind.crc_indication_body.number_of_crcs:%d CRC_IND:SFN/SF:%d\n", UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf));
 
-      oai_nfapi_crc_indication(&UL_info->crc_ind);
+      //      oai_nfapi_crc_indication(&UL_info->crc_ind);
 
       UL_info->crc_ind.crc_indication_body.number_of_crcs = 0;
     }
@@ -205,15 +185,16 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
     if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0)
     {
       //LOG_D(PHY,"UL_info->rx_ind.number_of_pdus:%d RX_IND:SFN/SF:%d\n", UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf));
-      oai_nfapi_rx_ind(&UL_info->rx_ind);
+      //      oai_nfapi_rx_ind(&UL_info->rx_ind);
       UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
     }
   }
   else
   {
+    
     if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->crc_ind.crc_indication_body.number_of_crcs>0) {
-      for (i=0;i<UL_info->rx_ind.rx_indication_body.number_of_pdus;i++) {
-        for (j=0;j<UL_info->crc_ind.crc_indication_body.number_of_crcs;j++) {
+      for (int i=0;i<UL_info->rx_ind.rx_indication_body.number_of_pdus;i++) {
+        for (int j=0;j<UL_info->crc_ind.crc_indication_body.number_of_crcs;j++) {
           // find crc_indication j corresponding rx_indication i
           LOG_D(PHY,"UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].rx_ue_information.rnti:%04x UL_info->rx_ind.rx_indication_body.rx_pdu_list[%d].rx_ue_information.rnti:%04x\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].rx_ue_information.rnti, i, UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti);
           if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].rx_ue_information.rnti ==
@@ -221,6 +202,7 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
             LOG_D(PHY, "UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].crc_indication_rel8.crc_flag:%d\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag);
             if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication
               LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->slot);
+	      /*
               rx_sdu(UL_info->module_id,
                   UL_info->CC_id,
                   NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
@@ -230,9 +212,11 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
                   UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
                   UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
                   UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
+	      */
             }
             else {
               LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->slot);
+	      /*
               rx_sdu(UL_info->module_id,
                   UL_info->CC_id,
                   NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
@@ -242,6 +226,7 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
                   UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
                   UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
                   UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
+	      */
             }
             break;
           } //if (UL_info->crc_ind.crc_pdu_list[j].rx_ue_information.rnti ==

openair2/RRC/NR_UE/rrc_UE.c

@@ -339,7 +339,7 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
       //    (void *)&bcch_message->message.choice.mib,
       //    sizeof(NR_MIB_t) );
       
-      nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL, NULL, NULL);
+      nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL,NULL, NULL, NULL);
     }
     
     return 0;