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OpenXG-RAN
Commit a491fbb1 authored by Raymond Knopp's avatar Raymond Knopp
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git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5493 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent 752cb8a7
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Showing with 1098 additions and 1195 deletions
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.h → targets/ARCH/COMMON/common_lib.h
View file @ a491fbb1
/** usrp_lib.h
/** common_lib.h
*
* Author: HongliangXU : hong-liang-xu@agilent.com
*/
#ifndef USRP_LIB_H
#define USRP_LIB_H
#ifndef COMMON_LIB_H
#define COMMON_LIB_H
#include <stdint.h>
typedef int64_t openair0_timestamp;
typedef struct openair0_device_t openair0_device;
/* structrue holds the parameters to configure USRP devices
*/
typedef enum {
max_gain=0,med_gain,byp_gain
} rx_gain_t;
typedef struct {
/* the sample rate for both transmit and receive. */
double sample_rate;
......@@ -17,13 +24,15 @@ typedef struct {
/* number of TX channels (=TX antennas) */
int tx_num_channels;
/* center frequency in Hz for RX */
double rx_freq;
double rx_freq[4];
/* center frequency in Hz for TX */
double tx_freq;
double tx_freq[4];
/* mode for rxgain (ExpressMIMO2)*/
rx_gain_t rxg_mode[4];
/* gain for RX in dB */
double rx_gain;
double rx_gain[4];
/* gain for TX in dB */
double tx_gain;
double tx_gain[4];
/* RX bandwidth in Hz */
double rx_bw;
/* TX bandwidth in Hz */
......@@ -65,6 +74,8 @@ extern "C"
/* return 0 if OK, < 0 if error */
int openair0_device_init(openair0_device* device, openair0_config_t *openair0_cfg);
}
#else
int openair0_device_init(openair0_device* device, openair0_config_t *openair0_cfg);
#endif
#endif // USRP_LIB_H
#endif // COMMON_LIB_H
targets/ARCH/EXMIMO/USERSPACE/LIB/openair0_lib.c
View file @ a491fbb1
......@@ -16,7 +16,8 @@
#include "openair0_lib.h"
#include "openair_device.h"
#include "common_lib.h"
#define max(a,b) ((a)>(b) ? (a) : (b))
exmimo_pci_interface_bot_virtual_t openair0_exmimo_pci[MAX_CARDS]; // contains userspace pointers for each card
char *bigshm_top[MAX_CARDS] = INIT_ZEROS;
......@@ -42,7 +43,8 @@ int openair0_open(void)
int card;
int ant;
int openair0_num_antennas[4];
PAGE_SHIFT = log2_int( sysconf( _SC_PAGESIZE ) );
if ((openair0_fd = open("/dev/openair0", O_RDWR,0)) <0)
......@@ -187,3 +189,93 @@ int openair0_stop_without_reset(int card)
{
return ioctl(openair0_fd, openair_STOP_WITHOUT_RESET, card);
}
static exmimo_config_t *p_exmimo_config;
static exmimo_id_t *p_exmimo_id;
#define MY_RF_MODE (RXEN + TXEN + TXLPFNORM + TXLPFEN + TXLPF25 + RXLPFNORM + RXLPFEN + RXLPF25 + LNA1ON +LNAMax + RFBBNORM + DMAMODE_RX + DMAMODE_TX)
#define RF_MODE_BASE (TXLPFNORM + TXLPFEN + TXLPF25 + RXLPFNORM + RXLPFEN + RXLPF25 + LNA1ON +LNAMax + RFBBNORM)
int openair0_device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
// Initialize card
int ret;
int ant;
ret = openair0_open();
if ( ret != 0 ) {
if (ret == -1)
printf("Error opening /dev/openair0");
if (ret == -2)
printf("Error mapping bigshm");
if (ret == -3)
printf("Error mapping RX or TX buffer");
return(ret);
}
printf ("Detected %d number of cards, %d number of antennas.\n", openair0_num_detected_cards, openair0_num_antennas[0]);
p_exmimo_config = openair0_exmimo_pci[0].exmimo_config_ptr;
p_exmimo_id = openair0_exmimo_pci[0].exmimo_id_ptr;
printf("Card %d: ExpressMIMO %d, HW Rev %d, SW Rev 0x%d\n", 0, p_exmimo_id->board_exmimoversion, p_exmimo_id->board_hwrev, p_exmimo_id->board_swrev);
// check if the software matches firmware
if (p_exmimo_id->board_swrev!=BOARD_SWREV_CNTL2) {
printf("Software revision %d and firmware revision %d do not match. Please update either the firmware or the software!\n",BOARD_SWREV_CNTL2,p_exmimo_id->board_swrev);
exit(-1);
}
if (p_exmimo_id->board_swrev>=9)
p_exmimo_config->framing.eNB_flag = 0;
else
p_exmimo_config->framing.eNB_flag = 1;//!UE_flag;
p_exmimo_config->framing.tdd_config = DUPLEXMODE_FDD + TXRXSWITCH_LSB;
#if (BOARD_SWREV_CNTL2>=0x0A)
for (ant=0; ant<4; ant++)
p_exmimo_config->framing.resampling_factor[ant] = 2;
#else
p_exmimo_config->framing.resampling_factor = 2;
#endif
for (ant=0;ant<max(openair0_cfg->tx_num_channels,openair0_cfg->rx_num_channels);ant++)
p_exmimo_config->rf.rf_mode[ant] = RF_MODE_BASE;
for (ant=0;ant<openair0_cfg->tx_num_channels;ant++)
p_exmimo_config->rf.rf_mode[ant] += (TXEN + DMAMODE_TX);
for (ant=0;ant<openair0_cfg->rx_num_channels;ant++) {
p_exmimo_config->rf.rf_mode[ant] += (RXEN + DMAMODE_RX);
switch (openair0_cfg->rxg_mode[ant]) {
default:
case max_gain:
p_exmimo_config->rf.rf_mode[ant] = (p_exmimo_config->rf.rf_mode[ant]&(~LNAGAINMASK))|LNAMax;
break;
case med_gain:
p_exmimo_config->rf.rf_mode[ant] = (p_exmimo_config->rf.rf_mode[ant]&(~LNAGAINMASK))|LNAMed;
break;
case byp_gain:
p_exmimo_config->rf.rf_mode[ant] = (p_exmimo_config->rf.rf_mode[ant]&(~LNAGAINMASK))|LNAByp;
break;
}
}
for (ant=max(openair0_cfg->tx_num_channels,openair0_cfg->rx_num_channels);ant<4;ant++) {
p_exmimo_config->rf.rf_mode[ant] = 0;
}
for (ant = 0; ant<openair0_cfg->rx_num_channels; ant++) {
p_exmimo_config->rf.do_autocal[ant] = 1;
p_exmimo_config->rf.rf_freq_rx[ant] = (unsigned int)openair0_cfg->rx_freq[ant];
p_exmimo_config->rf.tx_gain[ant][0] = (unsigned int)openair0_cfg->rx_gain;
}
for (ant = 0; ant<openair0_cfg->tx_num_channels; ant++) {
p_exmimo_config->rf.do_autocal[ant] = 1;
p_exmimo_config->rf.rf_freq_tx[ant] = (unsigned int)openair0_cfg->tx_freq[ant];
p_exmimo_config->rf.tx_gain[ant][0] = (unsigned int)openair0_cfg->tx_gain;
}
}
unsigned int *openair0_daq_cnt() {
return((unsigned int *)openair0_exmimo_pci[0].rxcnt_ptr[0]);
}
targets/ARCH/EXMIMO/USERSPACE/LIB/openair0_lib.h
View file @ a491fbb1
......@@ -12,6 +12,7 @@
#include "pcie_interface.h"
#include "openair_device.h"
#include "common_lib.h"
// Use this to access shared memory (configuration structures, adc/dac data buffers, ...)
// contains userspace pointers
......@@ -53,5 +54,7 @@ int openair0_stop(int card);
// return 0 on success
int openair0_stop_without_reset(int card);
// return the DAQ block counter
unsigned int *openair0_daq_cnt();
#endif
targets/ARCH/USRP/USERSPACE/LIB/Makefile.inc
View file @ a491fbb1
USRP_OBJ += $(OPENAIR_TARGETS)/ARCH/USRP/USERSPACE/LIB/usrp_lib.o
USRP_FILE_OBJ += $(OPENAIR_TARGETS)/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
USRP_CFLAGS += -I$(OPENAIR_TARGETS)/ARCH/USRP/USERSPACE/LIB/
USRP_CFLAGS += -I$(OPENAIR_TARGETS)/ARCH/USRP/USERSPACE/LIB/ -I$(OPENAIR_TARGETS)/COMMON
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
View file @ a491fbb1
......@@ -16,7 +16,7 @@
#include <complex>
#include <fstream>
#include <cmath>
#include "usrp_lib.h"
#include "common_lib.h"
typedef struct
{
......
targets/RT/USER/Makefile
View file @ a491fbb1
......@@ -18,12 +18,13 @@ ifeq "$(GCCVERSION)" "4.6.1"
endif
CFLAGS += -O2
CFLAGS += -DDRIVER2013 -I$(OPENAIR_TARGETS)/ARCH/EXMIMO/USERSPACE/LIB/ -I$(OPENAIR_TARGETS)/ARCH/EXMIMO/DEFS -DENABLE_VCD_FIFO
CFLAGS += -DDRIVER2013 -I$(OPENAIR_TARGETS)/ARCH/COMMON -I$(OPENAIR_TARGETS)/ARCH/EXMIMO/USERSPACE/LIB/ -I$(OPENAIR_TARGETS)/ARCH/EXMIMO/DEFS -DENABLE_VCD_FIFO
ifdef DEBUG
CFLAGS += -g -ggdb
endif
SRC = synctest.c condtest.c #lte-softmodem.c
ifndef RTAI
RTAI=1
endif
......@@ -55,24 +56,14 @@ endif
ifeq ($(RTAI),1)
CFLAGS += -DENABLE_RTAI_CLOCK
CFLAGS += -DCONFIG_RTAI_LXRT_INLINE #remend the RTAI warning
RTAI_OBJ = sched_dlsch.o sched_ulsch.o sched_rx_pdsch.o rt_wrapper.o
ifeq ($(USRP),1)
RTAI_OBJ += lte-softmodem-usrp.o
endif
RTAI_OBJ = sched_dlsch.o sched_rx_pdsch.o rt_wrapper.o
else #RTAI
CFLAGS += -DENABLE_USE_CPU_EXECUTION_TIME
OBJ += sched_dlsch.o sched_ulsch.o sched_rx_pdsch.o rt_wrapper.o
ifeq ($(USRP),1)
OBJ += lte-softmodem-usrp.o
endif
OBJ += sched_dlsch.o sched_rx_pdsch.o rt_wrapper.o
endif
OBJ += $(OPENAIR1_DIR)/SIMULATION/TOOLS/taus.o $(OPENAIR_TARGETS)/SIMU/USER/init_lte.o #$(OPENAIR_TARGETS)/ARCH/EXMIMO/USERSPACE/LIB/openair0_lib.o
ifeq ($(USRP),1)
include $(OPENAIR_TARGETS)/ARCH/USRP/USERSPACE/LIB/Makefile.inc
endif
OBJ += $(OPENAIR_TARGETS)/ARCH/EXMIMO/USERSPACE/LIB/openair0_lib.o $(OPENAIR_TARGETS)/ARCH/EXMIMO/USERSPACE/LIB/gain_control.o
CFLAGS += -DDRIVER2013 -I$(OPENAIR_TARGETS)/ARCH/EXMIMO/USERSPACE/LIB/ -I$(OPENAIR_TARGETS)/ARCH/EXMIMO/DEFS -DENABLE_VCD_FIFO
......@@ -94,6 +85,14 @@ include $(OPENAIR2_DIR)/RRC/NAS/Makefile.inc
include $(OPENAIR2_DIR)/ENB_APP/Makefile.inc
include $(OPENAIR3_DIR)/RAL-LTE/Makefile.inc
ifeq ($(USRP),1)
include $(OPENAIR_TARGETS)/ARCH/USRP/USERSPACE/LIB/Makefile.inc
CFLAGS += -I/opt/uhd/include -L/opt/uhd/lib -luhd -lpthread -lstdc++
CFLAGS += -DUSRP
LDFLAGS += -L/opt/uhd/lib -luhd -lpthread -lstdc++
endif
OBJ += $(ENB_APP_OBJS)
ifeq ($(RTAI),1)
......@@ -119,6 +118,8 @@ endif
RTAI_OBJ += $(UTILS_OBJS)
ifdef ENABLE_ITTI
CFLAGS += -DEXMIMO_IOT
endif
......@@ -205,8 +206,12 @@ $(LFDS_LIB):
@if [ ! -d $(LFDS_OBJ_DIR)/obj ]; then mkdir -p $(LFDS_OBJ_DIR)/obj; fi;
$(MAKE) -C $(LFDS_DIR) -f makefile.linux OUTDIR=$(LFDS_OBJ_DIR)
$(USRP_OBJ):$(USRP_FILE_OBJ)
@echo Compiling $<
@$(CXX) -c $(USRP_CFLAGS) $(USRP_FILE_OBJ) -o $(USRP_OBJ)
ifeq ($(RTAI),1)
$(RTAI_OBJ) lte-enb.o lte-softmodem.o: %.o : %.c
$(RTAI_OBJ) lte-softmodem.o: %.o : %.c
else
$(RTAI_OBJ): %.o : %.c
endif
......@@ -256,18 +261,10 @@ synctest: $(OBJ_SYNC) $(SHARED_DEPENDENCIES) synctest.c
sleeptest: rt_wrapper.o sleeptest.c
$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $(RTAI_CFLAGS) rt_wrapper.o -o sleeptest sleeptest.c $(LDFLAGS)
lte-softmodem: $(OBJ) $(ASN1_MSG_OBJS1) $(RTAI_OBJ) lte-softmodem.o $(SHARED_DEPENDENCIES)
lte-softmodem: $(OBJ) $(USRP_OBJ) $(ASN1_MSG_OBJS1) $(RTAI_OBJ) lte-softmodem.o $(SHARED_DEPENDENCIES)
@echo Linking $@
@$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $(OBJ) $(RTAI_OBJ) $(ASN1_MSG_OBJS1) lte-softmodem.o -o lte-softmodem $(LDFLAGS) $(LIBS)
lte-enb: $(OBJ) $(ASN1_MSG_OBJS1) $(RTAI_OBJ) lte-enb.o $(SHARED_DEPENDENCIES)
@echo Linking $@
@$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $(OBJ) $(RTAI_OBJ) $(ASN1_MSG_OBJS1) lte-enb.o -o lte-enb $(LDFLAGS) $(LIBS)
lte-softmodem-usrp: $(OBJ) $(ASN1_MSG_OBJS1) $(RTAI_OBJ) $(USRP_OBJ) $(SHARED_DEPENDENCIES)
@echo Linking $@
@$(CC) $(USRP_OBJ) $(CFLAGS) $(OBJ) $(RTAI_OBJ) $(ASN1_MSG_OBJS1) -o lte-softmodem-usrp $(LDFLAGS) $(LIBS)
emos-raw: $(SHARED_DEPENDENCIES) $(OBJ_EMOS) emos-raw.c
@$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $(RTAI_CFLAGS) $(OBJ_EMOS) -o emos-raw emos-raw.c $(LDFLAGS) $(LIBS)
......
targets/RT/USER/lte-softmodem.c
View file @ a491fbb1
......@@ -121,9 +121,6 @@ unsigned short config_frames[4] = {2,9,11,13};
#define DEBUG_THREADS 1
#define MY_RF_MODE (RXEN + TXEN + TXLPFNORM + TXLPFEN + TXLPF25 + RXLPFNORM + RXLPFEN + RXLPF25 + LNA1ON +LNAMax + RFBBNORM + DMAMODE_RX + DMAMODE_TX)
#define RF_MODE_BASE (TXLPFNORM + TXLPFEN + TXLPF25 + RXLPFNORM + RXLPFEN + RXLPF25 + LNA1ON +LNAMax + RFBBNORM)
struct timing_info_t {
//unsigned int frame, hw_slot, last_slot, next_slot;
RTIME time_min, time_max, time_avg, time_last, time_now;
......@@ -138,12 +135,11 @@ int init_dlsch_threads(void);
void cleanup_dlsch_threads(void);
int32_t init_rx_pdsch_thread(void);
void cleanup_rx_pdsch_thread(void);
int init_ulsch_threads(void);
void cleanup_ulsch_threads(void);
void setup_ue_buffers(PHY_VARS_UE *phy_vars_ue, LTE_DL_FRAME_PARMS *frame_parms, int carrier);
void setup_eNB_buffers(PHY_VARS_eNB *phy_vars_eNB, LTE_DL_FRAME_PARMS *frame_parms, int carrier);
void test_config(int card, int ant, unsigned int rf_mode, int UE_flag);
#ifdef XFORMS
// current status is that every UE has a DL scope for a SINGLE eNB (eNB_id=0)
......@@ -181,6 +177,9 @@ static pthread_t thread2; //xforms
static pthread_t thread3; //emos
#endif
openair0_device openair0;
openair0_timestamp timestamp;
/*
static int instance_cnt=-1; //0 means worker is busy, -1 means its free
int instance_cnt_ptr_kern,*instance_cnt_ptr_user;
......@@ -190,9 +189,7 @@ static pthread_t thread3; //emos
//extern unsigned int mem_base;
int card = 0;
static exmimo_config_t *p_exmimo_config;
static exmimo_id_t *p_exmimo_id;
static volatile unsigned int *DAQ_MBOX;
#if defined(ENABLE_ITTI)
static volatile int start_eNB = 0;
......@@ -204,7 +201,7 @@ volatile int oai_exit = 0;
//static int time_offset[4] = {-145,-145,-145,-145};
static int time_offset[4] = {0,0,0,0};
static int fs4_test=0;
static char UE_flag=0;
static uint8_t eNB_id=0,UE_id=0;
......@@ -213,36 +210,55 @@ static uint32_t downlink_frequency[4] = {1907600000,1907600000,1907
static int32_t uplink_frequency_offset[4]= {-120000000,-120000000,-120000000,-120000000};
static char *conf_config_file_name = NULL;
#ifdef ITTI_ENABLED
static char *itti_dump_file = NULL;
#endif
double tx_gain = 50;
double rx_gain = 30;
double bw = 14e6;
static char rxg_fname[100];
static char txg_fname[100];
static char rflo_fname[100];
static char rfdc_fname[100];
static FILE *rxg_fd=NULL;
static FILE *txg_fd=NULL;
static FILE *rflo_fd=NULL;
static FILE *rfdc_fd=NULL;
#ifndef USRP
static unsigned int rxg_max[4] = {133,133,133,133};
static unsigned int rxg_med[4] = {127,127,127,127};
static unsigned int rxg_byp[4] = {120,120,120,120};
static int tx_max_power = 0;
double sample_rate=30.72e6;
#else
double tx_gain = 50;
double rx_gain = 30;
double bw = 14e6;
char ref[128] = "internal";
char channels[128] = "0";
int samples_per_frame = 307200;
int samples_per_packets = 2048; // samples got every recv or send
int tx_forward_nsamps;
int sf_bounds_5[10] = {8, 15, 23, 30, 38, 45, 53, 60, 68, 75};
int sf_bounds_10[10] = {8, 15, 23, 30, 38, 45, 53, 60, 68, 75};
int sf_bounds_20[10] = {15, 30, 45, 60, 75, 90, 105, 120, 135, 150};
int *sf_bounds;
int max_cnt;
int tx_delay;
#endif
/*
uint32_t rf_mode_max[4] = {55759,55759,55759,55759};
uint32_t rf_mode_med[4] = {39375,39375,39375,39375};
uint32_t rf_mode_byp[4] = {22991,22991,22991,22991};
*/
static uint32_t rf_mode[4] = {MY_RF_MODE,0,0,0};
static uint32_t rf_local[4] = {8255000,8255000,8255000,8255000}; // UE zepto
//static uint32_t rf_mode[4] = {MY_RF_MODE,0,0,0};
//static uint32_t rf_local[4] = {8255000,8255000,8255000,8255000}; // UE zepto
//{8254617, 8254617, 8254617, 8254617}; //eNB khalifa
//{8255067,8254810,8257340,8257340}; // eNB PETRONAS
static uint32_t rf_vcocal[4] = {910,910,910,910};
static uint32_t rf_vcocal_850[4] = {2015, 2015, 2015, 2015};
static uint32_t rf_rxdc[4] = {32896,32896,32896,32896};
static uint32_t rxgain[4] = {20,20,20,20};
static uint32_t txgain[4] = {20,20,20,20};
//static uint32_t rf_vcocal[4] = {910,910,910,910};
//static uint32_t rf_vcocal_850[4] = {2015, 2015, 2015, 2015};
//static uint32_t rf_rxdc[4] = {32896,32896,32896,32896};
//static uint32_t rxgain[4] = {20,20,20,20};
//static uint32_t txgain[4] = {20,20,20,20};
static runmode_t mode;
static int rx_input_level_dBm;
......@@ -253,7 +269,7 @@ static char do_forms=0;
#else
int otg_enabled;
#endif
int number_of_cards = 1;
//int number_of_cards = 1;
static int mbox_bounds[20] = {8,16,24,30,38,46,54,60,68,76,84,90,98,106,114,120,128,136,144, 0}; ///boundaries of slots in terms ob mbox counter rounded up to even numbers
//static int mbox_bounds[20] = {6,14,22,28,36,44,52,58,66,74,82,88,96,104,112,118,126,134,142, 148}; ///boundaries of slots in terms ob mbox counter rounded up to even numbers
......@@ -261,6 +277,7 @@ static int mbox_bounds[20] = {8,16,24,30,38,46,54,60,68,7
static LTE_DL_FRAME_PARMS *frame_parms;
int multi_thread=0;
int N_RB_DL=25;
unsigned int build_rflocal(int txi, int txq, int rxi, int rxq)
{
......@@ -647,7 +664,7 @@ void do_OFDM_mod(int subframe,PHY_VARS_eNB *phy_vars_eNB) {
(phy_vars_eNB->lte_frame_parms.samples_per_tti>>1);
if ((subframe_select(&phy_vars_eNB->lte_frame_parms,subframe)==SF_DL)||
((subframe_select(&phy_vars_eNB->lte_frame_parms,subframe)==SF_S))) {
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
for (aa=0; aa<phy_vars_eNB->lte_frame_parms.nb_antennas_tx; aa++) {
if (phy_vars_eNB->lte_frame_parms.Ncp == EXTENDED){
......@@ -733,21 +750,21 @@ static void * eNB_thread_tx(void *param) {
subframe_tx = (proc->subframe+1)%10;
while (!oai_exit){
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_TX0+(2*proc->subframe),0);
// LOG_I(PHY,"Locking mutex for eNB proc %d (IC %d,mutex %p)\n",proc->subframe,proc->instance_cnt,&proc->mutex);
if (pthread_mutex_lock(&proc->mutex_tx) != 0) {
LOG_E(PHY,"[SCHED][eNB] error locking mutex for eNB TX proc %d\n",proc->subframe);
}
else {
while (proc->instance_cnt_tx < 0) {
// LOG_I(PHY,"Waiting and unlocking mutex for eNB proc %d (IC %d,lock %d)\n",proc->subframe,proc->instance_cnt,pthread_mutex_trylock(&proc->mutex));
pthread_cond_wait(&proc->cond_tx,&proc->mutex_tx);
}
// LOG_I(PHY,"Waking up and unlocking mutex for eNB proc %d\n",proc->subframe);
......@@ -758,7 +775,7 @@ static void * eNB_thread_tx(void *param) {
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_TX0+(2*proc->subframe),1);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_ENB, proc->frame_tx);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_ENB, proc->subframe*2);
if (oai_exit) break;
if ((((PHY_vars_eNB_g[0]->lte_frame_parms.frame_type == TDD)&&(subframe_select(&PHY_vars_eNB_g[0]->lte_frame_parms,subframe_tx)==SF_DL))||
......@@ -769,7 +786,7 @@ static void * eNB_thread_tx(void *param) {
phy_procedures_eNB_TX(subframe_tx,PHY_vars_eNB_g[0],0,no_relay,NULL);
}
do_OFDM_mod(subframe_tx,PHY_vars_eNB_g[0]);
if (pthread_mutex_lock(&proc->mutex_tx) != 0) {
printf("[openair][SCHED][eNB] error locking mutex for eNB TX proc %d\n",proc->subframe);
}
......@@ -780,16 +797,16 @@ static void * eNB_thread_tx(void *param) {
printf("[openair][SCHED][eNB] error unlocking mutex for eNB TX proc %d\n",proc->subframe);
}
}
proc->frame_tx++;
if (proc->frame_tx==1024)
proc->frame_tx=0;
}
}
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_TX0+(2*proc->subframe),0);
#ifdef HARD_RT
rt_make_soft_real_time();
#endif
#ifdef DEBUG_THREADS
printf("Exiting eNB thread TX %d\n",proc->subframe);
#endif
......@@ -800,7 +817,7 @@ static void * eNB_thread_tx(void *param) {
eNB_thread_tx_status[proc->subframe]=0;
pthread_exit(&eNB_thread_tx_status[proc->subframe]);
#endif
#ifdef DEBUG_THREADS
printf("Exiting eNB TX thread %d\n",proc->subframe);
#endif
......@@ -988,7 +1005,7 @@ void kill_eNB_proc() {
#endif
pthread_join(PHY_vars_eNB_g[0]->proc[i].pthread_rx,(void**)status_rx);
#ifdef DEBUG_THREADS
if (status_rx) printf("status %d...",*status_rx);
if (status_rx) printf("status %d...",*status_rx);
#endif
pthread_mutex_destroy(&PHY_vars_eNB_g[0]->proc[i].mutex_tx);
pthread_mutex_destroy(&PHY_vars_eNB_g[0]->proc[i].mutex_rx);
......@@ -1004,20 +1021,23 @@ void kill_eNB_proc() {
/* This is the main eNB thread. */
int eNB_thread_status;
#ifndef USRP
static void *eNB_thread(void *arg)
{
#ifdef RTAI
RT_TASK *task;
#endif
unsigned char slot=0,last_slot, next_slot;
unsigned char slot=0;//,last_slot, next_slot;
int hw_slot,frame=0;
int diff;
int delay_cnt;
RTIME time_in, time_diff;
int mbox_target=0,mbox_current=0;
int i,ret;
int tx_offset;
int i;//
int ret;
// int tx_offset;
int sf;
volatile unsigned int *DAQ_MBOX = openair0_daq_cnt();
#if defined(ENABLE_ITTI)
/* Wait for eNB application initialization to be complete (eNB registration to MME) */
......@@ -1079,7 +1099,7 @@ static void *eNB_thread(void *arg)
if (diff>8)
LOG_D(HW,"eNB Frame %d, time %llu: skipped slot, waiting for hw to catch up (slot %d, hw_slot %d, mbox_current %d, mbox_target %d, diff %d)\n",frame, rt_get_time_ns(), slot, hw_slot, mbox_current, mbox_target, diff);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *((volatile unsigned int *) openair0_exmimo_pci[card].rxcnt_ptr[0]));
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff);
delay_cnt = 0;
......@@ -1090,7 +1110,7 @@ static void *eNB_thread(void *arg)
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,1);
ret = rt_sleep_ns(diff*DAQ_PERIOD);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,0);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *((volatile unsigned int *) openair0_exmimo_pci[card].rxcnt_ptr[0]));
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
if (ret)
LOG_D(HW,"eNB Frame %d, time %llu: rt_sleep_ns returned %d\n",frame, time_in);
hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15;
......@@ -1111,19 +1131,8 @@ static void *eNB_thread(void *arg)
if (oai_exit) break;
last_slot = (slot)%LTE_SLOTS_PER_FRAME;
if (last_slot <0)
last_slot+=20;
next_slot = (slot+2)%LTE_SLOTS_PER_FRAME;
//PHY_vars_eNB_g[0]->frame = frame;
if (frame>5) {
/*
if (frame%100==0)
LOG_D(HW,"frame %d (%d), slot %d, hw_slot %d, next_slot %d (before): DAQ_MBOX %d\n",frame, PHY_vars_eNB_g[0]->frame, slot, hw_slot,next_slot,DAQ_MBOX[0]);
*/
//if (PHY_vars_eNB_g[0]->frame>5) {
timing_info.time_last = timing_info.time_now;
timing_info.time_now = rt_get_time_ns();
......@@ -1230,1337 +1239,1128 @@ static void *eNB_thread(void *arg)
return 0;
}
/* This is the main UE thread. Initially it is doing a periodic get_frame. One synchronized it gets woken up by the kernel driver using the RTAI message mechanism (rt_send and rt_receive). */
static void *UE_thread(void *arg) {
#ifdef RTAI
RT_TASK *task;
#endif
// RTIME in, out, diff;
int slot=0,frame=0,hw_slot,last_slot, next_slot;
// unsigned int aa;
static int is_synchronized = 0;
int delay_cnt;
RTIME time_in;
int hw_slot_offset=0,rx_offset_mbox=0,mbox_target=0,mbox_current=0;
int diff2;
int i, ret;
RT_TASK *task;
#endif
// RTIME in, out, diff;
int slot=0,frame=0,hw_slot,last_slot, next_slot;
// unsigned int aa;
static int is_synchronized = 0;
int delay_cnt;
RTIME time_in;
int hw_slot_offset=0,rx_offset_mbox=0,mbox_target=0,mbox_current=0;
int diff2;
int i, ret;
volatile unsigned int *DAQ_MBOX = openair0_daq_cnt();
#ifndef USRP
exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[card].exmimo_config_ptr;;
#endif
#if defined(ENABLE_ITTI) && defined(ENABLE_USE_MME)
/* Wait for NAS UE to start cell selection */
wait_system_ready ("Waiting for UE to be activated by UserProcess %s\r", &start_UE);
/* Wait for NAS UE to start cell selection */
wait_system_ready ("Waiting for UE to be activated by UserProcess %s\r", &start_UE);
#endif
#ifdef RTAI
task = rt_task_init_schmod(nam2num("TASK0"), 0, 0, 0, SCHED_FIFO, 0xF);
LOG_D(HW,"Started UE thread (id %p)\n",task);
task = rt_task_init_schmod(nam2num("TASK0"), 0, 0, 0, SCHED_FIFO, 0xF);
LOG_D(HW,"Started UE thread (id %p)\n",task);
#endif
#ifdef HARD_RT
rt_make_hard_real_time();
rt_make_hard_real_time();
#endif
mlockall(MCL_CURRENT | MCL_FUTURE);
mlockall(MCL_CURRENT | MCL_FUTURE);
openair_daq_vars.freq_offset = 0; //-7500;
/*
if (mode == rx_calib_ue) {
openair_daq_vars.freq_offset = -7500;
for (i=0; i<4; i++) {
p_exmimo_config->rf.rf_freq_rx[i] = p_exmimo_config->rf.rf_freq_rx[i]+openair_daq_vars.freq_offset;
p_exmimo_config->rf.rf_freq_tx[i] = p_exmimo_config->rf.rf_freq_rx[i]+openair_daq_vars.freq_offset;
}
openair0_dump_config(card);
}
*/
while (!oai_exit)
{
hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15; //the slot the hw is about to store
openair_daq_vars.freq_offset = 0; //-7500;
/*
if (mode == rx_calib_ue) {
openair_daq_vars.freq_offset = -7500;
for (i=0; i<4; i++) {
p_exmimo_config->rf.rf_freq_rx[i] = p_exmimo_config->rf.rf_freq_rx[i]+openair_daq_vars.freq_offset;
p_exmimo_config->rf.rf_freq_tx[i] = p_exmimo_config->rf.rf_freq_rx[i]+openair_daq_vars.freq_offset;
}
openair0_dump_config(card);
}
*/
while (!oai_exit) {
hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15; //the slot the hw is about to store
if (is_synchronized) {
//this is the mbox counter that indicates the start of the frame
rx_offset_mbox = (PHY_vars_UE_g[0]->rx_offset * 150) / (10*PHY_vars_UE_g[0]->lte_frame_parms.samples_per_tti);
//this is the mbox counter where we should be
mbox_target = (((((slot+1)%20)*15+1)>>1) + rx_offset_mbox + 1)%150;
// round up to the next multiple of two (mbox counter from express MIMO gives only even numbers)
mbox_target = ((mbox_target+1)-((mbox_target-1)%2))%150;
//this is the mbox counter where we are
mbox_current = ((volatile unsigned int *)DAQ_MBOX)[0];
//this is the time we need to sleep in order to synchronize with the hw (in multiples of DAQ_PERIOD)
if ((mbox_current>=120) && (mbox_target<30)) //handle the frame wrap-arround
diff2 = 150-mbox_current+mbox_target;
else if ((mbox_current<30) && (mbox_target>=120))
diff2 = -150+mbox_target-mbox_current;
else
diff2 = mbox_target - mbox_current;
if (diff2 <(-7)) {
LOG_D(HW,"UE Frame %d: missed slot, proceeding with next one (slot %d, hw_slot %d, diff %d)\n",frame, slot, hw_slot, diff2);
if (frame>0)
exit_fun("[HW][UE] missed slot");
slot++;
if (slot==20) {
slot=0;
frame++;
}
continue;
}
if (diff2>8)
LOG_D(HW,"UE Frame %d: skipped slot, waiting for hw to catch up (slot %d, hw_slot %d, mbox_current %d, mbox_target %d, diff %d)\n",frame, slot, hw_slot, mbox_current, mbox_target, diff2);
/*
if (frame%100==0)
LOG_D(HW,"frame %d (%d), slot %d, hw_slot %d, rx_offset_mbox %d, mbox_target %d, mbox_current %d, diff %d\n",frame, PHY_vars_UE_g[0]->frame, slot,hw_slot,rx_offset_mbox,mbox_target,mbox_current,diff2);
*/
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *((volatile unsigned int *) openair0_exmimo_pci[card].rxcnt_ptr[0]));
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff2);
delay_cnt = 0;
while ((diff2>0) && (!oai_exit) && (is_synchronized) )
{
time_in = rt_get_time_ns();
//LOG_D(HW,"eNB Frame %d delaycnt %d : hw_slot %d (%d), slot %d (%d), diff %d, time %llu\n",frame,delay_cnt,hw_slot,((volatile unsigned int *)DAQ_MBOX)[0],slot,mbox_target,diff2,time_in);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *((volatile unsigned int *) openair0_exmimo_pci[card].rxcnt_ptr[0]));
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,1);
ret = rt_sleep_ns(diff2*DAQ_PERIOD);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,0);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *((volatile unsigned int *) openair0_exmimo_pci[card].rxcnt_ptr[0]));
if (ret)
LOG_D(HW,"eNB Frame %d, time %llu: rt_sleep_ns returned %d\n",frame, time_in);
hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15;
//LOG_D(HW,"eNB Frame %d : hw_slot %d, time %llu\n",frame,hw_slot,rt_get_time_ns());
delay_cnt++;
if (delay_cnt == 30)
{
LOG_D(HW,"UE frame %d: HW stopped ... \n",frame);
exit_fun("[HW][UE] HW stopped");
}
mbox_current = ((volatile unsigned int *)DAQ_MBOX)[0];
if ((mbox_current>=135) && (mbox_target<15)) //handle the frame wrap-arround
diff2 = 150-mbox_current+mbox_target;
else if ((mbox_current<15) && (mbox_target>=135))
diff2 = -150+mbox_target-mbox_current;
else
diff2 = mbox_target - mbox_current;
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *((volatile unsigned int *) openair0_exmimo_pci[card].rxcnt_ptr[0]));
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff2);
}
if (is_synchronized) {
//this is the mbox counter that indicates the start of the frame
rx_offset_mbox = (PHY_vars_UE_g[0]->rx_offset * 150) / (10*PHY_vars_UE_g[0]->lte_frame_parms.samples_per_tti);
//this is the mbox counter where we should be
mbox_target = (((((slot+1)%20)*15+1)>>1) + rx_offset_mbox + 1)%150;
// round up to the next multiple of two (mbox counter from express MIMO gives only even numbers)
mbox_target = ((mbox_target+1)-((mbox_target-1)%2))%150;
//this is the mbox counter where we are
mbox_current = ((volatile unsigned int *)DAQ_MBOX)[0];
//this is the time we need to sleep in order to synchronize with the hw (in multiples of DAQ_PERIOD)
if ((mbox_current>=120) && (mbox_target<30)) //handle the frame wrap-arround
diff2 = 150-mbox_current+mbox_target;
else if ((mbox_current<30) && (mbox_target>=120))
diff2 = -150+mbox_target-mbox_current;
else
diff2 = mbox_target - mbox_current;
if (diff2 <(-7)) {
LOG_D(HW,"UE Frame %d: missed slot, proceeding with next one (slot %d, hw_slot %d, diff %d)\n",frame, slot, hw_slot, diff2);
if (frame>0)
exit_fun("[HW][UE] missed slot");
slot++;
if (slot==20) {
slot=0;
frame++;
}
last_slot = (slot)%LTE_SLOTS_PER_FRAME;
if (last_slot <0)
last_slot+=LTE_SLOTS_PER_FRAME;
next_slot = (slot+3)%LTE_SLOTS_PER_FRAME;
if (is_synchronized)
{
/*
if (frame%100==0)
LOG_D(HW,"frame %d (%d), slot %d, hw_slot %d, last_slot %d (before): DAQ_MBOX %d\n",frame, PHY_vars_UE_g[0]->frame, slot,hw_slot,last_slot,DAQ_MBOX[0]);
*/
// in = rt_get_time_ns();
phy_procedures_UE_lte (last_slot, next_slot, PHY_vars_UE_g[0], 0, 0,mode,0,NULL);
// out = rt_get_time_ns();
// diff = out-in;
/*
if (frame % 100 == 0)
LOG_D(HW,"hw_slot %d (after): DAQ_MBOX %d\n",hw_slot,DAQ_MBOX[0]);
continue;
}
if (diff2>8)
LOG_D(HW,"UE Frame %d: skipped slot, waiting for hw to catch up (slot %d, hw_slot %d, mbox_current %d, mbox_target %d, diff %d)\n",frame, slot, hw_slot, mbox_current, mbox_target, diff2);
/*
if (frame%100==0)
LOG_D(HW,"frame %d (%d), slot %d, hw_slot %d, rx_offset_mbox %d, mbox_target %d, mbox_current %d, diff %d\n",frame, PHY_vars_UE_g[0]->frame, slot,hw_slot,rx_offset_mbox,mbox_target,mbox_current,diff2);
*/
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff2);
delay_cnt = 0;
while ((diff2>0) && (!oai_exit) && (is_synchronized) ) {
time_in = rt_get_time_ns();
//LOG_D(HW,"eNB Frame %d delaycnt %d : hw_slot %d (%d), slot %d (%d), diff %d, time %llu\n",frame,delay_cnt,hw_slot,((volatile unsigned int *)DAQ_MBOX)[0],slot,mbox_target,diff2,time_in);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,1);
ret = rt_sleep_ns(diff2*DAQ_PERIOD);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,0);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
if (ret)
LOG_D(HW,"eNB Frame %d, time %llu: rt_sleep_ns returned %d\n",frame, time_in);
LOG_D(HW,"Frame %d: last_slot %d, phy_procedures_lte_ue time_in %llu, time_out %llu, diff %llu\n",
frame, last_slot,in,out,diff);
*/
}
else // we are not yet synchronized
{
hw_slot_offset = 0;
slot = 0;
openair0_get_frame(card);
// LOG_D(HW,"after get_frame\n");
// rt_sleep_ns(FRAME_PERIOD);
// LOG_D(HW,"after sleep\n");
if (initial_sync(PHY_vars_UE_g[0],mode)==0) {
/*
lte_adjust_synch(&PHY_vars_UE_g[0]->lte_frame_parms,
PHY_vars_UE_g[0],
0,
1,
16384);
*/
//for better visualization afterwards
/*
for (aa=0; aa<PHY_vars_UE_g[0]->lte_frame_parms.nb_antennas_rx; aa++)
memset(PHY_vars_UE_g[0]->lte_ue_common_vars.rxdata[aa],0,
PHY_vars_UE_g[0]->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int));
*/
if (mode == rx_calib_ue) {
exit_fun("[HW][UE] UE in RX calibration mode");
}
else {
is_synchronized = 1;
//start the DMA transfers
//LOG_D(HW,"Before openair0_start_rt_acquisition \n");
openair0_start_rt_acquisition(card);
hw_slot_offset = (PHY_vars_UE_g[0]->rx_offset<<1) / PHY_vars_UE_g[0]->lte_frame_parms.samples_per_tti;
LOG_D(HW,"Got synch: hw_slot_offset %d\n",hw_slot_offset);
}
}
else {
if (openair_daq_vars.freq_offset >= 0) {
openair_daq_vars.freq_offset += 100;
openair_daq_vars.freq_offset *= -1;
}
else {
openair_daq_vars.freq_offset *= -1;
}
if (abs(openair_daq_vars.freq_offset) > 7500) {
LOG_I(PHY,"[initial_sync] No cell synchronization found, abondoning\n");
mac_xface->macphy_exit("No cell synchronization found, abondoning");
}
else {
LOG_I(PHY,"[initial_sync] trying carrier off %d Hz\n",openair_daq_vars.freq_offset);
for (i=0; i<4; i++) {
if (p_exmimo_config->rf.rf_freq_rx[i])
p_exmimo_config->rf.rf_freq_rx[i] = carrier_freq[i]+openair_daq_vars.freq_offset;
if (p_exmimo_config->rf.rf_freq_tx[i])
p_exmimo_config->rf.rf_freq_tx[i] = carrier_freq[i]+openair_daq_vars.freq_offset;
}
openair0_dump_config(card);
rt_sleep_ns(FRAME_PERIOD);
}
}
}
hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15;
//LOG_D(HW,"eNB Frame %d : hw_slot %d, time %llu\n",frame,hw_slot,rt_get_time_ns());
delay_cnt++;
if (delay_cnt == 30) {
LOG_D(HW,"UE frame %d: HW stopped ... \n",frame);
exit_fun("[HW][UE] HW stopped");
}
mbox_current = ((volatile unsigned int *)DAQ_MBOX)[0];
if ((mbox_current>=135) && (mbox_target<15)) //handle the frame wrap-arround
diff2 = 150-mbox_current+mbox_target;
else if ((mbox_current<15) && (mbox_target>=135))
diff2 = -150+mbox_target-mbox_current;
else
diff2 = mbox_target - mbox_current;
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff2);
}
}
last_slot = (slot)%LTE_SLOTS_PER_FRAME;
if (last_slot <0)
last_slot+=LTE_SLOTS_PER_FRAME;
next_slot = (slot+3)%LTE_SLOTS_PER_FRAME;
if (is_synchronized) {
phy_procedures_UE_lte (last_slot, next_slot, PHY_vars_UE_g[0], 0, 0,mode,0,NULL);
}
else { // we are not yet synchronized
hw_slot_offset = 0;
slot = 0;
openair0_get_frame(card);
// LOG_D(HW,"after get_frame\n");
// rt_sleep_ns(FRAME_PERIOD);
// LOG_D(HW,"after sleep\n");
if (initial_sync(PHY_vars_UE_g[0],mode)==0) {
/*
if ((slot%2000)<10)
LOG_D(HW,"fun0: doing very hard work\n");
lte_adjust_synch(&PHY_vars_UE_g[0]->lte_frame_parms,
PHY_vars_UE_g[0],
0,
1,
16384);
*/
slot++;
if (slot==20) {
slot=0;
frame++;
//for better visualization afterwards
/*
for (aa=0; aa<PHY_vars_UE_g[0]->lte_frame_parms.nb_antennas_rx; aa++)
memset(PHY_vars_UE_g[0]->lte_ue_common_vars.rxdata[aa],0,
PHY_vars_UE_g[0]->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int));
*/
if (mode == rx_calib_ue) {
exit_fun("[HW][UE] UE in RX calibration mode");
}
#if defined(ENABLE_ITTI)
itti_update_lte_time(frame, slot);
else {
is_synchronized = 1;
//start the DMA transfers
//LOG_D(HW,"Before openair0_start_rt_acquisition \n");
openair0_start_rt_acquisition(card);
hw_slot_offset = (PHY_vars_UE_g[0]->rx_offset<<1) / PHY_vars_UE_g[0]->lte_frame_parms.samples_per_tti;
LOG_D(HW,"Got synch: hw_slot_offset %d\n",hw_slot_offset);
}
}
else {
if (openair_daq_vars.freq_offset >= 0) {
openair_daq_vars.freq_offset += 100;
openair_daq_vars.freq_offset *= -1;
}
else {
openair_daq_vars.freq_offset *= -1;
}
if (abs(openair_daq_vars.freq_offset) > 7500) {
LOG_I(PHY,"[initial_sync] No cell synchronization found, abondoning\n");
mac_xface->macphy_exit("No cell synchronization found, abondoning");
}
else {
LOG_I(PHY,"[initial_sync] trying carrier off %d Hz\n",openair_daq_vars.freq_offset);
#ifndef USRP
for (i=0; i<4; i++) {
if (p_exmimo_config->rf.rf_freq_rx[i])
p_exmimo_config->rf.rf_freq_rx[i] = carrier_freq[i]+openair_daq_vars.freq_offset;
if (p_exmimo_config->rf.rf_freq_tx[i])
p_exmimo_config->rf.rf_freq_tx[i] = carrier_freq[i]+openair_daq_vars.freq_offset;
}
#endif
openair0_dump_config(card);
rt_sleep_ns(FRAME_PERIOD);
}
}
LOG_D(HW,"UE_thread: finished, ran %d times.\n",frame);
}
/*
if ((slot%2000)<10)
LOG_D(HW,"fun0: doing very hard work\n");
*/
slot++;
if (slot==20) {
slot=0;
frame++;
}
#if defined(ENABLE_ITTI)
itti_update_lte_time(frame, slot);
#endif
}
LOG_D(HW,"UE_thread: finished, ran %d times.\n",frame);
#ifdef HARD_RT
rt_make_soft_real_time();
rt_make_soft_real_time();
#endif
// clean task
// clean task
#ifdef RTAI
rt_task_delete(task);
rt_task_delete(task);
#endif
LOG_D(HW,"Task deleted. returning\n");
return 0;
}
LOG_D(HW,"Task deleted. returning\n");
return 0;
}
static void get_options (int argc, char **argv)
{
int c;
char line[1000];
int l;
const Enb_properties_array_t *enb_properties;
enum long_option_e {
LONG_OPTION_START = 0x100, /* Start after regular single char options */
LONG_OPTION_ULSCH_MAX_CONSECUTIVE_ERRORS,
LONG_OPTION_CALIB_UE_RX,
LONG_OPTION_CALIB_UE_RX_MED,
LONG_OPTION_CALIB_UE_RX_BYP,
LONG_OPTION_DEBUG_UE_PRACH,
LONG_OPTION_NO_L2_CONNECT,
};
static const struct option long_options[] = {
{"ulsch-max-errors",required_argument, NULL, LONG_OPTION_ULSCH_MAX_CONSECUTIVE_ERRORS},
{"calib-ue-rx", required_argument, NULL, LONG_OPTION_CALIB_UE_RX},
{"calib-ue-rx-med", required_argument, NULL, LONG_OPTION_CALIB_UE_RX_MED},
{"calib-ue-rx-byp", required_argument, NULL, LONG_OPTION_CALIB_UE_RX_BYP},
{"debug-ue-prach", no_argument, NULL, LONG_OPTION_DEBUG_UE_PRACH},
{"no-L2-connect", no_argument, NULL, LONG_OPTION_NO_L2_CONNECT},
{NULL, 0, NULL, 0}};
while ((c = getopt_long (argc, argv, "C:dF:K:qO:ST:UVRM",long_options,NULL)) != -1)
{
switch (c)
{
case LONG_OPTION_ULSCH_MAX_CONSECUTIVE_ERRORS:
ULSCH_max_consecutive_errors = atoi(optarg);
printf("Set ULSCH_max_consecutive_errors = %d\n",ULSCH_max_consecutive_errors);
break;
case LONG_OPTION_CALIB_UE_RX:
mode = rx_calib_ue;
rx_input_level_dBm = atoi(optarg);
printf("Running with UE calibration on (LNA max), input level %d dBm\n",rx_input_level_dBm);
break;
case LONG_OPTION_CALIB_UE_RX_MED:
mode = rx_calib_ue_med;
rx_input_level_dBm = atoi(optarg);
printf("Running with UE calibration on (LNA med), input level %d dBm\n",rx_input_level_dBm);
break;
case LONG_OPTION_CALIB_UE_RX_BYP:
mode = rx_calib_ue_byp;
rx_input_level_dBm = atoi(optarg);
printf("Running with UE calibration on (LNA byp), input level %d dBm\n",rx_input_level_dBm);
break;
case LONG_OPTION_DEBUG_UE_PRACH:
mode = debug_prach;
break;
case LONG_OPTION_NO_L2_CONNECT:
mode = no_L2_connect;
break;
case 'M':
multi_thread=1;
break;
case 'C':
downlink_frequency[0] = atof(optarg); // Use float to avoid issue with frequency over 2^31.
downlink_frequency[1] = downlink_frequency[0];
downlink_frequency[2] = downlink_frequency[0];
downlink_frequency[3] = downlink_frequency[0];
carrier_freq[0] = downlink_frequency[0];
carrier_freq[1] = downlink_frequency[1];
carrier_freq[2] = downlink_frequency[2];
carrier_freq[3] = downlink_frequency[3];
printf("Downlink frequency set to %u\n", downlink_frequency[0]);
break;
case 'd':
#ifdef XFORMS
do_forms=1;
#endif
break;
case 'F':
sprintf(rxg_fname,"%srxg.lime",optarg);
rxg_fd = fopen(rxg_fname,"r");
if (rxg_fd) {
printf("Loading RX Gain parameters from %s\n",rxg_fname);
l=0;
while (fgets(line, sizeof(line), rxg_fd)) {
if ((strlen(line)==0) || (*line == '#')) continue; //ignore empty or comment lines
else {
if (l==0) sscanf(line,"%d %d %d %d",&rxg_max[0],&rxg_max[1],&rxg_max[2],&rxg_max[3]);
if (l==1) sscanf(line,"%d %d %d %d",&rxg_med[0],&rxg_med[1],&rxg_med[2],&rxg_med[3]);
if (l==2) sscanf(line,"%d %d %d %d",&rxg_byp[0],&rxg_byp[1],&rxg_byp[2],&rxg_byp[3]);
l++;
}
}
}
else
printf("%s not found, running with defaults\n",rxg_fname);
sprintf(txg_fname,"%stxg.lime",optarg);
txg_fd = fopen(txg_fname,"r");
if (txg_fd) {
printf("Loading TX Gain parameters from %s\n",txg_fname);
l=0;
while (fgets(line, sizeof(line), txg_fd)) {
if ((strlen(line)==0) || (*line == '#')) {
continue; //ignore empty or comment lines
}
else {
if (l==0) sscanf(line,"%d %d %d %d",&txgain[0],&txgain[1],&txgain[2],&txgain[3]);
if (l==1) sscanf(line,"%d",&tx_max_power);
l++;
}
}
}
else
printf("%s not found, running with defaults\n",txg_fname);
sprintf(rflo_fname,"%srflo.lime",optarg);
rflo_fd = fopen(rflo_fname,"r");
if (rflo_fd) {
printf("Loading RF LO parameters from %s\n",rflo_fname);
if (fscanf(rflo_fd,"%d %d %d %d",&rf_local[0],&rf_local[1],&rf_local[2],&rf_local[3]) < 4)
LOG_E(EMU, "Error parsing \"%s\"", rflo_fname);
}
else
printf("%s not found, running with defaults\n",rflo_fname);
sprintf(rfdc_fname,"%srfdc.lime",optarg);
rfdc_fd = fopen(rfdc_fname,"r");
if (rfdc_fd) {
printf("Loading RF DC parameters from %s\n",rfdc_fname);
if (fscanf(rfdc_fd,"%d %d %d %d",&rf_rxdc[0],&rf_rxdc[1],&rf_rxdc[2],&rf_rxdc[3]) < 4)
LOG_E(EMU, "Error parsing \"%s\"", rfdc_fname);
}
else
printf("%s not found, running with defaults\n",rfdc_fname);
break;
#else // This is for USRP or ETHERNET targets
case 'K':
#if defined(ENABLE_ITTI)
itti_dump_file = strdup(optarg);
#else
printf("-K option is disabled when ENABLE_ITTI is not defined\n");
#endif
break;
case 'O':
conf_config_file_name = optarg;
break;
case 'S':
fs4_test=1;
break;
case 'T':
#ifdef ENABLE_TCXO
tcxo=atoi(optarg);
#endif
break;
case 'U':
UE_flag = 1;
break;
case 'V':
ouput_vcd = 1;
break;
case 'q':
opp_enabled = 1;
break;
case 'R' :
online_log_messages =1;
break;
default:
break;
}
}
if ((UE_flag == 0) && (conf_config_file_name != NULL)) {
int i;
NB_eNB_INST = 1;
/* Read eNB configuration file */
enb_properties = enb_config_init(conf_config_file_name);
AssertFatal (NB_eNB_INST <= enb_properties->number,
"Number of eNB is greater than eNB defined in configuration file %s (%d/%d)!",
conf_config_file_name, NB_eNB_INST, enb_properties->number);
/* Update some simulation parameters */
frame_parms->frame_type = enb_properties->properties[0]->frame_type;
frame_parms->tdd_config = enb_properties->properties[0]->tdd_config;
frame_parms->tdd_config_S = enb_properties->properties[0]->tdd_config_s;
for (i = 0 ; i < (sizeof(downlink_frequency) / sizeof (downlink_frequency[0])); i++) {
downlink_frequency[i] = enb_properties->properties[0]->downlink_frequency;
printf("Downlink frequency set to %u\n", downlink_frequency[i]);
uplink_frequency_offset[i] = enb_properties->properties[0]->uplink_frequency_offset;
static void get_options (int argc, char **argv) {
int c;
char line[1000];
int l;
const Enb_properties_array_t *enb_properties;
enum long_option_e {
LONG_OPTION_START = 0x100, /* Start after regular single char options */
LONG_OPTION_ULSCH_MAX_CONSECUTIVE_ERRORS,
LONG_OPTION_CALIB_UE_RX,
LONG_OPTION_CALIB_UE_RX_MED,
LONG_OPTION_CALIB_UE_RX_BYP,
LONG_OPTION_DEBUG_UE_PRACH,
LONG_OPTION_NO_L2_CONNECT,
};
static const struct option long_options[] = {
{"ulsch-max-errors",required_argument, NULL, LONG_OPTION_ULSCH_MAX_CONSECUTIVE_ERRORS},
{"calib-ue-rx", required_argument, NULL, LONG_OPTION_CALIB_UE_RX},
{"calib-ue-rx-med", required_argument, NULL, LONG_OPTION_CALIB_UE_RX_MED},
{"calib-ue-rx-byp", required_argument, NULL, LONG_OPTION_CALIB_UE_RX_BYP},
{"debug-ue-prach", no_argument, NULL, LONG_OPTION_DEBUG_UE_PRACH},
{"no-L2-connect", no_argument, NULL, LONG_OPTION_NO_L2_CONNECT},
{NULL, 0, NULL, 0}};
while ((c = getopt_long (argc, argv, "C:dK:qO:SUVRMr:",long_options,NULL)) != -1) {
switch (c) {
case LONG_OPTION_ULSCH_MAX_CONSECUTIVE_ERRORS:
ULSCH_max_consecutive_errors = atoi(optarg);
printf("Set ULSCH_max_consecutive_errors = %d\n",ULSCH_max_consecutive_errors);
break;
case LONG_OPTION_CALIB_UE_RX:
mode = rx_calib_ue;
rx_input_level_dBm = atoi(optarg);
printf("Running with UE calibration on (LNA max), input level %d dBm\n",rx_input_level_dBm);
break;
case LONG_OPTION_CALIB_UE_RX_MED:
mode = rx_calib_ue_med;
rx_input_level_dBm = atoi(optarg);
printf("Running with UE calibration on (LNA med), input level %d dBm\n",rx_input_level_dBm);
break;
case LONG_OPTION_CALIB_UE_RX_BYP:
mode = rx_calib_ue_byp;
rx_input_level_dBm = atoi(optarg);
printf("Running with UE calibration on (LNA byp), input level %d dBm\n",rx_input_level_dBm);
break;
case LONG_OPTION_DEBUG_UE_PRACH:
mode = debug_prach;
break;
case LONG_OPTION_NO_L2_CONNECT:
mode = no_L2_connect;
break;
case 'M':
multi_thread=1;
break;
case 'C':
downlink_frequency[0] = atof(optarg); // Use float to avoid issue with frequency over 2^31.
downlink_frequency[1] = downlink_frequency[0];
downlink_frequency[2] = downlink_frequency[0];
downlink_frequency[3] = downlink_frequency[0];
carrier_freq[0] = downlink_frequency[0];
carrier_freq[1] = downlink_frequency[1];
carrier_freq[2] = downlink_frequency[2];
carrier_freq[3] = downlink_frequency[3];
printf("Downlink frequency set to %u\n", downlink_frequency[0]);
break;
case 'd':
#ifdef XFORMS
do_forms=1;
#endif
break;
case 'K':
#if defined(ENABLE_ITTI)
itti_dump_file = strdup(optarg);
#else
printf("-K option is disabled when ENABLE_ITTI is not defined\n");
#endif
break;
case 'O':
conf_config_file_name = optarg;
break;
case 'U':
UE_flag = 1;
break;
case 'V':
ouput_vcd = 1;
break;
case 'q':
opp_enabled = 1;
break;
case 'R' :
online_log_messages =1;
break;
case 'r':
switch(atoi(optarg)) {
case 6:
N_RB_DL=6;
break;
case 25:
N_RB_DL=25;
break;
case 50:
N_RB_DL=50;
break;
case 100:
N_RB_DL=100;
break;
default:
printf("Unknown N_RB_DL %d, switching to 25\n",atoi(optarg));
break;
}
default:
break;
}
}
if ((UE_flag == 0) && (conf_config_file_name != NULL)) {
int i;
NB_eNB_INST = 1;
/* Read eNB configuration file */
enb_properties = enb_config_init(conf_config_file_name);
AssertFatal (NB_eNB_INST <= enb_properties->number,
"Number of eNB is greater than eNB defined in configuration file %s (%d/%d)!",
conf_config_file_name, NB_eNB_INST, enb_properties->number);
/* Update some simulation parameters */
frame_parms->frame_type = enb_properties->properties[0]->frame_type;
frame_parms->tdd_config = enb_properties->properties[0]->tdd_config;
frame_parms->tdd_config_S = enb_properties->properties[0]->tdd_config_s;
for (i = 0 ; i < (sizeof(downlink_frequency) / sizeof (downlink_frequency[0])); i++) {
downlink_frequency[i] = enb_properties->properties[0]->downlink_frequency;
printf("Downlink frequency set to %u\n", downlink_frequency[i]);
uplink_frequency_offset[i] = enb_properties->properties[0]->uplink_frequency_offset;
}
}
}
int main(int argc, char **argv) {
int main(int argc, char **argv) {
#ifdef RTAI
// RT_TASK *task;
// RT_TASK *task;
#else
int *eNB_thread_status_p;
int *eNB_thread_status_rx[10],*eNB_thread_status_tx[10];
int *eNB_thread_status_p;
int *eNB_thread_status_rx[10],*eNB_thread_status_tx[10];
#endif
int i,j,aa;
int i,j,aa;
#if defined (XFORMS) || defined (EMOS) || (! defined (RTAI))
void *status;
void *status;
#endif
uint16_t Nid_cell = 0;
uint8_t cooperation_flag=0, transmission_mode=1, abstraction_flag=0;
uint16_t Nid_cell = 0;
uint8_t cooperation_flag=0, transmission_mode=1, abstraction_flag=0;
#ifndef OPENAIR2
uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
#endif
#ifdef ENABLE_TCXO
unsigned int tcxo = 114;
unsigned int tcxo = 114;
#endif
int amp;
// uint8_t prach_fmt;
// int N_ZC;
int amp;
// uint8_t prach_fmt;
// int N_ZC;
int ret, ant;
int ant_offset=0;
int ret, ant;
int ant_offset=0;
#if defined (EMOS) || (! defined (RTAI))
int error_code;
int error_code;
#endif
openair0_config_t openair0_cfg;
mode = normal_txrx;
frame_parms = (LTE_DL_FRAME_PARMS*) malloc(sizeof(LTE_DL_FRAME_PARMS));
/* Set some default values that may be overwritten while reading options */
frame_parms->frame_type = 1; /* TDD */
frame_parms->tdd_config = 3;
frame_parms->tdd_config_S = 0;
mode = normal_txrx;
get_options (argc, argv); //Command-line options
frame_parms = (LTE_DL_FRAME_PARMS*) malloc(sizeof(LTE_DL_FRAME_PARMS));
/* Set some default values that may be overwritten while reading options */
frame_parms->frame_type = TDD; /* TDD */
frame_parms->tdd_config = 3;
frame_parms->tdd_config_S = 0;
//randominit (0);
set_taus_seed (0);
get_options (argc, argv); //Command-line options
// initialize the log (see log.h for details)
logInit();
//randominit (0);
set_taus_seed (0);
set_glog(LOG_WARNING, LOG_MED);
if (UE_flag==1)
{
printf("configuring for UE\n");
// initialize the log (see log.h for details)
logInit();
set_glog(LOG_WARNING, LOG_MED);
if (UE_flag==1)
{
printf("configuring for UE\n");
set_comp_log(HW, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(HW, LOG_DEBUG, LOG_HIGH, 1);
#ifdef OPENAIR2
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
#else
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
#endif
set_comp_log(MAC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RLC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PDCP, LOG_INFO, LOG_HIGH, 1);
set_comp_log(OTG, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RRC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(MAC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RLC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PDCP, LOG_INFO, LOG_HIGH, 1);
set_comp_log(OTG, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RRC, LOG_INFO, LOG_HIGH, 1);
#if defined(ENABLE_ITTI)
set_comp_log(EMU, LOG_INFO, LOG_MED, 1);
set_comp_log(EMU, LOG_INFO, LOG_MED, 1);
# if defined(ENABLE_USE_MME)
set_comp_log(NAS, LOG_INFO, LOG_HIGH, 1);
set_comp_log(NAS, LOG_INFO, LOG_HIGH, 1);
# endif
#endif
}
else
{
printf("configuring for eNB\n");
}
else
{
printf("configuring for eNB\n");
set_comp_log(HW, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(HW, LOG_DEBUG, LOG_HIGH, 1);
#ifdef OPENAIR2
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
#else
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
#endif
set_comp_log(MAC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RLC, LOG_TRACE, LOG_HIGH, 1);
set_comp_log(PDCP, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(OTG, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RRC, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(MAC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RLC, LOG_TRACE, LOG_HIGH, 1);
set_comp_log(PDCP, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(OTG, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RRC, LOG_DEBUG, LOG_HIGH, 1);
#if defined(ENABLE_ITTI)
set_comp_log(EMU, LOG_INFO, LOG_MED, 1);
set_comp_log(EMU, LOG_INFO, LOG_MED, 1);
# if defined(ENABLE_USE_MME)
set_comp_log(UDP_, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(GTPU, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(S1AP, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(SCTP, LOG_INFO, LOG_HIGH, 1);
set_comp_log(UDP_, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(GTPU, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(S1AP, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(SCTP, LOG_INFO, LOG_HIGH, 1);
# endif
#if defined(ENABLE_SECURITY)
set_comp_log(OSA, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(OSA, LOG_DEBUG, LOG_HIGH, 1);
#endif
#endif
set_comp_log(ENB_APP, LOG_INFO, LOG_HIGH, 1);
if (online_log_messages == 1) {
set_component_filelog(RRC);
set_component_filelog(PDCP);
}
set_comp_log(ENB_APP, LOG_INFO, LOG_HIGH, 1);
if (online_log_messages == 1) {
set_component_filelog(RRC);
set_component_filelog(PDCP);
}
if (ouput_vcd) {
if (UE_flag==1)
vcd_signal_dumper_init("/tmp/openair_dump_UE.vcd");
else
vcd_signal_dumper_init("/tmp/openair_dump_eNB.vcd");
}
if (ouput_vcd) {
if (UE_flag==1)
vcd_signal_dumper_init("/tmp/openair_dump_UE.vcd");
else
vcd_signal_dumper_init("/tmp/openair_dump_eNB.vcd");
}
#if defined(ENABLE_ITTI)
if (UE_flag == 1) {
log_set_instance_type (LOG_INSTANCE_UE);
}
else {
log_set_instance_type (LOG_INSTANCE_ENB);
}
if (UE_flag == 1) {
log_set_instance_type (LOG_INSTANCE_UE);
}
else {
log_set_instance_type (LOG_INSTANCE_ENB);
}
itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, itti_dump_file);
itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, itti_dump_file);
#endif
#ifdef NAS_NETLINK
netlink_init();
netlink_init();
#endif
#if !defined(ENABLE_ITTI)
// to make a graceful exit when ctrl-c is pressed
signal(SIGSEGV, signal_handler);
signal(SIGINT, signal_handler);
// to make a graceful exit when ctrl-c is pressed
signal(SIGSEGV, signal_handler);
signal(SIGINT, signal_handler);
#endif
#ifndef RTAI
check_clock();
#endif
// init the parameters
frame_parms->N_RB_DL = 25;
frame_parms->N_RB_UL = 25;
frame_parms->Ncp = 0;
frame_parms->Ncp_UL = 0;
frame_parms->Nid_cell = Nid_cell;
frame_parms->nushift = 0;
if (UE_flag==0)
{
switch (transmission_mode) {
case 1:
frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = 1;
break;
case 2:
case 5:
case 6:
frame_parms->nb_antennas_tx = 2;
frame_parms->nb_antennas_rx = 2;
break;
default:
printf("Unsupported transmission mode %d\n",transmission_mode);
exit(-1);
}
}
else
{ //UE_flag==1
check_clock();
#endif
// init the parameters
frame_parms->N_RB_DL = N_RB_DL;
frame_parms->N_RB_UL = N_RB_DL;
frame_parms->Ncp = NORMAL;
frame_parms->Ncp_UL = NORMAL;
frame_parms->Nid_cell = Nid_cell;
frame_parms->nushift = 0;
if (UE_flag==0)
{
switch (transmission_mode) {
case 1:
frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = 1;
break;
case 2:
case 5:
case 6:
frame_parms->nb_antennas_tx = 2;
frame_parms->nb_antennas_rx = 2;
break;
default:
printf("Unsupported transmission mode %d\n",transmission_mode);
exit(-1);
}
frame_parms->nb_antennas_tx_eNB = (transmission_mode == 1) ? 1 : 2; //initial value overwritten by initial sync later
frame_parms->mode1_flag = (transmission_mode == 1) ? 1 : 0;
frame_parms->phich_config_common.phich_resource = oneSixth;
frame_parms->phich_config_common.phich_duration = normal;
// UL RS Config
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 0;//n_DMRS1 set to 0
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 0;
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
init_ul_hopping(frame_parms);
init_frame_parms(frame_parms,1);
phy_init_top(frame_parms);
phy_init_lte_top(frame_parms);
//init prach for openair1 test
frame_parms->prach_config_common.rootSequenceIndex=22;
frame_parms->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
frame_parms->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;
// prach_fmt = get_prach_fmt(frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex, frame_parms->frame_type);
// N_ZC = (prach_fmt <4)?839:139;
if (UE_flag==1)
{
PHY_vars_UE_g = malloc(sizeof(PHY_VARS_UE*));
PHY_vars_UE_g[0] = init_lte_UE(frame_parms, UE_id,abstraction_flag,transmission_mode);
}
else
{ //UE_flag==1
frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = 1;
}
frame_parms->nb_antennas_tx_eNB = (transmission_mode == 1) ? 1 : 2; //initial value overwritten by initial sync later
frame_parms->mode1_flag = (transmission_mode == 1) ? 1 : 0;
frame_parms->phich_config_common.phich_resource = oneSixth;
frame_parms->phich_config_common.phich_duration = normal;
// UL RS Config
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 0;//n_DMRS1 set to 0
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 0;
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
init_ul_hopping(frame_parms);
init_frame_parms(frame_parms,1);
phy_init_top(frame_parms);
phy_init_lte_top(frame_parms);
//init prach for openair1 test
frame_parms->prach_config_common.rootSequenceIndex=22;
frame_parms->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
frame_parms->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;
// prach_fmt = get_prach_fmt(frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex, frame_parms->frame_type);
// N_ZC = (prach_fmt <4)?839:139;
if (UE_flag==1) {
PHY_vars_UE_g = malloc(sizeof(PHY_VARS_UE*));
PHY_vars_UE_g[0] = init_lte_UE(frame_parms, UE_id,abstraction_flag,transmission_mode);
#ifndef OPENAIR2
for (i=0;i<NUMBER_OF_eNB_MAX;i++) {
PHY_vars_UE_g[0]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
PHY_vars_UE_g[0]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
PHY_vars_UE_g[0]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
PHY_vars_UE_g[0]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = UE_id;
PHY_vars_UE_g[0]->scheduling_request_config[i].sr_ConfigIndex = 7+(UE_id%3);
PHY_vars_UE_g[0]->scheduling_request_config[i].dsr_TransMax = sr_n4;
}
for (i=0;i<NUMBER_OF_eNB_MAX;i++) {
PHY_vars_UE_g[0]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
PHY_vars_UE_g[0]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
PHY_vars_UE_g[0]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
PHY_vars_UE_g[0]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = UE_id;
PHY_vars_UE_g[0]->scheduling_request_config[i].sr_ConfigIndex = 7+(UE_id%3);
PHY_vars_UE_g[0]->scheduling_request_config[i].dsr_TransMax = sr_n4;
}
#endif
compute_prach_seq(&PHY_vars_UE_g[0]->lte_frame_parms.prach_config_common,
PHY_vars_UE_g[0]->lte_frame_parms.frame_type,
PHY_vars_UE_g[0]->X_u);
PHY_vars_UE_g[0]->lte_ue_pdcch_vars[0]->crnti = 0x1234;
compute_prach_seq(&PHY_vars_UE_g[0]->lte_frame_parms.prach_config_common,
PHY_vars_UE_g[0]->lte_frame_parms.frame_type,
PHY_vars_UE_g[0]->X_u);
PHY_vars_UE_g[0]->lte_ue_pdcch_vars[0]->crnti = 0x1234;
#ifndef OPENAIR2
PHY_vars_UE_g[0]->lte_ue_pdcch_vars[0]->crnti = 0x1235;
PHY_vars_UE_g[0]->lte_ue_pdcch_vars[0]->crnti = 0x1235;
#endif
NB_UE_INST=1;
NB_INST=1;
NB_UE_INST=1;
NB_INST=1;
openair_daq_vars.manual_timing_advance = 0;
//openair_daq_vars.timing_advance = TIMING_ADVANCE_HW;
openair_daq_vars.rx_gain_mode = DAQ_AGC_ON;
openair_daq_vars.auto_freq_correction = 0;
openair_daq_vars.use_ia_receiver = 0;
// if AGC is off, the following values will be used
for (i=0;i<4;i++)
rxgain[i] = 0;
for (i=0;i<4;i++) {
PHY_vars_UE_g[0]->rx_gain_max[i] = rxg_max[i];
PHY_vars_UE_g[0]->rx_gain_med[i] = rxg_med[i];
PHY_vars_UE_g[0]->rx_gain_byp[i] = rxg_byp[i];
}
if ((mode == normal_txrx) || (mode == rx_calib_ue) || (mode == no_L2_connect) || (mode == debug_prach)) {
for (i=0; i<4; i++) {
PHY_vars_UE_g[0]->rx_gain_mode[i] = max_gain;
// frame_parms->rfmode[i] = rf_mode_max[i];
rf_mode[i] = (rf_mode[i] & (~LNAGAINMASK)) | LNAMax;
}
PHY_vars_UE_g[0]->rx_total_gain_dB = PHY_vars_UE_g[0]->rx_gain_max[0] + rxgain[0] - 30; //-30 because it was calibrated with a 30dB gain
}
else if ((mode == rx_calib_ue_med)) {
for (i=0; i<4; i++) {
PHY_vars_UE_g[0]->rx_gain_mode[i] = med_gain;
// frame_parms->rfmode[i] = rf_mode_med[i];
rf_mode[i] = (rf_mode[i] & (~LNAGAINMASK)) | LNAMed;
}
PHY_vars_UE_g[0]->rx_total_gain_dB = PHY_vars_UE_g[0]->rx_gain_med[0] + rxgain[0] - 30; //-30 because it was calibrated with a 30dB gain;
}
else if ((mode == rx_calib_ue_byp)) {
for (i=0; i<4; i++) {
PHY_vars_UE_g[0]->rx_gain_mode[i] = byp_gain;
// frame_parms->rfmode[i] = rf_mode_byp[i];
rf_mode[i] = (rf_mode[i] & (~LNAGAINMASK)) | LNAByp;
}
PHY_vars_UE_g[0]->rx_total_gain_dB = PHY_vars_UE_g[0]->rx_gain_byp[0] + rxgain[0] - 30; //-30 because it was calibrated with a 30dB gain;
}
openair_daq_vars.manual_timing_advance = 0;
//openair_daq_vars.timing_advance = TIMING_ADVANCE_HW;
openair_daq_vars.rx_gain_mode = DAQ_AGC_ON;
openair_daq_vars.auto_freq_correction = 0;
openair_daq_vars.use_ia_receiver = 0;
PHY_vars_UE_g[0]->tx_power_max_dBm = tx_max_power;
for (i=0;i<4;i++) {
PHY_vars_UE_g[0]->rx_gain_max[i] = rxg_max[i];
// PHY_vars_UE_g[0]->rx_gain_med[i] = rxg_med[i];
// PHY_vars_UE_g[0]->rx_gain_byp[i] = rxg_byp[i];
}
// printf("tx_max_power = %d -> amp %d\n",tx_max_power,get_tx_amp(tx_max_power,tx_max_power));
}
else
{ //this is eNB
PHY_vars_eNB_g = malloc(sizeof(PHY_VARS_eNB*));
PHY_vars_eNB_g[0] = init_lte_eNB(frame_parms,eNB_id,Nid_cell,cooperation_flag,transmission_mode,abstraction_flag);
if ((mode == normal_txrx) || (mode == rx_calib_ue) || (mode == no_L2_connect) || (mode == debug_prach)) {
for (i=0;i<4;i++)
openair0_cfg.rxg_mode[i] = max_gain;
PHY_vars_UE_g[0]->rx_total_gain_dB = PHY_vars_UE_g[0]->rx_gain_max[0] + (int)rx_gain - 30; //-30 because it was calibrated with a 30dB gain
}
else if ((mode == rx_calib_ue_med)) {
for (i=0;i<4;i++)
openair0_cfg.rxg_mode[i] = med_gain;
PHY_vars_UE_g[0]->rx_total_gain_dB = PHY_vars_UE_g[0]->rx_gain_med[0] + (int)rx_gain - 30; //-30 because it was calibrated with a 30dB gain;
}
else if ((mode == rx_calib_ue_byp)) {
for (i=0;i<4;i++)
openair0_cfg.rxg_mode[i] = byp_gain;
PHY_vars_UE_g[0]->rx_total_gain_dB = PHY_vars_UE_g[0]->rx_gain_byp[0] + (int)rx_gain - 30; //-30 because it was calibrated with a 30dB gain;
}
PHY_vars_UE_g[0]->tx_power_max_dBm = tx_max_power;
// printf("tx_max_power = %d -> amp %d\n",tx_max_power,get_tx_amp(tx_max_power,tx_max_power));
}
else
{ //this is eNB
PHY_vars_eNB_g = malloc(sizeof(PHY_VARS_eNB*));
PHY_vars_eNB_g[0] = init_lte_eNB(frame_parms,eNB_id,Nid_cell,cooperation_flag,transmission_mode,abstraction_flag);
#ifndef OPENAIR2
for (i=0;i<NUMBER_OF_UE_MAX;i++) {
PHY_vars_eNB_g[0]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
PHY_vars_eNB_g[0]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
PHY_vars_eNB_g[0]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
PHY_vars_eNB_g[0]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = i;
PHY_vars_eNB_g[0]->scheduling_request_config[i].sr_ConfigIndex = 7+(i%3);
PHY_vars_eNB_g[0]->scheduling_request_config[i].dsr_TransMax = sr_n4;
}
for (i=0;i<NUMBER_OF_UE_MAX;i++) {
PHY_vars_eNB_g[0]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
PHY_vars_eNB_g[0]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
PHY_vars_eNB_g[0]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
PHY_vars_eNB_g[0]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = i;
PHY_vars_eNB_g[0]->scheduling_request_config[i].sr_ConfigIndex = 7+(i%3);
PHY_vars_eNB_g[0]->scheduling_request_config[i].dsr_TransMax = sr_n4;
}
#endif
compute_prach_seq(&PHY_vars_eNB_g[0]->lte_frame_parms.prach_config_common,
PHY_vars_eNB_g[0]->lte_frame_parms.frame_type,
PHY_vars_eNB_g[0]->X_u);
compute_prach_seq(&PHY_vars_eNB_g[0]->lte_frame_parms.prach_config_common,
PHY_vars_eNB_g[0]->lte_frame_parms.frame_type,
PHY_vars_eNB_g[0]->X_u);
NB_eNB_INST=1;
NB_INST=1;
NB_eNB_INST=1;
NB_INST=1;
openair_daq_vars.ue_dl_rb_alloc=0x1fff;
openair_daq_vars.target_ue_dl_mcs=16;
openair_daq_vars.ue_ul_nb_rb=6;
openair_daq_vars.target_ue_ul_mcs=6;
openair_daq_vars.ue_dl_rb_alloc=0x1fff;
openair_daq_vars.target_ue_dl_mcs=16;
openair_daq_vars.ue_ul_nb_rb=6;
openair_daq_vars.target_ue_ul_mcs=6;
// if AGC is off, the following values will be used
for (i=0;i<4;i++)
rxgain[i]=10;
// set eNB to max gain
PHY_vars_eNB_g[0]->rx_total_gain_eNB_dB = rxg_max[0] + rxgain[0] - 30; //was measured at rxgain=30;
for (i=0; i<4; i++) {
// frame_parms->rfmode[i] = rf_mode_max[i];
rf_mode[i] = (rf_mode[i] & (~LNAGAINMASK)) | LNAMax;
}
}
// Initialize card
ret = openair0_open();
if ( ret != 0 ) {
if (ret == -1)
printf("Error opening /dev/openair0");
if (ret == -2)
printf("Error mapping bigshm");
if (ret == -3)
printf("Error mapping RX or TX buffer");
return(ret);
// set eNB to max gain
PHY_vars_eNB_g[0]->rx_total_gain_eNB_dB = rxg_max[0] + (int)rx_gain - 30; //was measured at rxgain=30;
for (i=0;i<4;i++)
openair0_cfg.rxg_mode[i] = max_gain;
}
printf ("Detected %d number of cards, %d number of antennas.\n", openair0_num_detected_cards, openair0_num_antennas[card]);
p_exmimo_config = openair0_exmimo_pci[card].exmimo_config_ptr;
p_exmimo_id = openair0_exmimo_pci[card].exmimo_id_ptr;
printf("Card %d: ExpressMIMO %d, HW Rev %d, SW Rev 0x%d\n", card, p_exmimo_id->board_exmimoversion, p_exmimo_id->board_hwrev, p_exmimo_id->board_swrev);
// check if the software matches firmware
if (p_exmimo_id->board_swrev!=BOARD_SWREV_CNTL2) {
printf("Software revision %d and firmware revision %d do not match. Please update either the firmware or the software!\n",BOARD_SWREV_CNTL2,p_exmimo_id->board_swrev);
exit(-1);
}
if (p_exmimo_id->board_swrev>=9)
p_exmimo_config->framing.eNB_flag = 0;
else
p_exmimo_config->framing.eNB_flag = !UE_flag;
p_exmimo_config->framing.tdd_config = DUPLEXMODE_FDD + TXRXSWITCH_LSB;
#if (BOARD_SWREV_CNTL2>=0x0A)
p_exmimo_config->framing.resampling_factor[ant] = 2;
#else
for (ant=0; ant<4; ant++)
p_exmimo_config->framing.resampling_factor = 2;
#endif
for (ant=0;ant<max(frame_parms->nb_antennas_tx,frame_parms->nb_antennas_rx);ant++)
p_exmimo_config->rf.rf_mode[ant] = RF_MODE_BASE;
for (ant=0;ant<frame_parms->nb_antennas_tx;ant++)
p_exmimo_config->rf.rf_mode[ant] += (TXEN + DMAMODE_TX);
for (ant=0;ant<frame_parms->nb_antennas_rx;ant++)
p_exmimo_config->rf.rf_mode[ant] += (RXEN + DMAMODE_RX);
for (ant=max(frame_parms->nb_antennas_tx,frame_parms->nb_antennas_rx);ant<4;ant++) {
p_exmimo_config->rf.rf_mode[ant] = 0;
carrier_freq[ant] = 0; //this turns off all other LIMEs
downlink_frequency[ant] = 0; //this turns off all other LIMEs
uplink_frequency_offset[ant] = 0;
}
dump_frame_parms(frame_parms);
/*
ant_offset = 0;
for (ant=0; ant<4; ant++) {
if (ant==ant_offset) {
//if (1) {
p_exmimo_config->rf.rf_mode[ant] = rf_mode_base;
p_exmimo_config->rf.rf_mode[ant] += (TXEN + DMAMODE_TX);
p_exmimo_config->rf.rf_mode[ant] += (RXEN + DMAMODE_RX);
}
else {
p_exmimo_config->rf.rf_mode[ant] = 0;
downlink_frequency[ant] = 0; //this turns off all other LIMEs
}
}
*/
for (ant = 0; ant<4; ant++) {
p_exmimo_config->rf.do_autocal[ant] = 1;
if (UE_flag==0) {
/* eNB */
if (frame_parms->frame_type == FDD) {
p_exmimo_config->rf.rf_freq_rx[ant] = downlink_frequency[ant] + uplink_frequency_offset[ant];
} else {
p_exmimo_config->rf.rf_freq_rx[ant] = downlink_frequency[ant];
}
p_exmimo_config->rf.rf_freq_tx[ant] = downlink_frequency[ant];
} else {
/* UE */
p_exmimo_config->rf.rf_freq_rx[ant] = carrier_freq[ant];
if (frame_parms->frame_type == FDD) {
p_exmimo_config->rf.rf_freq_tx[ant] = carrier_freq[ant] + uplink_frequency_offset[ant];
} else {
p_exmimo_config->rf.rf_freq_tx[ant] = carrier_freq[ant];
}
}
p_exmimo_config->rf.rx_gain[ant][0] = rxgain[ant];
p_exmimo_config->rf.tx_gain[ant][0] = txgain[ant];
p_exmimo_config->rf.rf_local[ant] = rf_local[ant];
p_exmimo_config->rf.rf_rxdc[ant] = rf_rxdc[ant];
if(frame_parms->N_RB_DL == 100) {
sample_rate = 30.72e6;
#ifdef USRP
samples_per_packets = 2048;
samples_per_frame = 307200;
// from usrp_time_offset
tx_forward_nsamps = 175;
sf_bounds = sf_bounds_20;
max_cnt = 150;
tx_delay = 8;
#endif
}
else if(frame_parms->N_RB_DL == 50){
sample_rate = 15.36e6;
#ifdef USRP
samples_per_packets = 2048;
samples_per_frame = 153600;
tx_forward_nsamps = 95;
sf_bounds = sf_bounds_10;
max_cnt = 75;
tx_delay = 4;
#endif
}
else if (frame_parms->N_RB_DL == 25) {
sample_rate = 7.68e6;
#ifdef USRP
samples_per_packets = 1024;
samples_per_frame = 76800;
tx_forward_nsamps = 70;
sf_bounds = sf_bounds_5;
max_cnt = 75;
tx_delay = 4;
#endif
}
mac_xface = malloc(sizeof(MAC_xface));
if ((downlink_frequency[ant] >= 850000000) && (downlink_frequency[ant] <= 865000000)) {
p_exmimo_config->rf.rf_vcocal[ant] = rf_vcocal_850[ant];
p_exmimo_config->rf.rffe_band_mode[ant] = DD_TDD;
}
else if ((downlink_frequency[ant] >= 1900000000) && (downlink_frequency[ant] <= 2000000000)) {
p_exmimo_config->rf.rf_vcocal[ant] = rf_vcocal[ant];
p_exmimo_config->rf.rffe_band_mode[ant] = B19G_TDD;
}
else {
p_exmimo_config->rf.rf_vcocal[ant] = rf_vcocal[ant];
p_exmimo_config->rf.rffe_band_mode[ant] = 0;
}
p_exmimo_config->rf.rffe_gain_txlow[ant] = 31;
p_exmimo_config->rf.rffe_gain_txhigh[ant] = 31;
p_exmimo_config->rf.rffe_gain_rxfinal[ant] = 52;
p_exmimo_config->rf.rffe_gain_rxlow[ant] = 31;
openair0_cfg.sample_rate = sample_rate;
openair0_cfg.tx_num_channels = frame_parms->nb_antennas_tx;
openair0_cfg.rx_num_channels = frame_parms->nb_antennas_rx;
for (i=0;i<4;i++) {
if (UE_flag==0) {
openair0_cfg.tx_freq[i] = downlink_frequency[i]+uplink_frequency_offset[i];
openair0_cfg.rx_freq[i] = downlink_frequency[i];
}
dump_frame_parms(frame_parms);
else {
openair0_cfg.rx_freq[i] = downlink_frequency[i]+uplink_frequency_offset[i];
openair0_cfg.tx_freq[i] = downlink_frequency[i];
}
}
openair0_cfg.tx_bw = bw;
openair0_cfg.rx_bw = bw;
for (i=0;i<4;i++) {
openair0_cfg.tx_gain[i] = tx_gain;
openair0_cfg.rx_gain[i] = rx_gain;
}
mac_xface = malloc(sizeof(MAC_xface));
openair0_device_init(&openair0, &openair0_cfg);
#ifdef OPENAIR2
int eMBMS_active=0;
int eMBMS_active=0;
l2_init(frame_parms,eMBMS_active,
0,// cba_group_active
0); // HO flag
if (UE_flag == 1)
mac_xface->dl_phy_sync_success (0, 0, 0, 1);
else
mac_xface->mrbch_phy_sync_failure (0, 0, 0);
l2_init(frame_parms,eMBMS_active,
0,// cba_group_active
0); // HO flag
if (UE_flag == 1)
mac_xface->dl_phy_sync_success (0, 0, 0, 1);
else
mac_xface->mrbch_phy_sync_failure (0, 0, 0);
#endif
mac_xface->macphy_exit = &exit_fun;
mac_xface->macphy_exit = &exit_fun;
#if defined(ENABLE_ITTI)
if (create_tasks(UE_flag ? 0 : 1, UE_flag ? 1 : 0) < 0) {
exit(-1); // need a softer mode
}
printf("ITTI tasks created\n");
if (create_tasks(UE_flag ? 0 : 1, UE_flag ? 1 : 0) < 0) {
exit(-1); // need a softer mode
}
printf("ITTI tasks created\n");
#endif
#ifdef OPENAIR2
//if (otg_enabled) {
init_all_otg(0);
g_otg->seed = 0;
init_seeds(g_otg->seed);
g_otg->num_nodes = 2;
for (i=0; i<g_otg->num_nodes; i++){
for (j=0; j<g_otg->num_nodes; j++){
g_otg->application_idx[i][j] = 1;
//g_otg->packet_gen_type=SUBSTRACT_STRING;
g_otg->aggregation_level[i][j][0]=1;
g_otg->application_type[i][j][0] = BCBR; //MCBR, BCBR
}
//if (otg_enabled) {
init_all_otg(0);
g_otg->seed = 0;
init_seeds(g_otg->seed);
g_otg->num_nodes = 2;
for (i=0; i<g_otg->num_nodes; i++){
for (j=0; j<g_otg->num_nodes; j++){
g_otg->application_idx[i][j] = 1;
//g_otg->packet_gen_type=SUBSTRACT_STRING;
g_otg->aggregation_level[i][j][0]=1;
g_otg->application_type[i][j][0] = BCBR; //MCBR, BCBR
}
init_predef_traffic(UE_flag ? 1 : 0, UE_flag ? 0 : 1);
// }
}
init_predef_traffic(UE_flag ? 1 : 0, UE_flag ? 0 : 1);
// }
#endif
#ifdef OPENAIR2
//init_pdcp_thread();
#endif
// number_of_cards = openair0_num_detected_cards;
number_of_cards = openair0_num_detected_cards;
if (p_exmimo_id->board_exmimoversion==1) //ExpressMIMO1
openair_daq_vars.timing_advance = 138;
else //ExpressMIMO2
openair_daq_vars.timing_advance = 0;
openair_daq_vars.timing_advance = 0;
// connect the TX/RX buffers
if (UE_flag==1)
{
setup_ue_buffers(PHY_vars_UE_g[0],frame_parms,ant_offset);
printf("Setting UE buffer to all-RX\n");
// Set LSBs for antenna switch (ExpressMIMO)
for (i=0; i<frame_parms->samples_per_tti*10; i++)
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++)
PHY_vars_UE_g[0]->lte_ue_common_vars.txdata[aa][i] = 0x00010001;
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
}
else
{
setup_eNB_buffers(PHY_vars_eNB_g[0],frame_parms,ant_offset);
if (fs4_test==0)
{
printf("Setting eNB buffer to all-RX\n");
// Set LSBs for antenna switch (ExpressMIMO)
for (i=0; i<frame_parms->samples_per_tti*10; i++)
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++)
PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa][i] = 0x00010001;
// Set the last OFDM symbol of subframe 4 to TX to allow enough time for switch to settle
// (that's ok since the last symbol can be configured as SRS)
/*
for (i=frame_parms->samples_per_tti*5-0*(frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
i<frame_parms->samples_per_tti*5; i++)
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++)
PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa][i] = 0x0;
*/
}
else
{
printf("Setting eNB buffer to fs/4 test signal\n");
for (j=0; j<PHY_vars_eNB_g[0]->lte_frame_parms.samples_per_tti*10; j+=4)
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++)
{
amp = 0x8000;
((short*)PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa])[2*j+1] = 0;
((short*)PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa])[2*j+3] = amp-1;
((short*)PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa])[2*j+5] = 0;
((short*)PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa])[2*j+7] = amp;
((short*)PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa])[2*j] = amp-1;
((short*)PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa])[2*j+2] = 0;
((short*)PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa])[2*j+4] = amp;
((short*)PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa])[2*j+6] = 0;
}
}
}
openair0_dump_config(card);
// connect the TX/RX buffers
if (UE_flag==1) {
setup_ue_buffers(PHY_vars_UE_g[0],frame_parms,ant_offset);
printf("Setting UE buffer to all-RX\n");
// Set LSBs for antenna switch (ExpressMIMO)
for (i=0; i<frame_parms->samples_per_tti*10; i++)
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++)
PHY_vars_UE_g[0]->lte_ue_common_vars.txdata[aa][i] = 0x00010001;
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
}
else {
setup_eNB_buffers(PHY_vars_eNB_g[0],frame_parms,ant_offset);
printf("Setting eNB buffer to all-RX\n");
// Set LSBs for antenna switch (ExpressMIMO)
for (i=0; i<frame_parms->samples_per_tti*10; i++)
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++)
PHY_vars_eNB_g[0]->lte_eNB_common_vars.txdata[0][aa][i] = 0x00010001;
}
printf("EXMIMO_CONFIG: rf_mode 0x %x %x %x %x, [0]: TXRXEn %d, TXLPFEn %d, TXLPF %d, RXLPFEn %d, RXLPF %d, RFBB %d, LNA %d, LNAGain %d, RXLPFMode %d, SWITCH %d, rf_rxdc %d, rf_local %d, rf_vcocal %d\n",
p_exmimo_config->rf.rf_mode[0],
p_exmimo_config->rf.rf_mode[1],
p_exmimo_config->rf.rf_mode[2],
p_exmimo_config->rf.rf_mode[3],
(p_exmimo_config->rf.rf_mode[0]&3), // RXen+TXen
(p_exmimo_config->rf.rf_mode[0]&4)>>2, //TXLPFen
(p_exmimo_config->rf.rf_mode[0]&TXLPFMASK)>>3, //TXLPF
(p_exmimo_config->rf.rf_mode[0]&128)>>7, //RXLPFen
(p_exmimo_config->rf.rf_mode[0]&RXLPFMASK)>>8, //TXLPF
(p_exmimo_config->rf.rf_mode[0]&RFBBMASK)>>16, // RFBB mode
(p_exmimo_config->rf.rf_mode[0]&LNAMASK)>>12, // RFBB mode
(p_exmimo_config->rf.rf_mode[0]&LNAGAINMASK)>>14, // RFBB mode
(p_exmimo_config->rf.rf_mode[0]&RXLPFMODEMASK)>>19, // RXLPF mode
(p_exmimo_config->framing.tdd_config&TXRXSWITCH_MASK)>>1, // Switch mode
p_exmimo_config->rf.rf_rxdc[0],
p_exmimo_config->rf.rf_local[0],
p_exmimo_config->rf.rf_vcocal[0]);
for (ant=0;ant<4;ant++)
p_exmimo_config->rf.do_autocal[ant] = 0;
openair0_dump_config(card);
/*
for (ant=0;ant<4;ant++)
p_exmimo_config->rf.do_autocal[ant] = 0;
*/
#ifdef EMOS
error_code = rtf_create(CHANSOUNDER_FIFO_MINOR,CHANSOUNDER_FIFO_SIZE);
if (error_code==0)
printf("[OPENAIR][SCHED][INIT] Created EMOS FIFO %d\n",CHANSOUNDER_FIFO_MINOR);
else if (error_code==ENODEV)
printf("[OPENAIR][SCHED][INIT] Problem: EMOS FIFO %d is greater than or equal to RTF_NO\n",CHANSOUNDER_FIFO_MINOR);
else if (error_code==ENOMEM)
printf("[OPENAIR][SCHED][INIT] Problem: cannot allocate memory for EMOS FIFO %d\n",CHANSOUNDER_FIFO_MINOR);
else
printf("[OPENAIR][SCHED][INIT] Problem creating EMOS FIFO %d, error_code %d\n",CHANSOUNDER_FIFO_MINOR,error_code);
error_code = rtf_create(CHANSOUNDER_FIFO_MINOR,CHANSOUNDER_FIFO_SIZE);
if (error_code==0)
printf("[OPENAIR][SCHED][INIT] Created EMOS FIFO %d\n",CHANSOUNDER_FIFO_MINOR);
else if (error_code==ENODEV)
printf("[OPENAIR][SCHED][INIT] Problem: EMOS FIFO %d is greater than or equal to RTF_NO\n",CHANSOUNDER_FIFO_MINOR);
else if (error_code==ENOMEM)
printf("[OPENAIR][SCHED][INIT] Problem: cannot allocate memory for EMOS FIFO %d\n",CHANSOUNDER_FIFO_MINOR);
else
printf("[OPENAIR][SCHED][INIT] Problem creating EMOS FIFO %d, error_code %d\n",CHANSOUNDER_FIFO_MINOR,error_code);
#endif
mlockall(MCL_CURRENT | MCL_FUTURE);
mlockall(MCL_CURRENT | MCL_FUTURE);
#ifdef RTAI
// make main thread LXRT soft realtime
/* task = */ rt_task_init_schmod(nam2num("MYTASK"), 9, 0, 0, SCHED_FIFO, 0xF);
// start realtime timer and scheduler
//rt_set_oneshot_mode();
rt_set_periodic_mode();
start_rt_timer(0);
//now = rt_get_time() + 10*PERIOD;
//rt_task_make_periodic(task, now, PERIOD);
printf("Init mutex\n");
//mutex = rt_get_adr(nam2num("MUTEX"));
mutex = rt_sem_init(nam2num("MUTEX"), 1);
if (mutex==0)
{
printf("Error init mutex\n");
exit(-1);
}
else
printf("mutex=%p\n",mutex);
// make main thread LXRT soft realtime
/* task = */ rt_task_init_schmod(nam2num("MYTASK"), 9, 0, 0, SCHED_FIFO, 0xF);
// start realtime timer and scheduler
//rt_set_oneshot_mode();
rt_set_periodic_mode();
start_rt_timer(0);
//now = rt_get_time() + 10*PERIOD;
//rt_task_make_periodic(task, now, PERIOD);
printf("Init mutex\n");
//mutex = rt_get_adr(nam2num("MUTEX"));
mutex = rt_sem_init(nam2num("MUTEX"), 1);
if (mutex==0)
{
printf("Error init mutex\n");
exit(-1);
}
else
printf("mutex=%p\n",mutex);
#endif
DAQ_MBOX = (volatile unsigned int *) openair0_exmimo_pci[card].rxcnt_ptr[0];
// this starts the DMA transfers
if (UE_flag!=1)
openair0_start_rt_acquisition(card);
// this starts the DMA transfers
if (UE_flag!=1)
openair0_start_rt_acquisition(card);
#ifdef XFORMS
if (do_forms==1) {
fl_initialize (&argc, argv, NULL, 0, 0);
form_stats = create_form_stats_form();
if (UE_flag==1) {
form_ue[UE_id] = create_lte_phy_scope_ue();
sprintf (title, "LTE DL SCOPE UE");
fl_show_form (form_ue[UE_id]->lte_phy_scope_ue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
} else {
for(UE_id=0;UE_id<scope_enb_num_ue;UE_id++) {
form_enb[UE_id] = create_lte_phy_scope_enb();
sprintf (title, "UE%d LTE UL SCOPE eNB",UE_id+1);
fl_show_form (form_enb[UE_id]->lte_phy_scope_enb, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
}
}
fl_show_form (form_stats->stats_form, FL_PLACE_HOTSPOT, FL_FULLBORDER, "stats");
if (UE_flag==0) {
for (UE_id=0;UE_id<scope_enb_num_ue;UE_id++) {
if (otg_enabled) {
fl_set_button(form_enb[UE_id]->button_0,1);
fl_set_object_label(form_enb[UE_id]->button_0,"DL Traffic ON");
}
else {
fl_set_button(form_enb[UE_id]->button_0,0);
fl_set_object_label(form_enb[UE_id]->button_0,"DL Traffic OFF");
}
}
if (do_forms==1) {
fl_initialize (&argc, argv, NULL, 0, 0);
form_stats = create_form_stats_form();
if (UE_flag==1) {
form_ue[UE_id] = create_lte_phy_scope_ue();
sprintf (title, "LTE DL SCOPE UE");
fl_show_form (form_ue[UE_id]->lte_phy_scope_ue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
} else {
for(UE_id=0;UE_id<scope_enb_num_ue;UE_id++) {
form_enb[UE_id] = create_lte_phy_scope_enb();
sprintf (title, "UE%d LTE UL SCOPE eNB",UE_id+1);
fl_show_form (form_enb[UE_id]->lte_phy_scope_enb, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
}
else {
if (openair_daq_vars.use_ia_receiver) {
fl_set_button(form_ue[UE_id]->button_0,1);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver ON");
}
fl_show_form (form_stats->stats_form, FL_PLACE_HOTSPOT, FL_FULLBORDER, "stats");
if (UE_flag==0) {
for (UE_id=0;UE_id<scope_enb_num_ue;UE_id++) {
if (otg_enabled) {
fl_set_button(form_enb[UE_id]->button_0,1);
fl_set_object_label(form_enb[UE_id]->button_0,"DL Traffic ON");
}
else {
fl_set_button(form_ue[UE_id]->button_0,0);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver OFF");
fl_set_button(form_enb[UE_id]->button_0,0);
fl_set_object_label(form_enb[UE_id]->button_0,"DL Traffic OFF");
}
}
ret = pthread_create(&thread2, NULL, scope_thread, NULL);
printf("Scope thread created, ret=%d\n",ret);
}
else {
if (openair_daq_vars.use_ia_receiver) {
fl_set_button(form_ue[UE_id]->button_0,1);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver ON");
}
else {
fl_set_button(form_ue[UE_id]->button_0,0);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver OFF");
}
}
ret = pthread_create(&thread2, NULL, scope_thread, NULL);
printf("Scope thread created, ret=%d\n",ret);
}
#endif
#ifdef EMOS
ret = pthread_create(&thread3, NULL, emos_thread, NULL);
printf("EMOS thread created, ret=%d\n",ret);
ret = pthread_create(&thread3, NULL, emos_thread, NULL);
printf("EMOS thread created, ret=%d\n",ret);
#endif
rt_sleep_ns(10*FRAME_PERIOD);
rt_sleep_ns(10*FRAME_PERIOD);
#ifndef RTAI
pthread_attr_init (&attr_dlsch_threads);
pthread_attr_setstacksize(&attr_dlsch_threads,OPENAIR_THREAD_STACK_SIZE);
//attr_dlsch_threads.priority = 1;
sched_param_dlsch.sched_priority = 90;//sched_get_priority_max(SCHED_FIFO); //OPENAIR_THREAD_PRIORITY;
pthread_attr_setschedparam (&attr_dlsch_threads, &sched_param_dlsch);
pthread_attr_setschedpolicy (&attr_dlsch_threads, SCHED_FIFO);
pthread_attr_init (&attr_dlsch_threads);
pthread_attr_setstacksize(&attr_dlsch_threads,OPENAIR_THREAD_STACK_SIZE);
//attr_dlsch_threads.priority = 1;
sched_param_dlsch.sched_priority = 90;//sched_get_priority_max(SCHED_FIFO); //OPENAIR_THREAD_PRIORITY;
pthread_attr_setschedparam (&attr_dlsch_threads, &sched_param_dlsch);
pthread_attr_setschedpolicy (&attr_dlsch_threads, SCHED_FIFO);
#endif
// start the main thread
if (UE_flag == 1) {
// start the main thread
if (UE_flag == 1) {
#ifndef USRP
#ifdef RTAI
thread1 = rt_thread_create(UE_thread, NULL, 100000000);
thread1 = rt_thread_create(UE_thread, NULL, 100000000);
#else
error_code = pthread_create(&thread1, &attr_dlsch_threads, UE_thread, NULL);
if (error_code!= 0) {
LOG_D(HW,"[lte-softmodem.c] Could not allocate UE_thread, error %d\n",error_code);
return(error_code);
}
else {
LOG_D(HW,"[lte-softmodem.c] Allocate UE_thread successful\n");
}
error_code = pthread_create(&thread1, &attr_dlsch_threads, UE_thread, NULL);
if (error_code!= 0) {
LOG_D(HW,"[lte-softmodem.c] Could not allocate UE_thread, error %d\n",error_code);
return(error_code);
}
else {
LOG_D(HW,"[lte-softmodem.c] Allocate UE_thread successful\n");
}
#endif
#ifdef DLSCH_THREAD
init_rx_pdsch_thread();
rt_sleep_ns(FRAME_PERIOD/10);
init_dlsch_threads();
init_rx_pdsch_thread();
rt_sleep_ns(FRAME_PERIOD/10);
init_dlsch_threads();
#endif
printf("UE threads created\n");
}
else {
if (multi_thread>0) {
init_eNB_proc();
LOG_D(HW,"[lte-softmodem.c] eNB threads created\n");
}
#ifdef RTAI
thread0 = rt_thread_create(eNB_thread, NULL, 100000000);
printf("UE threads created\n");
#else
error_code = pthread_create(&thread0, &attr_dlsch_threads, eNB_thread, NULL);
if (error_code!= 0) {
LOG_D(HW,"[lte-softmodem.c] Could not allocate eNB_thread, error %d\n",error_code);
return(error_code);
}
else {
LOG_D(HW,"[lte-softmodem.c] Allocate eNB_thread successful\n");
}
#endif
#ifdef ULSCH_THREAD
init_ulsch_threads();
printf("UE functionality not yet supported on USRP");
#endif
}
else {
if (multi_thread>0) {
init_eNB_proc();
LOG_D(HW,"[lte-softmodem.c] eNB threads created\n");
}
#ifdef RTAI
thread0 = rt_thread_create(eNB_thread, NULL, 100000000);
#else
error_code = pthread_create(&thread0, &attr_dlsch_threads, eNB_thread, NULL);
if (error_code!= 0) {
LOG_D(HW,"[lte-softmodem.c] Could not allocate eNB_thread, error %d\n",error_code);
return(error_code);
}
else {
LOG_D(HW,"[lte-softmodem.c] Allocate eNB_thread successful\n");
}
#endif
}
// wait for end of program
printf("TYPE <CTRL-C> TO TERMINATE\n");
//getchar();
// wait for end of program
printf("TYPE <CTRL-C> TO TERMINATE\n");
//getchar();
#if defined(ENABLE_ITTI)
printf("Entering ITTI signals handler\n");
itti_wait_tasks_end();
printf("Entering ITTI signals handler\n");
itti_wait_tasks_end();
#else
while (oai_exit==0)
rt_sleep_ns(FRAME_PERIOD);
while (oai_exit==0)
rt_sleep_ns(FRAME_PERIOD);
#endif
// stop threads
// stop threads
#ifdef XFORMS
printf("waiting for XFORMS thread\n");
if (do_forms==1)
{
pthread_join(thread2,&status);
fl_hide_form(form_stats->stats_form);
fl_free_form(form_stats->stats_form);
if (UE_flag==1) {
fl_hide_form(form_ue[UE_id]->lte_phy_scope_ue);
fl_free_form(form_ue[UE_id]->lte_phy_scope_ue);
} else {
for(UE_id=0;UE_id<scope_enb_num_ue;UE_id++) {
fl_hide_form(form_enb[UE_id]->lte_phy_scope_enb);
fl_free_form(form_enb[UE_id]->lte_phy_scope_enb);
}
}
printf("waiting for XFORMS thread\n");
if (do_forms==1)
{
pthread_join(thread2,&status);
fl_hide_form(form_stats->stats_form);
fl_free_form(form_stats->stats_form);
if (UE_flag==1) {
fl_hide_form(form_ue[UE_id]->lte_phy_scope_ue);
fl_free_form(form_ue[UE_id]->lte_phy_scope_ue);
} else {
for(UE_id=0;UE_id<scope_enb_num_ue;UE_id++) {
fl_hide_form(form_enb[UE_id]->lte_phy_scope_enb);
fl_free_form(form_enb[UE_id]->lte_phy_scope_enb);
}
}
}
#endif
printf("stopping MODEM threads\n");
// cleanup
if (UE_flag == 1) {
printf("stopping MODEM threads\n");
// cleanup
if (UE_flag == 1) {
#ifndef USRP
#ifdef RTAI
rt_thread_join(thread1);
rt_thread_join(thread1);
#else
pthread_join(thread1,&status);
pthread_join(thread1,&status);
#endif
#ifdef DLSCH_THREAD
cleanup_dlsch_threads();
cleanup_rx_pdsch_thread();
cleanup_dlsch_threads();
cleanup_rx_pdsch_thread();
#endif
}
else {
#endif
}
else {
#ifdef RTAI
rt_thread_join(thread0);
rt_thread_join(thread0);
#else
#ifdef DEBUG_THREADS
printf("Joining eNB_thread ...");
printf("Joining eNB_thread ...");
#endif
pthread_join(thread0,(void**)&eNB_thread_status_p);
pthread_join(thread0,(void**)&eNB_thread_status_p);
#ifdef DEBUG_THREADS
printf("status %d\n",*eNB_thread_status_p);
printf("status %d\n",*eNB_thread_status_p);
#endif
#endif
#ifdef ULSCH_THREAD
cleanup_ulsch_threads();
#endif
if (multi_thread>0) {
printf("Killing eNB processing threads\n");
kill_eNB_proc();
if (multi_thread>0) {
printf("Killing eNB processing threads\n");
kill_eNB_proc();
}
}
}
#ifdef OPENAIR2
//cleanup_pdcp_thread();
//cleanup_pdcp_thread();
#endif
#ifdef RTAI
stop_rt_timer();
stop_rt_timer();
#endif
printf("stopping card\n");
openair0_stop(card);
printf("closing openair0_lib\n");
openair0_close();
printf("stopping card\n");
openair0_stop(card);
printf("closing openair0_lib\n");
openair0_close();
#ifdef EMOS
printf("waiting for EMOS thread\n");
pthread_cancel(thread3);
pthread_join(thread3,&status);
printf("waiting for EMOS thread\n");
pthread_cancel(thread3);
pthread_join(thread3,&status);
#endif
#ifdef EMOS
error_code = rtf_destroy(CHANSOUNDER_FIFO_MINOR);
printf("[OPENAIR][SCHED][CLEANUP] EMOS FIFO closed, error_code %d\n", error_code);
error_code = rtf_destroy(CHANSOUNDER_FIFO_MINOR);
printf("[OPENAIR][SCHED][CLEANUP] EMOS FIFO closed, error_code %d\n", error_code);
#endif
if (ouput_vcd)
vcd_signal_dumper_close();
logClean();
if (ouput_vcd)
vcd_signal_dumper_close();
return 0;
}
void test_config(int card, int ant, unsigned int rf_mode, int UE_flag) {
p_exmimo_config->framing.eNB_flag = !UE_flag;
p_exmimo_config->framing.tdd_config = 0;
#if (BOARD_SWREV_CNTL2>=0x0A)
p_exmimo_config->framing.resampling_factor[ant] = 2;
#else
p_exmimo_config->framing.resampling_factor = 2;
#endif
logClean();
p_exmimo_config->rf.rf_freq_rx[ant] = 1907600000;
p_exmimo_config->rf.rf_freq_tx[ant] = 1907600000;;
p_exmimo_config->rf.rx_gain[ant][0] = 20;
p_exmimo_config->rf.tx_gain[ant][0] = 10;
p_exmimo_config->rf.rf_mode[ant] = rf_mode;
p_exmimo_config->rf.rf_local[ant] = build_rflocal(20,25,26,04);
p_exmimo_config->rf.rf_rxdc[ant] = build_rfdc(128, 128);
p_exmimo_config->rf.rf_vcocal[ant] = (0xE<<6) + 0xE;
}
return 0;
}
void setup_ue_buffers(PHY_VARS_UE *phy_vars_ue, LTE_DL_FRAME_PARMS *frame_parms, int carrier) {
void setup_ue_buffers(PHY_VARS_UE *phy_vars_ue, LTE_DL_FRAME_PARMS *frame_parms, int carrier) {
int i;
if (phy_vars_ue) {
if ((frame_parms->nb_antennas_rx>1) && (carrier>0)) {
printf("RX antennas > 1 and carrier > 0 not possible\n");
exit(-1);
}
int i;
if (phy_vars_ue) {
if ((frame_parms->nb_antennas_rx>1) && (carrier>0)) {
printf("RX antennas > 1 and carrier > 0 not possible\n");
exit(-1);
}
if ((frame_parms->nb_antennas_tx>1) && (carrier>0)) {
printf("TX antennas > 1 and carrier > 0 not possible\n");
exit(-1);
}
if ((frame_parms->nb_antennas_tx>1) && (carrier>0)) {
printf("TX antennas > 1 and carrier > 0 not possible\n");
exit(-1);
}
// replace RX signal buffers with mmaped HW versions
for (i=0;i<frame_parms->nb_antennas_rx;i++) {
free(phy_vars_ue->lte_ue_common_vars.rxdata[i]);
phy_vars_ue->lte_ue_common_vars.rxdata[i] = (int32_t*) openair0_exmimo_pci[card].adc_head[i+carrier];
// replace RX signal buffers with mmaped HW versions
for (i=0;i<frame_parms->nb_antennas_rx;i++) {
free(phy_vars_ue->lte_ue_common_vars.rxdata[i]);
phy_vars_ue->lte_ue_common_vars.rxdata[i] = (int32_t*) openair0_exmimo_pci[card].adc_head[i+carrier];
printf("rxdata[%d] @ %p\n",i,phy_vars_ue->lte_ue_common_vars.rxdata[i]);
}
for (i=0;i<frame_parms->nb_antennas_tx;i++) {
free(phy_vars_ue->lte_ue_common_vars.txdata[i]);
phy_vars_ue->lte_ue_common_vars.txdata[i] = (int32_t*) openair0_exmimo_pci[card].dac_head[i+carrier];
printf("rxdata[%d] @ %p\n",i,phy_vars_ue->lte_ue_common_vars.rxdata[i]);
}
for (i=0;i<frame_parms->nb_antennas_tx;i++) {
free(phy_vars_ue->lte_ue_common_vars.txdata[i]);
phy_vars_ue->lte_ue_common_vars.txdata[i] = (int32_t*) openair0_exmimo_pci[card].dac_head[i+carrier];
printf("txdata[%d] @ %p\n",i,phy_vars_ue->lte_ue_common_vars.txdata[i]);
}
printf("txdata[%d] @ %p\n",i,phy_vars_ue->lte_ue_common_vars.txdata[i]);
}
}
}
void setup_eNB_buffers(PHY_VARS_eNB *phy_vars_eNB, LTE_DL_FRAME_PARMS *frame_parms, int carrier) {
void setup_eNB_buffers(PHY_VARS_eNB *phy_vars_eNB, LTE_DL_FRAME_PARMS *frame_parms, int carrier) {
int i,j;
int i,j;
if (phy_vars_eNB) {
if ((frame_parms->nb_antennas_rx>1) && (carrier>0)) {
printf("RX antennas > 1 and carrier > 0 not possible\n");
exit(-1);
}
if (phy_vars_eNB) {
if ((frame_parms->nb_antennas_rx>1) && (carrier>0)) {
printf("RX antennas > 1 and carrier > 0 not possible\n");
exit(-1);
}
if ((frame_parms->nb_antennas_tx>1) && (carrier>0)) {
printf("TX antennas > 1 and carrier > 0 not possible\n");
exit(-1);
}
if ((frame_parms->nb_antennas_tx>1) && (carrier>0)) {
printf("TX antennas > 1 and carrier > 0 not possible\n");
exit(-1);
}
// replace RX signal buffers with mmaped HW versions
for (i=0;i<frame_parms->nb_antennas_rx;i++) {
free(phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i]);
phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i] = (int32_t*) openair0_exmimo_pci[card].adc_head[i+carrier];
printf("rxdata[%d] @ %p\n",i,phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i]);
for (j=0;j<16;j++) {
printf("rxbuffer %d: %x\n",j,phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i][j]);
phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i][j] = 16-j;
}
// replace RX signal buffers with mmaped HW versions
for (i=0;i<frame_parms->nb_antennas_rx;i++) {
free(phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i]);
phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i] = (int32_t*) openair0_exmimo_pci[card].adc_head[i+carrier];
printf("rxdata[%d] @ %p\n",i,phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i]);
for (j=0;j<16;j++) {
printf("rxbuffer %d: %x\n",j,phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i][j]);
phy_vars_eNB->lte_eNB_common_vars.rxdata[0][i][j] = 16-j;
}
for (i=0;i<frame_parms->nb_antennas_tx;i++) {
free(phy_vars_eNB->lte_eNB_common_vars.txdata[0][i]);
phy_vars_eNB->lte_eNB_common_vars.txdata[0][i] = (int32_t*) openair0_exmimo_pci[card].dac_head[i+carrier];
printf("txdata[%d] @ %p\n",i,phy_vars_eNB->lte_eNB_common_vars.txdata[0][i]);
for (j=0;j<16;j++) {
printf("txbuffer %d: %x\n",j,phy_vars_eNB->lte_eNB_common_vars.txdata[0][i][j]);
phy_vars_eNB->lte_eNB_common_vars.txdata[0][i][j] = 16-j;
}
}
for (i=0;i<frame_parms->nb_antennas_tx;i++) {
free(phy_vars_eNB->lte_eNB_common_vars.txdata[0][i]);
phy_vars_eNB->lte_eNB_common_vars.txdata[0][i] = (int32_t*) openair0_exmimo_pci[card].dac_head[i+carrier];
printf("txdata[%d] @ %p\n",i,phy_vars_eNB->lte_eNB_common_vars.txdata[0][i]);
for (j=0;j<16;j++) {
printf("txbuffer %d: %x\n",j,phy_vars_eNB->lte_eNB_common_vars.txdata[0][i][j]);
phy_vars_eNB->lte_eNB_common_vars.txdata[0][i][j] = 16-j;
}
}
}
}
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