Skip to content

O
OpenXG-RAN
Commit caa47c74 authored by francescomani's avatar francescomani
Browse files
Options

removing pdsch semi-static

parent bb396052
Hide whitespace changes
Inline Side-by-side
Showing with 272 additions and 375 deletions
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @ caa47c74
......@@ -3155,26 +3155,28 @@ int is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, sl
else return(slot_in_period >= slots1+tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
}
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI, int length) {
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype, int length) {
int l0;int dmrs_AdditionalPosition = 0;
int dmrs_AdditionalPosition = 0;
NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
LOG_D(MAC, "NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", NrOfSymbols, startSymbol, mappingtype_fromDCI, dmrs_TypeA_Position);
if (dmrs_TypeA_Position == NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2) l0=2;
else if (dmrs_TypeA_Position == NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos3) l0=3;
else AssertFatal(1==0,"Illegal dmrs_TypeA_Position %d\n",(int)dmrs_TypeA_Position);
LOG_D(MAC, "NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", NrOfSymbols, startSymbol, mappingtype, dmrs_TypeA_Position);
int l0 = 0; // type B
if (mappingtype == typeA) {
if (dmrs_TypeA_Position == NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2) l0=2;
else if (dmrs_TypeA_Position == NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos3) l0=3;
else AssertFatal(1==0,"Illegal dmrs_TypeA_Position %d\n",(int)dmrs_TypeA_Position);
}
// in case of DCI FORMAT 1_0 or dedicated pdsch config not received additionposition = pos2, len1 should be used
// referred to section 5.1.6.2 in 38.214
dmrs_AdditionalPosition = 2;
if (pdsch_Config != NULL) {
if (mappingtype_fromDCI == typeA) { // Type A
if (mappingtype == typeA) { // Type A
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA && pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup)
dmrs_config = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
} else if (mappingtype_fromDCI == typeB) {
} else if (mappingtype == typeB) {
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB && pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup)
dmrs_config = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
} else {
......@@ -3191,17 +3193,17 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
int32_t l_prime = -1;
// columns 0-3 for TypeA, 4-7 for TypeB
column = (mappingtype_fromDCI == typeA) ? dmrs_AdditionalPosition : (dmrs_AdditionalPosition + 4);
column = (mappingtype == typeA) ? dmrs_AdditionalPosition : (dmrs_AdditionalPosition + 4);
// Section 7.4.1.1.2 in Spec 38.211
// For PDSCH Mapping TypeA, ld is duration between first OFDM of the slot and last OFDM symbol of the scheduled PDSCH resources
// For TypeB, ld is the duration of the scheduled PDSCH resources
ld = (mappingtype_fromDCI == typeA) ? (NrOfSymbols + startSymbol) : NrOfSymbols;
ld = (mappingtype == typeA) ? (NrOfSymbols + startSymbol) : NrOfSymbols;
AssertFatal(ld > 2 && ld < 15,"Illegal NrOfSymbols according to Table 5.1.2.1-1 Spec 38.214 %d\n",ld);
AssertFatal((NrOfSymbols + startSymbol) < 15,"Illegal S+L according to Table 5.1.2.1-1 Spec 38.214 S:%d L:%d\n",startSymbol, NrOfSymbols);
if (mappingtype_fromDCI == typeA) {
if (mappingtype == typeA) {
// Section 7.4.1.1.2 in Spec 38.211
AssertFatal((l0 == 2) || (l0 == 3 && dmrs_AdditionalPosition != 3),"Wrong config, If dmrs_TypeA_Position POS3, ADD POS cannot be POS3 \n");
......@@ -3229,7 +3231,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, length);
AssertFatal(l_prime>=0,"ERROR in configuration.Check Time Domain allocation of this Grant. l_prime < 1. row:%d, column:%d\n", row, column);
l_prime = (mappingtype_fromDCI == typeA) ? (l_prime | l0) : (l_prime << startSymbol);
l_prime = (mappingtype == typeA) ? (l_prime | l0) : (l_prime << startSymbol);
LOG_D(MAC, " PDSCH DMRS MASK in HEX:%x\n", l_prime);
return l_prime;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @ caa47c74
......@@ -1145,8 +1145,6 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_SearchSpace_t *ss = ra->ra_ss;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = dl_bwp->tdaList;
long BWPStart = 0;
long BWPSize = 0;
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = NULL;
......@@ -1161,10 +1159,10 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
// Calculate number of symbols
int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
int startSymbolIndex, nrOfSymbols;
const int startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
NR_pdsch_tda_info_t tda_info;
nr_get_pdsch_tda_info(dl_bwp,
time_domain_assignment,
&tda_info);
NR_ControlResourceSet_t *coreset = ra->coreset;
......@@ -1172,7 +1170,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
uint16_t *vrb_map = cc[CC_id].vrb_map;
for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) {
if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) {
if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) {
rbStart += i;
i = 0;
}
......@@ -1212,9 +1210,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
return;
}
LOG_D(NR_MAC,"Msg2 startSymbolIndex.nrOfSymbols %d.%d\n",startSymbolIndex,nrOfSymbols);
int mappingtype = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
LOG_D(NR_MAC,"Msg2 startSymbolIndex.nrOfSymbols %d.%d\n",tda_info.startSymbolIndex,tda_info.nrOfSymbols);
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
......@@ -1244,16 +1240,14 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
// SCF222: PDU index incremented for each PDSCH PDU sent in TX control message. This is used to associate control
// information to data and is reset every slot.
const int pduindex = nr_mac->pdu_index[CC_id]++;
NR_PDSCH_Config_t *pdsch_Config = dl_bwp->pdsch_Config;
uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
int dmrsConfigType=0;
if (pdsch_Config &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type)
dmrsConfigType = 1;
NR_pdsch_dmrs_t dmrs_parms;
set_dl_dmrs_params(&dmrs_parms,
scc,
dl_bwp,
&tda_info,
1);
pdsch_pdu_rel15->pduBitmap = 0;
pdsch_pdu_rel15->rnti = ra->RA_rnti;
......@@ -1269,37 +1263,22 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
pdsch_pdu_rel15->nrOfLayers = 1;
pdsch_pdu_rel15->transmissionScheme = 0;
pdsch_pdu_rel15->refPoint = 0;
pdsch_pdu_rel15->dmrsConfigType = dmrsConfigType;
pdsch_pdu_rel15->dmrsConfigType = dmrs_parms.dmrsConfigType;
pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu_rel15->SCID = 0;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = nrOfSymbols <= 2 ? 1 : 2;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = dmrs_parms.numDmrsCdmGrpsNoData;
pdsch_pdu_rel15->dmrsPorts = 1;
pdsch_pdu_rel15->resourceAlloc = 1;
pdsch_pdu_rel15->rbStart = rbStart;
pdsch_pdu_rel15->rbSize = rbSize;
pdsch_pdu_rel15->VRBtoPRBMapping = 0;
pdsch_pdu_rel15->StartSymbolIndex = startSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = nrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(pdsch_Config,
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex,
mappingtype,
1);
pdsch_pdu_rel15->StartSymbolIndex = tda_info.startSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = tda_info.nrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dmrs_parms.dl_dmrs_symb_pos;
uint8_t tb_scaling = 0;
int R, Qm;
uint8_t N_PRB_DMRS;
uint32_t TBS=0;
if (dmrsConfigType == NFAPI_NR_DMRS_TYPE1) {
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
N_PRB_DMRS = pdsch_pdu_rel15->numDmrsCdmGrpsNoData*6;
}
else {
N_PRB_DMRS = pdsch_pdu_rel15->numDmrsCdmGrpsNoData*4;
}
uint16_t dmrs_length = get_num_dmrs(pdsch_pdu_rel15->dlDmrsSymbPos);
while(TBS<9) { // min TBS for RAR is 9 bytes
mcsIndex++;
......@@ -1308,8 +1287,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
TBS = nr_compute_tbs(Qm,
R,
rbSize,
nrOfSymbols,
N_PRB_DMRS*dmrs_length,
tda_info.nrOfSymbols,
dmrs_parms.N_PRB_DMRS*dmrs_parms.N_DMRS_SLOT,
0, // overhead
tb_scaling, // tb scaling
1)>>3; // layers
......@@ -1414,7 +1393,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
CCEIndex,
aggregation_level);
for (int rb = 0; rb < rbSize; rb++) {
vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(startSymbolIndex, nrOfSymbols);
vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
}
ra->state = WAIT_Msg3;
......@@ -1437,8 +1416,6 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_SearchSpace_t *ss = ra->ra_ss;
NR_ControlResourceSet_t *coreset = ra->coreset;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = dl_bwp->tdaList;
AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg4\n");
rnti_t tc_rnti = ra->rnti;
......@@ -1554,48 +1531,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
}
}
// Calculate number of symbols
int startSymbolIndex, nrOfSymbols;
const int startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
int mappingtype = pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL,
scc->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex,
mappingtype,
1);
uint16_t N_DMRS_SLOT = get_num_dmrs(dlDmrsSymbPos);
NR_PDSCH_Config_t *pdsch_Config = dl_bwp->pdsch_Config;
int dmrsConfigType=0;
if (pdsch_Config &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type)
dmrsConfigType = 1;
nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData = 2;
if (nrOfSymbols == 2) {
nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData = 1;
}
AssertFatal(nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData == 1
|| nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData == 2,
"nr_mac->schedCtrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData %d is not possible",
nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData);
NR_pdsch_tda_info_t msg4_tda;
nr_get_pdsch_tda_info(dl_bwp, time_domain_assignment, &msg4_tda);
uint8_t N_PRB_DMRS = 0;
if (dmrsConfigType==NFAPI_NR_DMRS_TYPE1) {
N_PRB_DMRS = nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
}
else {
N_PRB_DMRS = nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 4;
}
NR_pdsch_dmrs_t dmrs_info;
set_dl_dmrs_params(&dmrs_info,
scc,
dl_bwp,
&msg4_tda,
1);
uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
......@@ -1609,17 +1553,17 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
rbSize++;
else
mcsIndex++;
LOG_D(NR_MAC,"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d\n",N_PRB_DMRS,N_DMRS_SLOT);
LOG_D(NR_MAC,"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d\n",dmrs_info.N_PRB_DMRS,dmrs_info.N_DMRS_SLOT);
harq->tb_size = nr_compute_tbs(nr_get_Qm_dl(mcsIndex, mcsTableIdx),
nr_get_code_rate_dl(mcsIndex, mcsTableIdx),
rbSize, nrOfSymbols, N_PRB_DMRS * N_DMRS_SLOT, 0, tb_scaling,1) >> 3;
rbSize, msg4_tda.nrOfSymbols, dmrs_info.N_PRB_DMRS * dmrs_info.N_DMRS_SLOT, 0, tb_scaling,1) >> 3;
} while (harq->tb_size < ra->mac_pdu_length && mcsIndex<=28);
AssertFatal(harq->tb_size >= ra->mac_pdu_length,"Cannot allocate Msg4\n");
int i = 0;
while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) {
if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols)) {
rbStart += i+1;
i = 0;
} else {
......@@ -1687,18 +1631,18 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
pdsch_pdu_rel15->nrOfLayers = 1;
pdsch_pdu_rel15->transmissionScheme = 0;
pdsch_pdu_rel15->refPoint = 0;
pdsch_pdu_rel15->dmrsConfigType = dmrsConfigType;
pdsch_pdu_rel15->dmrsConfigType = dmrs_info.dmrsConfigType;
pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu_rel15->SCID = 0;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = nrOfSymbols <= 2 ? 1 : 2;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = dmrs_info.numDmrsCdmGrpsNoData;
pdsch_pdu_rel15->dmrsPorts = 1;
pdsch_pdu_rel15->resourceAlloc = 1;
pdsch_pdu_rel15->rbStart = rbStart;
pdsch_pdu_rel15->rbSize = rbSize;
pdsch_pdu_rel15->VRBtoPRBMapping = 0;
pdsch_pdu_rel15->StartSymbolIndex = startSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = nrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos;
pdsch_pdu_rel15->StartSymbolIndex = msg4_tda.startSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = msg4_tda.nrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dmrs_info.dl_dmrs_symb_pos;
int x_Overhead = 0;
nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, tb_scaling);
......@@ -1811,7 +1755,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
CCEIndex,
aggregation_level);
for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) {
vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] |= SL_to_bitmap(startSymbolIndex, nrOfSymbols);
vrb_map[BWPStart + rb + pdsch_pdu_rel15->rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols);
}
LOG_D(NR_MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @ caa47c74
......@@ -281,9 +281,8 @@ uint32_t schedule_control_sib1(module_id_t module_id,
int CC_id,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
int startSymbolIndex,
int nrOfSymbols,
uint16_t dlDmrsSymbPos,
NR_pdsch_dmrs_t *dmrs_parms,
NR_pdsch_tda_info_t *tda_info,
uint8_t candidate_idx,
uint16_t num_total_bytes) {
......@@ -309,8 +308,11 @@ uint32_t schedule_control_sib1(module_id_t module_id,
type0_PDCCH_CSS_config);
}
gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation = time_domain_allocation;
gNB_mac->sched_ctrlCommon->sched_pdsch.mcs = 0; // starting from mcs 0
NR_sched_pdsch_t *pdsch = &gNB_mac->sched_ctrlCommon->sched_pdsch;
pdsch->time_domain_allocation = time_domain_allocation;
pdsch->dmrs_parms = *dmrs_parms;
pdsch->tda_info = *tda_info;
pdsch->mcs = 0; // starting from mcs 0
gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes;
uint8_t nr_of_candidates;
......@@ -333,58 +335,49 @@ uint32_t schedule_control_sib1(module_id_t module_id,
const uint16_t bwpSize = type0_PDCCH_CSS_config->num_rbs;
int rbStart = type0_PDCCH_CSS_config->cset_start_rb;
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
if (nrOfSymbols == 2) {
gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData = 1;
} else {
gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData = 2;
}
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
LOG_D(MAC,"dlDmrsSymbPos %x\n",dlDmrsSymbPos);
uint8_t N_PRB_DMRS = pdsch->dmrs_parms.N_PRB_DMRS;
uint16_t dmrs_length = pdsch->dmrs_parms.N_DMRS_SLOT;
LOG_D(MAC,"dlDmrsSymbPos %x\n",pdsch->dmrs_parms.dl_dmrs_symb_pos);
int mcsTableIdx = 0;
int rbSize = 0;
uint32_t TBS = 0;
do {
if(rbSize < bwpSize && !(vrb_map[rbStart + rbSize]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)))
if(rbSize < bwpSize && !(vrb_map[rbStart + rbSize]&SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)))
rbSize++;
else{
if (gNB_mac->sched_ctrlCommon->sched_pdsch.mcs<10)
gNB_mac->sched_ctrlCommon->sched_pdsch.mcs++;
if (pdsch->mcs<10)
pdsch->mcs++;
else
break;
}
TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, mcsTableIdx),
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, mcsTableIdx),
rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0, 0,1) >> 3;
TBS = nr_compute_tbs(nr_get_Qm_dl(pdsch->mcs, mcsTableIdx),
nr_get_code_rate_dl(pdsch->mcs, mcsTableIdx),
rbSize, tda_info->nrOfSymbols, N_PRB_DMRS * dmrs_length,0, 0,1) >> 3;
} while (TBS < gNB_mac->sched_ctrlCommon->num_total_bytes);
AssertFatal(TBS>=gNB_mac->sched_ctrlCommon->num_total_bytes,"Couldn't allocate enough resources for %d bytes in SIB1 PDSCH\n",
gNB_mac->sched_ctrlCommon->num_total_bytes);
gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize = rbSize;
gNB_mac->sched_ctrlCommon->sched_pdsch.rbStart = 0;
pdsch->rbSize = rbSize;
pdsch->rbStart = 0;
LOG_D(NR_MAC,"mcs = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.mcs);
LOG_D(NR_MAC,"startSymbolIndex = %i\n", startSymbolIndex);
LOG_D(NR_MAC,"nrOfSymbols = %i\n", nrOfSymbols);
LOG_D(NR_MAC, "rbSize = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize);
LOG_D(NR_MAC,"mcs = %i\n", pdsch->mcs);
LOG_D(NR_MAC,"startSymbolIndex = %i\n", tda_info->startSymbolIndex);
LOG_D(NR_MAC,"nrOfSymbols = %i\n", tda_info->nrOfSymbols);
LOG_D(NR_MAC, "rbSize = %i\n", pdsch->rbSize);
LOG_D(NR_MAC,"TBS = %i\n", TBS);
LOG_D(NR_MAC,"dmrs_length %d\n",dmrs_length);
LOG_D(NR_MAC,"N_PRB_DMRS = %d\n",N_PRB_DMRS);
LOG_D(NR_MAC,"mappingtype = %d\n", mappingtype);
LOG_D(NR_MAC,"mappingtype = %d\n", tda_info->mapping_type);
// Mark the corresponding RBs as used
fill_pdcch_vrb_map(gNB_mac,
CC_id,
&gNB_mac->sched_ctrlCommon->sched_pdcch,
gNB_mac->sched_ctrlCommon->cce_index,
gNB_mac->sched_ctrlCommon->aggregation_level);
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
vrb_map[rb + rbStart] |= SL_to_bitmap(startSymbolIndex, nrOfSymbols);
for (int rb = 0; rb < pdsch->rbSize; rb++) {
vrb_map[rb + rbStart] |= SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
}
return TBS;
}
......@@ -395,13 +388,13 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
uint32_t TBS,
int StartSymbolIndex,
int NrOfSymbols,
uint16_t dlDmrsSymbPos) {
int NrOfSymbols) {
gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP];
NR_COMMON_channels_t *cc = gNB_mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int mcsTableIdx = 0;
NR_sched_pdsch_t *pdsch = &gNB_mac->sched_ctrlCommon->sched_pdsch;
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
......@@ -433,11 +426,11 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15->CyclicPrefix = 0;
pdsch_pdu_rel15->NrOfCodewords = 1;
pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, mcsTableIdx);
pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, mcsTableIdx);
pdsch_pdu_rel15->mcsIndex[0] = gNB_mac->sched_ctrlCommon->sched_pdsch.mcs;
pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(pdsch->mcs, mcsTableIdx);
pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(pdsch->mcs, mcsTableIdx);
pdsch_pdu_rel15->mcsIndex[0] = pdsch->mcs;
pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx;
pdsch_pdu_rel15->rvIndex[0] = 0;
pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[0];
pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
pdsch_pdu_rel15->nrOfLayers = 1;
pdsch_pdu_rel15->transmissionScheme = 0;
......@@ -445,16 +438,16 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15->dmrsConfigType = 0;
pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu_rel15->SCID = 0;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = pdsch->dmrs_parms.numDmrsCdmGrpsNoData;
pdsch_pdu_rel15->dmrsPorts = 1;
pdsch_pdu_rel15->resourceAlloc = 1;
pdsch_pdu_rel15->rbStart = gNB_mac->sched_ctrlCommon->sched_pdsch.rbStart;
pdsch_pdu_rel15->rbSize = gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize;
pdsch_pdu_rel15->rbStart = pdsch->rbStart;
pdsch_pdu_rel15->rbSize = pdsch->rbSize;
pdsch_pdu_rel15->VRBtoPRBMapping = 0;
pdsch_pdu_rel15->TBSize[0] = TBS;
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos;
pdsch_pdu_rel15->dlDmrsSymbPos = pdsch->dmrs_parms.dl_dmrs_symb_pos;
LOG_D(NR_MAC,"sib1:bwpStart %d, bwpSize %d\n",pdsch_pdu_rel15->BWPStart,pdsch_pdu_rel15->BWPSize);
LOG_D(NR_MAC,"sib1:rbStart %d, rbSize %d\n",pdsch_pdu_rel15->rbStart,pdsch_pdu_rel15->rbSize);
LOG_D(NR_MAC,"sib1:dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
......@@ -485,8 +478,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(
pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->rbStart, type0_PDCCH_CSS_config->num_rbs);
dci_payload.time_domain_assignment.val = gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation;
dci_payload.mcs = gNB_mac->sched_ctrlCommon->sched_pdsch.mcs;
dci_payload.time_domain_assignment.val = gNB_mac->sched_ctrlCommon->sched_pdsch.time_domain_allocation;
dci_payload.mcs = pdsch->mcs;
dci_payload.rv = pdsch_pdu_rel15->rvIndex[0];
dci_payload.harq_pid = 0;
dci_payload.ndi = 0;
......@@ -587,22 +580,30 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
AssertFatal((startSymbolIndex+nrOfSymbols)<14,"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",time_domain_allocation);
int mappingtype = is_typeA? typeA: typeB;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype, 1);
NR_pdsch_tda_info_t tda_info;
tda_info.mapping_type = is_typeA? typeA: typeB;
tda_info.startSymbolIndex = startSymbolIndex;
tda_info.nrOfSymbols = nrOfSymbols;
NR_pdsch_dmrs_t dmrs_parms;
set_dl_dmrs_params(&dmrs_parms,
scc,
NULL,
&tda_info,
1);
// Configure sched_ctrlCommon for SIB1
uint32_t TBS = schedule_control_sib1(module_idP, CC_id,
type0_PDCCH_CSS_config,
time_domain_allocation,
startSymbolIndex,
nrOfSymbols,
dlDmrsSymbPos,
&dmrs_parms,
&tda_info,
candidate_idx,
sib1_sdu_length);
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
int pdu_index = gNB_mac->pdu_index[0]++;
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols, dlDmrsSymbPos);
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols);
const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs;
nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @ caa47c74
......@@ -391,17 +391,12 @@ bool allocate_dl_retransmission(module_id_t module_id,
NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
NR_sched_pdsch_t *retInfo = &sched_ctrl->harq_processes[current_harq_pid].sched_pdsch;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
//TODO remove this and handle retransmission with old nrOfLayers
// once ps structure is removed
if(ps->nrOfLayers < retInfo->nrOfLayers) {
LOG_W(NR_MAC,"Cannot schedule retransmission. RI changed from %d to %d\n",
retInfo->nrOfLayers, ps->nrOfLayers);
abort_nr_dl_harq(UE, current_harq_pid);
remove_front_nr_list(&sched_ctrl->retrans_dl_harq);
return false;
}
NR_sched_pdsch_t *curInfo = &sched_ctrl->sched_pdsch;
// If the RI changed between current rtx and a previous transmission
// we need to verify if it is not decreased
// othwise it wouldn't be possible to transmit the same TBS
int layers = (curInfo->nrOfLayers < retInfo->nrOfLayers) ? curInfo->nrOfLayers : retInfo->nrOfLayers;
const int coresetid = sched_ctrl->coreset->controlResourceSetId;
const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : dl_bwp->BWPSize;
......@@ -411,13 +406,16 @@ bool allocate_dl_retransmission(module_id_t module_id,
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
if (tda == retInfo->time_domain_allocation) {
if (tda == retInfo->time_domain_allocation &&
layers == retInfo->nrOfLayers) {
NR_pdsch_tda_info_t *tda_info = &retInfo->tda_info;
/* Check that there are enough resources for retransmission */
while (rbSize < retInfo->rbSize) {
rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
rbSize = 0;
const int slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
const int slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
......@@ -431,30 +429,19 @@ bool allocate_dl_retransmission(module_id_t module_id,
rbSize < retInfo->rbSize)
rbSize++;
}
/* check whether we need to switch the TDA allocation since the last
* (re-)transmission */
if (ps->time_domain_allocation != tda) {
nr_set_pdsch_semi_static(dl_bwp,
scc,
tda,
ps->nrOfLayers,
sched_ctrl,
ps);
}
} else {
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
NR_pdsch_semi_static_t temp_ps = *ps;
nr_set_pdsch_semi_static(dl_bwp,
scc,
tda,
ps->nrOfLayers,
sched_ctrl,
&temp_ps);
const uint16_t slbitmap = SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols);
NR_pdsch_tda_info_t temp_tda;
nr_get_pdsch_tda_info(dl_bwp, tda, &temp_tda);
NR_pdsch_dmrs_t temp_dmrs;
set_dl_dmrs_params(&temp_dmrs,
scc,
dl_bwp,
&temp_tda,
layers);
const uint16_t slbitmap = SL_to_bitmap(temp_tda.startSymbolIndex, temp_tda.nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
......@@ -465,9 +452,9 @@ bool allocate_dl_retransmission(module_id_t module_id,
uint16_t new_rbSize;
bool success = nr_find_nb_rb(retInfo->Qm,
retInfo->R,
temp_ps.nrOfLayers,
temp_ps.nrOfSymbols,
temp_ps.N_PRB_DMRS * temp_ps.N_DMRS_SLOT,
layers,
temp_tda.nrOfSymbols,
temp_dmrs.N_PRB_DMRS * temp_dmrs.N_DMRS_SLOT,
retInfo->tb_size,
1, /* minimum of 1RB: need to find exact TBS, don't preclude any number */
rbSize,
......@@ -484,7 +471,9 @@ bool allocate_dl_retransmission(module_id_t module_id,
retInfo->tb_size = new_tbs;
retInfo->rbSize = new_rbSize;
retInfo->time_domain_allocation = tda;
sched_ctrl->pdsch_semi_static = temp_ps;
retInfo->nrOfLayers = layers;
retInfo->dmrs_parms = temp_dmrs;
retInfo->tda_info = temp_tda;
}
/* Find a free CCE */
......@@ -544,7 +533,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
*n_rb_sched -= sched_ctrl->sched_pdsch.rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] ^= SL_to_bitmap(retInfo->tda_info.startSymbolIndex, retInfo->tda_info.nrOfSymbols);
return true;
}
......@@ -585,10 +574,8 @@ void pf_dl(module_id_t module_id,
const NR_mac_dir_stats_t *stats = &UE->mac_stats.dl;
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
/* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */
sched_pdsch->dl_harq_pid = sched_ctrl->retrans_dl_harq.head;
UE->layers = ps->nrOfLayers; // initialization of layers to the previous value in the structure
/* Calculate Throughput */
const float a = 0.0005f; // corresponds to 200ms window
const uint32_t b = UE->mac_stats.dl.current_bytes;
......@@ -633,7 +620,7 @@ void pf_dl(module_id_t module_id,
sched_pdsch->mcs = max_mcs;
else
sched_pdsch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->dl_bler_stats, max_mcs, frame);
UE->layers = set_dl_nrOfLayers(sched_ctrl);
sched_pdsch->nrOfLayers = get_dl_nrOfLayers(sched_ctrl, current_BWP->dci_format);
const uint8_t Qm = nr_get_Qm_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
const uint16_t R = nr_get_code_rate_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
uint32_t tbs = nr_compute_tbs(Qm,
......@@ -643,7 +630,7 @@ void pf_dl(module_id_t module_id,
0, /* N_PRB_DMRS * N_DMRS_SLOT */
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
UE->layers) >> 3;
sched_pdsch->nrOfLayers) >> 3;
float coeff_ue = (float) tbs / UE->dl_thr_ue;
LOG_D(NR_MAC,"UE %04x b %d, thr_ue %f, tbs %d, coeff_ue %f\n",
UE->rnti, b, UE->dl_thr_ue, tbs, coeff_ue);
......@@ -732,21 +719,14 @@ void pf_dl(module_id_t module_id,
sched_ctrl->aggregation_level);
/* MCS has been set above */
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
if (ps->nrOfLayers != iterator->UE->layers || ps->time_domain_allocation != tda ) {
nr_set_pdsch_semi_static(dl_bwp,
scc,
tda,
iterator->UE->layers,
sched_ctrl,
ps);
}
sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
NR_pdsch_tda_info_t *tda_info = &sched_pdsch->tda_info;
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
nr_get_pdsch_tda_info(dl_bwp, sched_pdsch->time_domain_allocation, tda_info);
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
// Freq-demain allocation
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
......@@ -757,6 +737,11 @@ void pf_dl(module_id_t module_id,
while (rbStart + max_rbSize < bwpSize && (rballoc_mask[rbStart + max_rbSize] & slbitmap) == slbitmap)
max_rbSize++;
set_dl_dmrs_params(&sched_pdsch->dmrs_parms,
scc,
dl_bwp,
tda_info,
sched_pdsch->nrOfLayers);
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
sched_pdsch->pucch_allocation = alloc;
......@@ -770,9 +755,9 @@ void pf_dl(module_id_t module_id,
//const int oh = 3 * sched_ctrl->dl_pdus_total + 2 * (frame == (sched_ctrl->ta_frame + 10) % 1024);
nr_find_nb_rb(sched_pdsch->Qm,
sched_pdsch->R,
ps->nrOfLayers,
ps->nrOfSymbols,
ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
sched_pdsch->nrOfLayers,
tda_info->nrOfSymbols,
sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
sched_ctrl->num_total_bytes + oh,
min_rbSize,
max_rbSize,
......@@ -912,12 +897,9 @@ void nr_schedule_ue_spec(module_id_t module_id,
continue;
const rnti_t rnti = UE->rnti;
/* pre-computed PDSCH values that only change if time domain
* allocation/DMRS parameters change. Updated in the preprocessor through
* nr_set_pdsch_semi_static() */
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
/* POST processing */
const uint8_t nrOfLayers = ps->nrOfLayers;
const uint8_t nrOfLayers = sched_pdsch->nrOfLayers;
const uint16_t R = sched_pdsch->R;
const uint8_t Qm = sched_pdsch->Qm;
const uint32_t TBS = sched_pdsch->tb_size;
......@@ -941,6 +923,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
remove_nr_list(&sched_ctrl->retrans_dl_harq, current_harq_pid);
}
NR_pdsch_tda_info_t *tda_info = &sched_pdsch->tda_info;
NR_pdsch_dmrs_t *dmrs_parms = &sched_pdsch->dmrs_parms;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
DevAssert(!harq->is_waiting);
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
......@@ -957,9 +941,9 @@ void nr_schedule_ue_spec(module_id_t module_id,
sched_ctrl->aggregation_level,
sched_pdsch->rbStart,
sched_pdsch->rbSize,
ps->startSymbolIndex,
ps->nrOfSymbols,
ps->dl_dmrs_symb_pos,
tda_info->startSymbolIndex,
tda_info->nrOfSymbols,
dmrs_parms->dl_dmrs_symb_pos,
sched_pdsch->mcs,
nrOfLayers,
TBS,
......@@ -1033,11 +1017,11 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu->transmissionScheme = 0;
pdsch_pdu->refPoint = 0; // Point A
// DMRS
pdsch_pdu->dlDmrsSymbPos = ps->dl_dmrs_symb_pos;
pdsch_pdu->dmrsConfigType = ps->dmrsConfigType;
pdsch_pdu->dlDmrsSymbPos = dmrs_parms->dl_dmrs_symb_pos;
pdsch_pdu->dmrsConfigType = dmrs_parms->dmrsConfigType;
pdsch_pdu->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu->SCID = 0;
pdsch_pdu->numDmrsCdmGrpsNoData = ps->numDmrsCdmGrpsNoData;
pdsch_pdu->numDmrsCdmGrpsNoData = dmrs_parms->numDmrsCdmGrpsNoData;
pdsch_pdu->dmrsPorts = (1<<nrOfLayers)-1; // FIXME with a better implementation
// Pdsch Allocation in frequency domain
pdsch_pdu->resourceAlloc = 1;
......@@ -1045,8 +1029,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu->rbSize = sched_pdsch->rbSize;
pdsch_pdu->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP
// Resource Allocation in time domain
pdsch_pdu->StartSymbolIndex = ps->startSymbolIndex;
pdsch_pdu->NrOfSymbols = ps->nrOfSymbols;
pdsch_pdu->StartSymbolIndex = tda_info->startSymbolIndex;
pdsch_pdu->NrOfSymbols = tda_info->nrOfSymbols;
// Precoding
if (sched_ctrl->set_pmi) {
const int report_id = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id;
......@@ -1130,7 +1114,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu->rbStart,
pdsch_pdu->BWPSize);
dci_payload.format_indicator = 1;
dci_payload.time_domain_assignment.val = ps->time_domain_allocation;
dci_payload.time_domain_assignment.val = sched_pdsch->time_domain_allocation;
dci_payload.mcs = sched_pdsch->mcs;
dci_payload.rv = pdsch_pdu->rvIndex[0];
dci_payload.harq_pid = current_harq_pid;
......@@ -1139,7 +1123,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.tpc = sched_ctrl->tpc1; // TPC for PUCCH: table 7.2.1-1 in 38.213
dci_payload.pucch_resource_indicator = pucch->resource_indicator;
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch->timing_indicator; // PDSCH to HARQ TI
dci_payload.antenna_ports.val = ps->dmrs_ports_id;
dci_payload.antenna_ports.val = dmrs_parms->dmrs_ports_id;
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
LOG_D(NR_MAC,
"%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), "
......@@ -1319,9 +1303,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
harq->sched_pdsch = *sched_pdsch;
/* save which time allocation has been used, to be used on
* retransmissions */
harq->sched_pdsch.time_domain_allocation = ps->time_domain_allocation;
/* save nr of layers for retransmissions */
harq->sched_pdsch.nrOfLayers = ps->nrOfLayers;
harq->sched_pdsch.time_domain_allocation = sched_pdsch->time_domain_allocation;
// ta command is sent, values are reset
if (sched_ctrl->ta_apply) {
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @ caa47c74
......@@ -179,8 +179,6 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
}
}
extern int getNrOfSymbols(NR_BWP_Downlink_t *bwp, int tda);
extern uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData);
uint32_t target_dl_mcs = 9;
uint32_t target_dl_Nl = 1;
uint32_t target_dl_bw = 50;
......@@ -199,10 +197,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
const int CC_id = 0;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
ps->nrOfLayers = target_dl_Nl;
if (ps->time_domain_allocation != tda || ps->nrOfLayers != target_dl_Nl)
nr_set_pdsch_semi_static(dl_bwp, scc, tda, target_dl_Nl,sched_ctrl , ps);
NR_pdsch_tda_info_t *tda_info = &sched_ctrl->sched_pdsch.tda_info;
nr_get_pdsch_tda_info(dl_bwp, tda, tda_info);
/* find largest unallocated chunk */
const int bwpSize = dl_bwp->BWPSize;
......@@ -217,12 +213,12 @@ void nr_preprocessor_phytest(module_id_t module_id,
while (true) {
/* advance to first free RB */
while (rbStart < bwpSize &&
(vrb_map[rbStart + BWPStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
(vrb_map[rbStart + BWPStart]&SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)))
rbStart++;
rbSize = 1;
/* iterate until we are at target_dl_bw or no available RBs */
while (rbStart + rbSize < bwpSize &&
!(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) &&
!(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)) &&
rbSize < target_dl_bw)
rbSize++;
/* found target_dl_bw? */
......@@ -308,18 +304,25 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_pdsch->rbStart = rbStart;
sched_pdsch->rbSize = rbSize;
set_dl_dmrs_params(&sched_pdsch->dmrs_parms,
scc,
dl_bwp,
tda_info,
target_dl_Nl);
sched_pdsch->mcs = target_dl_mcs;
sched_pdsch->nrOfLayers = target_dl_Nl;
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
sched_ctrl->dl_bler_stats.mcs = target_dl_mcs; /* for logging output */
sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
sched_pdsch->R,
sched_pdsch->rbSize,
ps->nrOfSymbols,
ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
tda_info->nrOfSymbols,
sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
ps->nrOfLayers)
sched_pdsch->nrOfLayers)
>> 3;
/* get the PID of a HARQ process awaiting retransmission, or -1 otherwise */
......@@ -327,7 +330,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
/* mark the corresponding RBs as used */
for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize);
}
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ caa47c74
......@@ -142,11 +142,14 @@ static inline uint8_t get_max_cces(uint8_t scs) {
return (nr_max_number_of_cces_per_slot[scs]);
}
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl) {
uint8_t get_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl, nr_dci_format_t dci_format) {
// TODO check this but it should be enough for now
// if there is not csi report RI is 0 from initialization
return (sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.ri + 1);
// if there is not csi report activated RI is 0 from initialization
if(dci_format == NR_DL_DCI_FORMAT_1_0)
return 1;
else
return (sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.ri + 1);
}
......@@ -214,41 +217,71 @@ uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx)
return 9;
}
void set_dl_dmrs_params(NR_pdsch_dmrs_t *dmrs,
const NR_ServingCellConfigCommon_t *scc,
NR_UE_DL_BWP_t *dl_bwp,
NR_pdsch_tda_info_t *tda_info,
int Layers) {
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps) {
//TODO first basic implementation of dmrs port selection
// only vaild for a single codeword
// for now it assumes a selection of Nl consecutive dmrs ports
// and a single front loaded symbol
// dmrs_ports_id is the index of Tables 7.3.1.2.2-1/2/3/4
// number of front loaded symbols need to be consistent with maxLength
// when a more complete implementation is done
int frontloaded_symb = 1; // default value
nr_dci_format_t dci_format = dl_bwp ? dl_bwp->dci_format : NR_DL_DCI_FORMAT_1_0;
if (dci_format == NR_DL_DCI_FORMAT_1_0) {
if (tda_info->nrOfSymbols == 2)
dmrs->numDmrsCdmGrpsNoData = 1;
else
dmrs->numDmrsCdmGrpsNoData = 2;
dmrs->dmrs_ports_id = 0;
}
else {
//TODO first basic implementation of dmrs port selection
// only vaild for a single codeword
// for now it assumes a selection of Nl consecutive dmrs ports
// and a single front loaded symbol
// dmrs_ports_id is the index of Tables 7.3.1.2.2-1/2/3/4
// number of front loaded symbols need to be consistent with maxLength
// when a more complete implementation is done
switch (Layers) {
case 1:
dmrs->dmrs_ports_id = 0;
dmrs->numDmrsCdmGrpsNoData = 1;
frontloaded_symb = 1;
break;
case 2:
dmrs->dmrs_ports_id = 2;
dmrs->numDmrsCdmGrpsNoData = 1;
frontloaded_symb = 1;
break;
case 3:
dmrs->dmrs_ports_id = 9;
dmrs->numDmrsCdmGrpsNoData = 2;
frontloaded_symb = 1;
break;
case 4:
dmrs->dmrs_ports_id = 10;
dmrs->numDmrsCdmGrpsNoData = 2;
frontloaded_symb = 1;
break;
default:
AssertFatal(1==0,"Number of layers %d\n not supported or not valid\n",Layers);
}
}
switch (ps->nrOfLayers) {
case 1:
ps->dmrs_ports_id = 0;
ps->numDmrsCdmGrpsNoData = 1;
ps->frontloaded_symb = 1;
break;
case 2:
ps->dmrs_ports_id = 2;
ps->numDmrsCdmGrpsNoData = 1;
ps->frontloaded_symb = 1;
break;
case 3:
ps->dmrs_ports_id = 9;
ps->numDmrsCdmGrpsNoData = 2;
ps->frontloaded_symb = 1;
break;
case 4:
ps->dmrs_ports_id = 10;
ps->numDmrsCdmGrpsNoData = 2;
ps->frontloaded_symb = 1;
break;
default:
AssertFatal(1==0,"Number of layers %d\n not supported or not valid\n",ps->nrOfLayers);
NR_PDSCH_Config_t *pdsch_Config = dl_bwp ? dl_bwp->pdsch_Config : NULL;
if (pdsch_Config) {
if (tda_info->mapping_type == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB)
dmrs->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type != NULL;
else
dmrs->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type != NULL;
}
else
dmrs->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
dmrs->N_PRB_DMRS = dmrs->numDmrsCdmGrpsNoData * (dmrs->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
dmrs->dl_dmrs_symb_pos = fill_dmrs_mask(pdsch_Config, scc->dmrs_TypeA_Position, tda_info->nrOfSymbols, tda_info->startSymbolIndex, tda_info->mapping_type, frontloaded_symb);
dmrs->N_DMRS_SLOT = get_num_dmrs(dmrs->dl_dmrs_symb_pos);
LOG_D(NR_MAC,"Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",dmrs->N_PRB_DMRS,dmrs->dl_dmrs_symb_pos,dmrs->N_DMRS_SLOT);
}
NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac,
......@@ -514,58 +547,15 @@ bool nr_find_nb_rb(uint16_t Qm,
return *tbs >= bytes && *nb_rb <= nb_rb_max;
}
void nr_set_pdsch_semi_static(const NR_UE_DL_BWP_t *dl_bwp,
const NR_ServingCellConfigCommon_t *scc,
int tda,
uint8_t layers,
NR_UE_sched_ctrl_t *sched_ctrl,
NR_pdsch_semi_static_t *ps)
{
bool reset_dmrs = false;
void nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
int tda,
NR_pdsch_tda_info_t *tda_info) {
NR_PDSCH_Config_t *pdsch_Config = dl_bwp->pdsch_Config;
LOG_D(NR_MAC,"tda %d, ps->time_domain_allocation %d,layers %d, ps->nrOfLayers %d, pdsch_config %p\n",tda,ps->time_domain_allocation,layers,ps->nrOfLayers,pdsch_Config);
reset_dmrs = true;
ps->time_domain_allocation = tda;
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList = dl_bwp->tdaList;
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
ps->mapping_type = tdaList->list.array[tda]->mappingType;
if (pdsch_Config) {
if (ps->mapping_type == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB)
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type != NULL;
else
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type != NULL;
}
else
ps->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
tda_info->mapping_type = tdaList->list.array[tda]->mappingType;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &ps->startSymbolIndex, &ps->nrOfSymbols);
if (dl_bwp->dci_format == NR_DL_DCI_FORMAT_1_0) {
if (ps->nrOfSymbols == 2)
ps->numDmrsCdmGrpsNoData = 1;
else
ps->numDmrsCdmGrpsNoData = 2;
ps->dmrs_ports_id = 0;
ps->frontloaded_symb = 1;
ps->nrOfLayers = 1;
}
else {
LOG_D(NR_MAC,"checking layers\n");
if (ps->nrOfLayers != layers || ps->numDmrsCdmGrpsNoData == 0) {
reset_dmrs = true;
ps->nrOfLayers = layers;
set_dl_dmrs_ports(ps);
}
}
ps->N_PRB_DMRS = ps->numDmrsCdmGrpsNoData * (ps->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
if (reset_dmrs) {
ps->dl_dmrs_symb_pos = fill_dmrs_mask(pdsch_Config, scc ? scc->dmrs_TypeA_Position : 0, ps->nrOfSymbols, ps->startSymbolIndex, ps->mapping_type, ps->frontloaded_symb);
ps->N_DMRS_SLOT = get_num_dmrs(ps->dl_dmrs_symb_pos);
}
LOG_D(NR_MAC,"Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",ps->N_PRB_DMRS,ps->dl_dmrs_symb_pos,ps->N_DMRS_SLOT);
SLIV2SL(startSymbolAndLength, &tda_info->startSymbolIndex, &tda_info->nrOfSymbols);
}
void nr_set_pusch_semi_static(const NR_UE_UL_BWP_t *ul_bwp,
......@@ -2501,7 +2491,7 @@ NR_UE_info_t *add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConf
configure_UE_BWP(nr_mac, scc, sched_ctrl, NULL, UE);
/* set illegal time domain allocation to force recomputation of all fields */
sched_ctrl->pdsch_semi_static.time_domain_allocation = -1;
sched_ctrl->sched_pdsch.time_domain_allocation = -1;
sched_ctrl->pusch_semi_static.time_domain_allocation = -1;
/* Set default BWPs */
......@@ -2957,28 +2947,6 @@ void nr_mac_update_timers(module_id_t module_id,
// add all available DL HARQ processes for this UE in SA
create_dl_harq_list(sched_ctrl, UE->current_DL_BWP.pdsch_servingcellconfig);
}
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const uint8_t layers = set_dl_nrOfLayers(sched_ctrl);
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
nr_set_pdsch_semi_static(&UE->current_DL_BWP,
scc,
tda,
layers,
sched_ctrl,
ps);
NR_pusch_semi_static_t *ups = &sched_ctrl->pusch_semi_static;
const uint8_t nrOfLayers = 1;
const int utda = get_ul_tda(RC.nrmac[module_id], scc, slot);
nr_set_pusch_semi_static(&UE->current_UL_BWP,
scc,
utda,
nrOfLayers,
ups);
}
}
......
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @ caa47c74
......@@ -87,9 +87,8 @@ uint32_t schedule_control_sib1(module_id_t module_id,
int CC_id,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
int startSymbolIndex,
int nrOfSymbols,
uint16_t dlDmrsSymbPos,
NR_pdsch_dmrs_t *dmrs_parms,
NR_pdsch_tda_info_t *tda_info,
uint8_t candidate_idx,
uint16_t num_total_bytes);
......@@ -325,12 +324,9 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
int time_domain_assignment,
int mu);
void nr_set_pdsch_semi_static(const NR_UE_DL_BWP_t *dl_bwp,
const NR_ServingCellConfigCommon_t *scc,
int tda,
uint8_t layers,
NR_UE_sched_ctrl_t *sched_ctrl,
NR_pdsch_semi_static_t *ps);
void nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
int tda,
NR_pdsch_tda_info_t *tda_info);
void nr_set_pusch_semi_static(const NR_UE_UL_BWP_t *ul_bwp,
const NR_ServingCellConfigCommon_t *scc,
......@@ -460,7 +456,11 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
void find_SSB_and_RO_available(module_id_t module_idP);
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps);
void set_dl_dmrs_params(NR_pdsch_dmrs_t *dmrs,
const NR_ServingCellConfigCommon_t *scc,
NR_UE_DL_BWP_t *BWP,
NR_pdsch_tda_info_t *tda_info,
int Layers);
uint16_t set_pm_index(NR_UE_sched_ctrl_t *sched_ctrl,
int layers,
......@@ -469,7 +469,8 @@ uint16_t set_pm_index(NR_UE_sched_ctrl_t *sched_ctrl,
int codebook_mode);
uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx);
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl);
uint8_t get_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl, nr_dci_format_t dci_format);
const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
......
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @ caa47c74
......@@ -423,24 +423,20 @@ typedef struct NR_sched_srs {
bool srs_scheduled;
} NR_sched_srs_t;
/* PDSCH semi-static configuratio: as long as the TDA/DMRS/mcsTable remains the
* same, there is no need to recalculate all S/L or DMRS-related parameters
* over and over again. Hence, we store them in this struct for easy
* reference. */
typedef struct NR_pdsch_semi_static {
int time_domain_allocation;
uint8_t numDmrsCdmGrpsNoData;
uint8_t frontloaded_symb;
typedef struct NR_pdsch_tda_info {
int mapping_type;
int startSymbolIndex;
int nrOfSymbols;
uint8_t nrOfLayers;
} NR_pdsch_tda_info_t;
typedef struct NR_pdsch_dmrs {
uint8_t dmrs_ports_id;
uint8_t N_PRB_DMRS;
uint8_t N_DMRS_SLOT;
uint16_t dl_dmrs_symb_pos;
uint8_t numDmrsCdmGrpsNoData;
nfapi_nr_dmrs_type_e dmrsConfigType;
} NR_pdsch_semi_static_t;
} NR_pdsch_dmrs_t;
typedef struct NR_sched_pdsch {
/// RB allocation within active BWP
......@@ -465,7 +461,10 @@ typedef struct NR_sched_pdsch {
/// only important for retransmissions; otherwise, the TDA in
/// NR_pdsch_semi_static_t has precedence
int time_domain_allocation;
uint8_t nrOfLayers;
NR_pdsch_dmrs_t dmrs_parms;
NR_pdsch_tda_info_t tda_info;
} NR_sched_pdsch_t;
typedef struct NR_UE_harq {
......@@ -596,8 +595,6 @@ typedef struct {
/// PHR info: nominal UE transmit power levels (dBm)
int pcmax;
/// PDSCH semi-static configuration: is not cleared across TTIs
NR_pdsch_semi_static_t pdsch_semi_static;
/// Sched PDSCH: scheduling decisions, copied into HARQ and cleared every TTI
NR_sched_pdsch_t sched_pdsch;
/// UE-estimated maximum MCS (from CSI-RS)
......@@ -720,7 +717,6 @@ typedef struct {
NR_gNB_UCI_STATS_t uci_statS;
float ul_thr_ue;
float dl_thr_ue;
int layers;
} NR_UE_info_t;
typedef struct {
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment