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zzha zzha
OpenXG-RAN
Commits
caa47c74
Commit
caa47c74
authored
Jun 27, 2022
by
francescomani
Browse files
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Plain Diff
removing pdsch semi-static
parent
bb396052
Changes
8
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Showing
8 changed files
with
272 additions
and
375 deletions
+272
-375
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+15
-13
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+37
-93
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+51
-50
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+59
-77
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+15
-12
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+74
-106
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+12
-11
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+9
-13
No files found.
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
caa47c74
...
...
@@ -3155,26 +3155,28 @@ int is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, sl
else
return
(
slot_in_period
>=
slots1
+
tdd_UL_DL_ConfigurationCommon
->
pattern2
->
nrofDownlinkSlots
?
1
:
0
);
}
int16_t
fill_dmrs_mask
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
,
int
startSymbol
,
int
mappingtype
_fromDCI
,
int
length
)
{
int16_t
fill_dmrs_mask
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
,
int
startSymbol
,
int
mappingtype
,
int
length
)
{
int
l0
;
int
dmrs_AdditionalPosition
=
0
;
int
dmrs_AdditionalPosition
=
0
;
NR_DMRS_DownlinkConfig_t
*
dmrs_config
=
NULL
;
LOG_D
(
MAC
,
"NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d
\n
"
,
NrOfSymbols
,
startSymbol
,
mappingtype
_fromDCI
,
dmrs_TypeA_Position
);
LOG_D
(
MAC
,
"NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d
\n
"
,
NrOfSymbols
,
startSymbol
,
mappingtype
,
dmrs_TypeA_Position
);
int
l0
=
0
;
// type B
if
(
mappingtype
==
typeA
)
{
if
(
dmrs_TypeA_Position
==
NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2
)
l0
=
2
;
else
if
(
dmrs_TypeA_Position
==
NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos3
)
l0
=
3
;
else
AssertFatal
(
1
==
0
,
"Illegal dmrs_TypeA_Position %d
\n
"
,(
int
)
dmrs_TypeA_Position
);
}
// in case of DCI FORMAT 1_0 or dedicated pdsch config not received additionposition = pos2, len1 should be used
// referred to section 5.1.6.2 in 38.214
dmrs_AdditionalPosition
=
2
;
if
(
pdsch_Config
!=
NULL
)
{
if
(
mappingtype
_fromDCI
==
typeA
)
{
// Type A
if
(
mappingtype
==
typeA
)
{
// Type A
if
(
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeA
&&
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
present
==
NR_SetupRelease_DMRS_DownlinkConfig_PR_setup
)
dmrs_config
=
(
NR_DMRS_DownlinkConfig_t
*
)
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
;
}
else
if
(
mappingtype
_fromDCI
==
typeB
)
{
}
else
if
(
mappingtype
==
typeB
)
{
if
(
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeB
&&
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeB
->
present
==
NR_SetupRelease_DMRS_DownlinkConfig_PR_setup
)
dmrs_config
=
(
NR_DMRS_DownlinkConfig_t
*
)
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeB
->
choice
.
setup
;
}
else
{
...
...
@@ -3191,17 +3193,17 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
int32_t
l_prime
=
-
1
;
// columns 0-3 for TypeA, 4-7 for TypeB
column
=
(
mappingtype
_fromDCI
==
typeA
)
?
dmrs_AdditionalPosition
:
(
dmrs_AdditionalPosition
+
4
);
column
=
(
mappingtype
==
typeA
)
?
dmrs_AdditionalPosition
:
(
dmrs_AdditionalPosition
+
4
);
// Section 7.4.1.1.2 in Spec 38.211
// For PDSCH Mapping TypeA, ld is duration between first OFDM of the slot and last OFDM symbol of the scheduled PDSCH resources
// For TypeB, ld is the duration of the scheduled PDSCH resources
ld
=
(
mappingtype
_fromDCI
==
typeA
)
?
(
NrOfSymbols
+
startSymbol
)
:
NrOfSymbols
;
ld
=
(
mappingtype
==
typeA
)
?
(
NrOfSymbols
+
startSymbol
)
:
NrOfSymbols
;
AssertFatal
(
ld
>
2
&&
ld
<
15
,
"Illegal NrOfSymbols according to Table 5.1.2.1-1 Spec 38.214 %d
\n
"
,
ld
);
AssertFatal
((
NrOfSymbols
+
startSymbol
)
<
15
,
"Illegal S+L according to Table 5.1.2.1-1 Spec 38.214 S:%d L:%d
\n
"
,
startSymbol
,
NrOfSymbols
);
if
(
mappingtype
_fromDCI
==
typeA
)
{
if
(
mappingtype
==
typeA
)
{
// Section 7.4.1.1.2 in Spec 38.211
AssertFatal
((
l0
==
2
)
||
(
l0
==
3
&&
dmrs_AdditionalPosition
!=
3
),
"Wrong config, If dmrs_TypeA_Position POS3, ADD POS cannot be POS3
\n
"
);
...
...
@@ -3229,7 +3231,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
LOG_D
(
MAC
,
"l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d
\n
"
,
l0
,
ld
,
row
,
column
,
dmrs_AdditionalPosition
,
length
);
AssertFatal
(
l_prime
>=
0
,
"ERROR in configuration.Check Time Domain allocation of this Grant. l_prime < 1. row:%d, column:%d
\n
"
,
row
,
column
);
l_prime
=
(
mappingtype
_fromDCI
==
typeA
)
?
(
l_prime
|
l0
)
:
(
l_prime
<<
startSymbol
);
l_prime
=
(
mappingtype
==
typeA
)
?
(
l_prime
|
l0
)
:
(
l_prime
<<
startSymbol
);
LOG_D
(
MAC
,
" PDSCH DMRS MASK in HEX:%x
\n
"
,
l_prime
);
return
l_prime
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
caa47c74
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
caa47c74
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
caa47c74
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
caa47c74
...
...
@@ -179,8 +179,6 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
}
}
extern
int
getNrOfSymbols
(
NR_BWP_Downlink_t
*
bwp
,
int
tda
);
extern
uint8_t
getN_PRB_DMRS
(
NR_BWP_Downlink_t
*
bwp
,
int
numDmrsCdmGrpsNoData
);
uint32_t
target_dl_mcs
=
9
;
uint32_t
target_dl_Nl
=
1
;
uint32_t
target_dl_bw
=
50
;
...
...
@@ -199,10 +197,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
const
int
CC_id
=
0
;
const
int
tda
=
get_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
ps
->
nrOfLayers
=
target_dl_Nl
;
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
nrOfLayers
!=
target_dl_Nl
)
nr_set_pdsch_semi_static
(
dl_bwp
,
scc
,
tda
,
target_dl_Nl
,
sched_ctrl
,
ps
);
NR_pdsch_tda_info_t
*
tda_info
=
&
sched_ctrl
->
sched_pdsch
.
tda_info
;
nr_get_pdsch_tda_info
(
dl_bwp
,
tda
,
tda_info
);
/* find largest unallocated chunk */
const
int
bwpSize
=
dl_bwp
->
BWPSize
;
...
...
@@ -217,12 +213,12 @@ void nr_preprocessor_phytest(module_id_t module_id,
while
(
true
)
{
/* advance to first free RB */
while
(
rbStart
<
bwpSize
&&
(
vrb_map
[
rbStart
+
BWPStart
]
&
SL_to_bitmap
(
ps
->
startSymbolIndex
,
ps
->
nrOfSymbols
)))
(
vrb_map
[
rbStart
+
BWPStart
]
&
SL_to_bitmap
(
tda_info
->
startSymbolIndex
,
tda_info
->
nrOfSymbols
)))
rbStart
++
;
rbSize
=
1
;
/* iterate until we are at target_dl_bw or no available RBs */
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
(
vrb_map
[
rbStart
+
rbSize
+
BWPStart
]
&
SL_to_bitmap
(
ps
->
startSymbolIndex
,
ps
->
nrOfSymbols
))
&&
!
(
vrb_map
[
rbStart
+
rbSize
+
BWPStart
]
&
SL_to_bitmap
(
tda_info
->
startSymbolIndex
,
tda_info
->
nrOfSymbols
))
&&
rbSize
<
target_dl_bw
)
rbSize
++
;
/* found target_dl_bw? */
...
...
@@ -308,18 +304,25 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_pdsch
->
rbStart
=
rbStart
;
sched_pdsch
->
rbSize
=
rbSize
;
set_dl_dmrs_params
(
&
sched_pdsch
->
dmrs_parms
,
scc
,
dl_bwp
,
tda_info
,
target_dl_Nl
);
sched_pdsch
->
mcs
=
target_dl_mcs
;
sched_pdsch
->
nrOfLayers
=
target_dl_Nl
;
sched_pdsch
->
Qm
=
nr_get_Qm_dl
(
sched_pdsch
->
mcs
,
dl_bwp
->
mcsTableIdx
);
sched_pdsch
->
R
=
nr_get_code_rate_dl
(
sched_pdsch
->
mcs
,
dl_bwp
->
mcsTableIdx
);
sched_ctrl
->
dl_bler_stats
.
mcs
=
target_dl_mcs
;
/* for logging output */
sched_pdsch
->
tb_size
=
nr_compute_tbs
(
sched_pdsch
->
Qm
,
sched_pdsch
->
R
,
sched_pdsch
->
rbSize
,
ps
->
nrOfSymbols
,
ps
->
N_PRB_DMRS
*
ps
->
N_DMRS_SLOT
,
tda_info
->
nrOfSymbols
,
sched_pdsch
->
dmrs_parms
.
N_PRB_DMRS
*
sched_pdsch
->
dmrs_parms
.
N_DMRS_SLOT
,
0
/* N_PRB_oh, 0 for initialBWP */
,
0
/* tb_scaling */
,
ps
->
nrOfLayers
)
sched_pdsch
->
nrOfLayers
)
>>
3
;
/* get the PID of a HARQ process awaiting retransmission, or -1 otherwise */
...
...
@@ -327,7 +330,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
/* mark the corresponding RBs as used */
for
(
int
rb
=
0
;
rb
<
sched_pdsch
->
rbSize
;
rb
++
)
vrb_map
[
rb
+
sched_pdsch
->
rbStart
+
BWPStart
]
=
SL_to_bitmap
(
ps
->
startSymbolIndex
,
ps
->
nrOfSymbols
);
vrb_map
[
rb
+
sched_pdsch
->
rbStart
+
BWPStart
]
=
SL_to_bitmap
(
tda_info
->
startSymbolIndex
,
tda_info
->
nrOfSymbols
);
if
((
frame
&
127
)
==
0
)
LOG_D
(
MAC
,
"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d
\n
"
,
frame
,
slot
,
sched_pdsch
->
mcs
,
rbStart
,
rbSize
);
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
caa47c74
...
...
@@ -142,10 +142,13 @@ static inline uint8_t get_max_cces(uint8_t scs) {
return
(
nr_max_number_of_cces_per_slot
[
scs
]);
}
uint8_t
set_dl_nrOfLayers
(
NR_UE_sched_ctrl_t
*
sched_ctrl
)
{
uint8_t
get_dl_nrOfLayers
(
NR_UE_sched_ctrl_t
*
sched_ctrl
,
nr_dci_format_t
dci_format
)
{
// TODO check this but it should be enough for now
// if there is not csi report RI is 0 from initialization
// if there is not csi report activated RI is 0 from initialization
if
(
dci_format
==
NR_DL_DCI_FORMAT_1_0
)
return
1
;
else
return
(
sched_ctrl
->
CSI_report
.
cri_ri_li_pmi_cqi_report
.
ri
+
1
);
}
...
...
@@ -214,9 +217,22 @@ uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx)
return
9
;
}
void
set_dl_dmrs_params
(
NR_pdsch_dmrs_t
*
dmrs
,
const
NR_ServingCellConfigCommon_t
*
scc
,
NR_UE_DL_BWP_t
*
dl_bwp
,
NR_pdsch_tda_info_t
*
tda_info
,
int
Layers
)
{
void
set_dl_dmrs_ports
(
NR_pdsch_semi_static_t
*
ps
)
{
int
frontloaded_symb
=
1
;
// default value
nr_dci_format_t
dci_format
=
dl_bwp
?
dl_bwp
->
dci_format
:
NR_DL_DCI_FORMAT_1_0
;
if
(
dci_format
==
NR_DL_DCI_FORMAT_1_0
)
{
if
(
tda_info
->
nrOfSymbols
==
2
)
dmrs
->
numDmrsCdmGrpsNoData
=
1
;
else
dmrs
->
numDmrsCdmGrpsNoData
=
2
;
dmrs
->
dmrs_ports_id
=
0
;
}
else
{
//TODO first basic implementation of dmrs port selection
// only vaild for a single codeword
// for now it assumes a selection of Nl consecutive dmrs ports
...
...
@@ -225,30 +241,47 @@ void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps) {
// number of front loaded symbols need to be consistent with maxLength
// when a more complete implementation is done
switch
(
ps
->
nrOf
Layers
)
{
switch
(
Layers
)
{
case
1
:
p
s
->
dmrs_ports_id
=
0
;
p
s
->
numDmrsCdmGrpsNoData
=
1
;
ps
->
frontloaded_symb
=
1
;
dmr
s
->
dmrs_ports_id
=
0
;
dmr
s
->
numDmrsCdmGrpsNoData
=
1
;
frontloaded_symb
=
1
;
break
;
case
2
:
p
s
->
dmrs_ports_id
=
2
;
p
s
->
numDmrsCdmGrpsNoData
=
1
;
ps
->
frontloaded_symb
=
1
;
dmr
s
->
dmrs_ports_id
=
2
;
dmr
s
->
numDmrsCdmGrpsNoData
=
1
;
frontloaded_symb
=
1
;
break
;
case
3
:
p
s
->
dmrs_ports_id
=
9
;
p
s
->
numDmrsCdmGrpsNoData
=
2
;
ps
->
frontloaded_symb
=
1
;
dmr
s
->
dmrs_ports_id
=
9
;
dmr
s
->
numDmrsCdmGrpsNoData
=
2
;
frontloaded_symb
=
1
;
break
;
case
4
:
p
s
->
dmrs_ports_id
=
10
;
p
s
->
numDmrsCdmGrpsNoData
=
2
;
ps
->
frontloaded_symb
=
1
;
dmr
s
->
dmrs_ports_id
=
10
;
dmr
s
->
numDmrsCdmGrpsNoData
=
2
;
frontloaded_symb
=
1
;
break
;
default:
AssertFatal
(
1
==
0
,
"Number of layers %d
\n
not supported or not valid
\n
"
,
ps
->
nrOfLayers
);
AssertFatal
(
1
==
0
,
"Number of layers %d
\n
not supported or not valid
\n
"
,
Layers
);
}
}
NR_PDSCH_Config_t
*
pdsch_Config
=
dl_bwp
?
dl_bwp
->
pdsch_Config
:
NULL
;
if
(
pdsch_Config
)
{
if
(
tda_info
->
mapping_type
==
NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB
)
dmrs
->
dmrsConfigType
=
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeB
->
choice
.
setup
->
dmrs_Type
!=
NULL
;
else
dmrs
->
dmrsConfigType
=
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
!=
NULL
;
}
else
dmrs
->
dmrsConfigType
=
NFAPI_NR_DMRS_TYPE1
;
dmrs
->
N_PRB_DMRS
=
dmrs
->
numDmrsCdmGrpsNoData
*
(
dmrs
->
dmrsConfigType
==
NFAPI_NR_DMRS_TYPE1
?
6
:
4
);
dmrs
->
dl_dmrs_symb_pos
=
fill_dmrs_mask
(
pdsch_Config
,
scc
->
dmrs_TypeA_Position
,
tda_info
->
nrOfSymbols
,
tda_info
->
startSymbolIndex
,
tda_info
->
mapping_type
,
frontloaded_symb
);
dmrs
->
N_DMRS_SLOT
=
get_num_dmrs
(
dmrs
->
dl_dmrs_symb_pos
);
LOG_D
(
NR_MAC
,
"Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d
\n
"
,
dmrs
->
N_PRB_DMRS
,
dmrs
->
dl_dmrs_symb_pos
,
dmrs
->
N_DMRS_SLOT
);
}
NR_ControlResourceSet_t
*
get_coreset
(
gNB_MAC_INST
*
nrmac
,
...
...
@@ -514,58 +547,15 @@ bool nr_find_nb_rb(uint16_t Qm,
return
*
tbs
>=
bytes
&&
*
nb_rb
<=
nb_rb_max
;
}
void
nr_set_pdsch_semi_static
(
const
NR_UE_DL_BWP_t
*
dl_bwp
,
const
NR_ServingCellConfigCommon_t
*
scc
,
void
nr_get_pdsch_tda_info
(
const
NR_UE_DL_BWP_t
*
dl_bwp
,
int
tda
,
uint8_t
layers
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_pdsch_semi_static_t
*
ps
)
{
bool
reset_dmrs
=
false
;
NR_pdsch_tda_info_t
*
tda_info
)
{
NR_PDSCH_Config_t
*
pdsch_Config
=
dl_bwp
->
pdsch_Config
;
LOG_D
(
NR_MAC
,
"tda %d, ps->time_domain_allocation %d,layers %d, ps->nrOfLayers %d, pdsch_config %p
\n
"
,
tda
,
ps
->
time_domain_allocation
,
layers
,
ps
->
nrOfLayers
,
pdsch_Config
);
reset_dmrs
=
true
;
ps
->
time_domain_allocation
=
tda
;
NR_PDSCH_TimeDomainResourceAllocationList_t
*
tdaList
=
dl_bwp
->
tdaList
;
AssertFatal
(
tda
<
tdaList
->
list
.
count
,
"time_domain_allocation %d>=%d
\n
"
,
tda
,
tdaList
->
list
.
count
);
ps
->
mapping_type
=
tdaList
->
list
.
array
[
tda
]
->
mappingType
;
if
(
pdsch_Config
)
{
if
(
ps
->
mapping_type
==
NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB
)
ps
->
dmrsConfigType
=
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeB
->
choice
.
setup
->
dmrs_Type
!=
NULL
;
else
ps
->
dmrsConfigType
=
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
!=
NULL
;
}
else
ps
->
dmrsConfigType
=
NFAPI_NR_DMRS_TYPE1
;
tda_info
->
mapping_type
=
tdaList
->
list
.
array
[
tda
]
->
mappingType
;
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
tda
]
->
startSymbolAndLength
;
SLIV2SL
(
startSymbolAndLength
,
&
ps
->
startSymbolIndex
,
&
ps
->
nrOfSymbols
);
if
(
dl_bwp
->
dci_format
==
NR_DL_DCI_FORMAT_1_0
)
{
if
(
ps
->
nrOfSymbols
==
2
)
ps
->
numDmrsCdmGrpsNoData
=
1
;
else
ps
->
numDmrsCdmGrpsNoData
=
2
;
ps
->
dmrs_ports_id
=
0
;
ps
->
frontloaded_symb
=
1
;
ps
->
nrOfLayers
=
1
;
}
else
{
LOG_D
(
NR_MAC
,
"checking layers
\n
"
);
if
(
ps
->
nrOfLayers
!=
layers
||
ps
->
numDmrsCdmGrpsNoData
==
0
)
{
reset_dmrs
=
true
;
ps
->
nrOfLayers
=
layers
;
set_dl_dmrs_ports
(
ps
);
}
}
ps
->
N_PRB_DMRS
=
ps
->
numDmrsCdmGrpsNoData
*
(
ps
->
dmrsConfigType
==
NFAPI_NR_DMRS_TYPE1
?
6
:
4
);
if
(
reset_dmrs
)
{
ps
->
dl_dmrs_symb_pos
=
fill_dmrs_mask
(
pdsch_Config
,
scc
?
scc
->
dmrs_TypeA_Position
:
0
,
ps
->
nrOfSymbols
,
ps
->
startSymbolIndex
,
ps
->
mapping_type
,
ps
->
frontloaded_symb
);
ps
->
N_DMRS_SLOT
=
get_num_dmrs
(
ps
->
dl_dmrs_symb_pos
);
}
LOG_D
(
NR_MAC
,
"Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d
\n
"
,
ps
->
N_PRB_DMRS
,
ps
->
dl_dmrs_symb_pos
,
ps
->
N_DMRS_SLOT
);
SLIV2SL
(
startSymbolAndLength
,
&
tda_info
->
startSymbolIndex
,
&
tda_info
->
nrOfSymbols
);
}
void
nr_set_pusch_semi_static
(
const
NR_UE_UL_BWP_t
*
ul_bwp
,
...
...
@@ -2501,7 +2491,7 @@ NR_UE_info_t *add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConf
configure_UE_BWP
(
nr_mac
,
scc
,
sched_ctrl
,
NULL
,
UE
);
/* set illegal time domain allocation to force recomputation of all fields */
sched_ctrl
->
pdsch_semi_static
.
time_domain_allocation
=
-
1
;
sched_ctrl
->
sched_pdsch
.
time_domain_allocation
=
-
1
;
sched_ctrl
->
pusch_semi_static
.
time_domain_allocation
=
-
1
;
/* Set default BWPs */
...
...
@@ -2957,28 +2947,6 @@ void nr_mac_update_timers(module_id_t module_id,
// add all available DL HARQ processes for this UE in SA
create_dl_harq_list
(
sched_ctrl
,
UE
->
current_DL_BWP
.
pdsch_servingcellconfig
);
}
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
const
uint8_t
layers
=
set_dl_nrOfLayers
(
sched_ctrl
);
const
int
tda
=
get_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
nr_set_pdsch_semi_static
(
&
UE
->
current_DL_BWP
,
scc
,
tda
,
layers
,
sched_ctrl
,
ps
);
NR_pusch_semi_static_t
*
ups
=
&
sched_ctrl
->
pusch_semi_static
;
const
uint8_t
nrOfLayers
=
1
;
const
int
utda
=
get_ul_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
nr_set_pusch_semi_static
(
&
UE
->
current_UL_BWP
,
scc
,
utda
,
nrOfLayers
,
ups
);
}
}
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
caa47c74
...
...
@@ -87,9 +87,8 @@ uint32_t schedule_control_sib1(module_id_t module_id,
int
CC_id
,
NR_Type0_PDCCH_CSS_config_t
*
type0_PDCCH_CSS_config
,
int
time_domain_allocation
,
int
startSymbolIndex
,
int
nrOfSymbols
,
uint16_t
dlDmrsSymbPos
,
NR_pdsch_dmrs_t
*
dmrs_parms
,
NR_pdsch_tda_info_t
*
tda_info
,
uint8_t
candidate_idx
,
uint16_t
num_total_bytes
);
...
...
@@ -325,12 +324,9 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
int
time_domain_assignment
,
int
mu
);
void
nr_set_pdsch_semi_static
(
const
NR_UE_DL_BWP_t
*
dl_bwp
,
const
NR_ServingCellConfigCommon_t
*
scc
,
void
nr_get_pdsch_tda_info
(
const
NR_UE_DL_BWP_t
*
dl_bwp
,
int
tda
,
uint8_t
layers
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_pdsch_semi_static_t
*
ps
);
NR_pdsch_tda_info_t
*
tda_info
);
void
nr_set_pusch_semi_static
(
const
NR_UE_UL_BWP_t
*
ul_bwp
,
const
NR_ServingCellConfigCommon_t
*
scc
,
...
...
@@ -460,7 +456,11 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
void
find_SSB_and_RO_available
(
module_id_t
module_idP
);
void
set_dl_dmrs_ports
(
NR_pdsch_semi_static_t
*
ps
);
void
set_dl_dmrs_params
(
NR_pdsch_dmrs_t
*
dmrs
,
const
NR_ServingCellConfigCommon_t
*
scc
,
NR_UE_DL_BWP_t
*
BWP
,
NR_pdsch_tda_info_t
*
tda_info
,
int
Layers
);
uint16_t
set_pm_index
(
NR_UE_sched_ctrl_t
*
sched_ctrl
,
int
layers
,
...
...
@@ -469,7 +469,8 @@ uint16_t set_pm_index(NR_UE_sched_ctrl_t *sched_ctrl,
int
codebook_mode
);
uint8_t
get_mcs_from_cqi
(
int
mcs_table
,
int
cqi_table
,
int
cqi_idx
);
uint8_t
set_dl_nrOfLayers
(
NR_UE_sched_ctrl_t
*
sched_ctrl
);
uint8_t
get_dl_nrOfLayers
(
NR_UE_sched_ctrl_t
*
sched_ctrl
,
nr_dci_format_t
dci_format
);
const
int
get_dl_tda
(
const
gNB_MAC_INST
*
nrmac
,
const
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
);
const
int
get_ul_tda
(
const
gNB_MAC_INST
*
nrmac
,
const
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
);
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
caa47c74
...
...
@@ -423,24 +423,20 @@ typedef struct NR_sched_srs {
bool
srs_scheduled
;
}
NR_sched_srs_t
;
/* PDSCH semi-static configuratio: as long as the TDA/DMRS/mcsTable remains the
* same, there is no need to recalculate all S/L or DMRS-related parameters
* over and over again. Hence, we store them in this struct for easy
* reference. */
typedef
struct
NR_pdsch_semi_static
{
int
time_domain_allocation
;
uint8_t
numDmrsCdmGrpsNoData
;
uint8_t
frontloaded_symb
;
typedef
struct
NR_pdsch_tda_info
{
int
mapping_type
;
int
startSymbolIndex
;
int
nrOfSymbols
;
uint8_t
nrOfLayers
;
}
NR_pdsch_tda_info_t
;
typedef
struct
NR_pdsch_dmrs
{
uint8_t
dmrs_ports_id
;
uint8_t
N_PRB_DMRS
;
uint8_t
N_DMRS_SLOT
;
uint16_t
dl_dmrs_symb_pos
;
uint8_t
numDmrsCdmGrpsNoData
;
nfapi_nr_dmrs_type_e
dmrsConfigType
;
}
NR_pdsch_
semi_static
_t
;
}
NR_pdsch_
dmrs
_t
;
typedef
struct
NR_sched_pdsch
{
/// RB allocation within active BWP
...
...
@@ -465,7 +461,10 @@ typedef struct NR_sched_pdsch {
/// only important for retransmissions; otherwise, the TDA in
/// NR_pdsch_semi_static_t has precedence
int
time_domain_allocation
;
uint8_t
nrOfLayers
;
NR_pdsch_dmrs_t
dmrs_parms
;
NR_pdsch_tda_info_t
tda_info
;
}
NR_sched_pdsch_t
;
typedef
struct
NR_UE_harq
{
...
...
@@ -596,8 +595,6 @@ typedef struct {
/// PHR info: nominal UE transmit power levels (dBm)
int
pcmax
;
/// PDSCH semi-static configuration: is not cleared across TTIs
NR_pdsch_semi_static_t
pdsch_semi_static
;
/// Sched PDSCH: scheduling decisions, copied into HARQ and cleared every TTI
NR_sched_pdsch_t
sched_pdsch
;
/// UE-estimated maximum MCS (from CSI-RS)
...
...
@@ -720,7 +717,6 @@ typedef struct {
NR_gNB_UCI_STATS_t
uci_statS
;
float
ul_thr_ue
;
float
dl_thr_ue
;
int
layers
;
}
NR_UE_info_t
;
typedef
struct
{
...
...
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