feat(ldpc-offload-xdma): transport block decoding with XDMA enabled in...

feat(ldpc-offload-xdma): transport block decoding with XDMA enabled in nr_ulsim on experimental testbench

CMakeLists.txt

@@ -513,6 +513,14 @@ endif()
 
 ##########################################################
 
+# LDPC offload with xdma driver
+##########################################################
+
+add_library(ldpc_xdma STATIC ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_offload_xdma.c)
+target_include_directories(ldpc_xdma PRIVATE "${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder_offload_xdma")
+
+##########################################################
+
 include_directories ("${OPENAIR_DIR}/radio/COMMON")
 
 ##############################################################
@@ -2073,7 +2081,7 @@ target_link_libraries(nr-softmodem PRIVATE
   ITTI ${NAS_UE_LIB} lte_rrc nr_rrc
   ngap s1ap L2_LTE_NR L2_NR MAC_NR_COMMON NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB SIMU SIMU_ETH
   x2ap f1ap m2ap m3ap e1ap shlib_loader
-  -Wl,--end-group z dl)
+  -Wl,--end-group z dl ldpc_xdma)
 
 target_link_libraries(nr-softmodem PRIVATE pthread m CONFIG_LIB rt sctp)
 target_link_libraries(nr-softmodem PRIVATE ${T_LIB})
@@ -2227,7 +2235,7 @@ add_executable(nr_dlschsim
   )
 target_link_libraries(nr_dlschsim PRIVATE
   -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB MAC_NR_COMMON -Wl,--end-group
-  m pthread ${T_LIB} ITTI dl shlib_loader
+  m pthread ${T_LIB} ITTI dl shlib_loader ldpc_xdma
   )
 target_link_libraries(nr_dlschsim PRIVATE asn1_nr_rrc_hdrs)
 
@@ -2238,7 +2246,7 @@ add_executable(nr_pbchsim
   )
 target_link_libraries(nr_pbchsim PRIVATE
   -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB MAC_NR_COMMON -Wl,--end-group
-  m pthread ${T_LIB} ITTI dl shlib_loader
+  m pthread ${T_LIB} ITTI dl shlib_loader ldpc_xdma
 )
 target_link_libraries(nr_pbchsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
 
@@ -2251,7 +2259,7 @@ add_executable(nr_pucchsim
   )
 target_link_libraries(nr_pucchsim PRIVATE
   -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB MAC_NR_COMMON -Wl,--end-group
-  m pthread ${T_LIB} ITTI dl shlib_loader
+  m pthread ${T_LIB} ITTI dl shlib_loader ldpc_xdma
 )
 target_link_libraries(nr_pucchsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
 
@@ -2268,7 +2276,7 @@ add_executable(nr_dlsim
   )
 target_link_libraries(nr_dlsim PRIVATE
   -Wl,--start-group UTIL SIMU SIMU_ETH PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON nr_rrc CONFIG_LIB L2_NR HASHTABLE x2ap SECURITY ngap -lz -Wl,--end-group
-  m pthread ${T_LIB} ITTI dl shlib_loader
+  m pthread ${T_LIB} ITTI dl shlib_loader ldpc_xdma
   )
 target_link_libraries(nr_dlsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
 
@@ -2290,7 +2298,7 @@ add_executable(nr_ulschsim
   )
 target_link_libraries(nr_ulschsim PRIVATE
   -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB MAC_NR_COMMON -Wl,--end-group
-  m pthread ${T_LIB} ITTI dl shlib_loader
+  m pthread ${T_LIB} ITTI dl shlib_loader ldpc_xdma
 )
 target_link_libraries(nr_ulschsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
 
@@ -2312,7 +2320,7 @@ endif()
 
 target_link_libraries(nr_ulsim PRIVATE
   -Wl,--start-group UTIL SIMU SIMU_ETH PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON nr_rrc CONFIG_LIB L2_NR HASHTABLE x2ap SECURITY ngap -lz -Wl,--end-group
-  m pthread ${T_LIB} ITTI dl shlib_loader
+  m pthread ${T_LIB} ITTI dl shlib_loader ldpc_xdma
   )
 target_link_libraries(nr_ulsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
 

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_offload_xdma.h

+/*! \file PHY/CODING/nrLDPC_decoder_offload_xdma/nrLDPC_decoder_offload_xdma.h
+ * \briefFPGA accelerator integrated into OAI (for one and multi code block)
+ * \author Sendren Xu, SY Yeh(fdragon), Hongming, Terng-Yin Hsu
+ * \date 2022-05-31
+ * \version 5.0
+ * \email: summery19961210@gmail.com
+ */
+
+#include <stdint.h>
+
+/**
+    \brief LDPC input parameter
+    \param Zc shifting size
+    \param Rows
+    \param baseGraph base graph
+    \param CB_num number of code block
+    \param numChannelLlrs input soft bits length, Zc x 66 - length of filler bits
+    \param numFillerBits filler bits length
+*/
+
+typedef struct {
+  unsigned char max_schedule;
+  unsigned char SetIdx;
+  int Zc;
+  unsigned char numCB;
+  unsigned char BG;
+  unsigned char max_iter;
+  int nRows;
+  int numChannelLls;
+  int numFillerBits;
+} DecIFConf;
+
+int nrLDPC_decoder_FPGA_8038(int8_t *buf_in, int8_t *buf_out, DecIFConf dec_conf);
+int nrLDPC_decoder_FPGA_PYM(int8_t *buf_in, int8_t *buf_out, DecIFConf dec_conf);
+// int nrLDPC_decoder_FPGA_PYM();

openair1/PHY/CODING/nrLDPC_decoder/xdma_diag.h

+/*
+ * This file is part of the Xilinx DMA IP Core driver tools for Linux
+ *
+ * Copyright (c) 2016-present,  Xilinx, Inc.
+ * All rights reserved.
+ *
+ * This source code is licensed under both the BSD-style license (found in the
+ * LICENSE file in the root directory of this source tree) and the GPLv2 (found
+ * in the COPYING file in the root directory of this source tree).
+ * You may select, at your option, one of the above-listed licenses.
+ */
+#ifndef MODULES_TXCTRL_INC_XDMA_DIAG_H_
+#define MODULES_TXCTRL_INC_XDMA_DIAG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// #define _BSD_SOURCE
+// #define _XOPEN_SOURCE 500
+//#include "../../LDPC/LDPC_api.h"
+
+//#include "dma_utils.c"
+
+/*static struct option const long_opts[] = {
+  {"device", required_argument, NULL, 'd'},
+  {"address", required_argument, NULL, 'a'},
+  {"size", required_argument, NULL, 's'},
+  {"offset", required_argument, NULL, 'o'},
+  {"count", required_argument, NULL, 'c'},
+  {"data infile", required_argument, NULL, 'f'},
+  {"data outfile", required_argument, NULL, 'w'},
+  {"help", no_argument, NULL, 'h'},
+  {"verbose", no_argument, NULL, 'v'},
+  {0, 0, 0, 0}
+};*/
+
+typedef struct {
+  unsigned char max_schedule; // max_schedule = 0;
+  unsigned char mb; // mb = 32;
+  unsigned char CB_num; // id = CB_num;
+  unsigned char BGSel; // bg = 1;
+  unsigned char z_set; // z_set = 0;
+  unsigned char z_j; // z_j = 6;
+  unsigned char max_iter; // max_iter = 8;
+  unsigned char SetIdx; // sc_idx = 12;
+} DecIPConf;
+
+typedef struct {
+  int SetIdx;
+  int NumCBSegm;
+  int PayloadLen;
+  int Z;
+  int z_set;
+  int z_j;
+  int Kbmax;
+  int BGSel;
+  unsigned mb;
+  unsigned char CB_num;
+  unsigned char kb_1;
+} EncIPConf;
+
+/* ltoh: little to host */
+/* htol: little to host */
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define ltohl(x) (x)
+#define ltohs(x) (x)
+#define htoll(x) (x)
+#define htols(x) (x)
+#elif __BYTE_ORDER == __BIG_ENDIAN
+#define ltohl(x) __bswap_32(x)
+#define ltohs(x) __bswap_16(x)
+#define htoll(x) __bswap_32(x)
+#define htols(x) __bswap_16(x)
+#endif
+
+#define FATAL                                                                                             \
+  do {                                                                                                    \
+    fprintf(stderr, "Error at line %d, file %s (%d) [%s]\n", __LINE__, __FILE__, errno, strerror(errno)); \
+    exit(1);                                                                                              \
+  } while (0)
+
+#define MAP_SIZE (32 * 1024UL)
+#define MAP_MASK (MAP_SIZE - 1)
+
+#define DEVICE_NAME_DEFAULT_ENC_READ "/dev/xdma0_c2h_1"
+#define DEVICE_NAME_DEFAULT_ENC_WRITE "/dev/xdma0_h2c_1"
+#define DEVICE_NAME_DEFAULT_DEC_READ "/dev/xdma0_c2h_0"
+#define DEVICE_NAME_DEFAULT_DEC_WRITE "/dev/xdma0_h2c_0"
+#define SIZE_DEFAULT (32)
+#define COUNT_DEFAULT (1)
+
+#define OFFSET_DEC_IN 0x0000
+#define OFFSET_DEC_OUT 0x0004
+#define OFFSET_ENC_IN 0x0008
+#define OFFSET_ENC_OUT 0x000c
+#define OFFSET_RESET 0x0020
+#define PCIE_OFF 0x0030
+
+#define CB_PROCESS_NUMBER 24 // add by JW
+#define CB_PROCESS_NUMBER_Dec 24
+
+// dma_from_device.c
+
+int test_dma_enc_read(char *EncOut, EncIPConf Confparam);
+int test_dma_enc_write(char *data, EncIPConf Confparam);
+int test_dma_dec_read(char *DecOut, DecIPConf Confparam);
+int test_dma_dec_write(char *data, DecIPConf Confparam);
+void test_dma_init();
+void test_dma_shutdown();
+void dma_reset();
+
+#ifdef __cplusplus
+}
+#endif
+#endif

openair1/PHY/defs_gNB.h

@@ -640,6 +640,10 @@ typedef struct PHY_VARS_gNB_s {
 
   int ldpc_offload_flag;
 
+  int ldpc_xdma_flag;
+  // Number of threads created for deinterleaving and rate dematching with XDMA decoding
+  int ldpc_xdma_number_threads_predecoding;
+
   int reorder_thread_disable;
 
   int max_ldpc_iterations;

openair1/SIMULATION/NR_PHY/ulsim.c

@@ -187,6 +187,8 @@ int main(int argc, char *argv[])
   double effTP;
   float eff_tp_check = 100;
   int ldpc_offload_flag = 0;
+  int ldpc_xdma_flag = 0;
+  int ldpc_xdma_number_threads_predecoding = 1;
   uint8_t max_rounds = 4;
   int chest_type[2] = {0};
   int enable_ptrs = 0;
@@ -223,7 +225,7 @@ int main(int argc, char *argv[])
   /* initialize the sin-cos table */
   InitSinLUT();
 
-  while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:i:k:m:n:op:q:r:s:t:u:v:w:y:z:C:F:G:H:I:M:N:PR:S:T:U:L:ZW:E:X:")) != -1) {
+  while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:i:k:m:n:o:op:q:r:s:t:u:v:w:y:z:C:F:G:H:I:M:N:PR:S:T:U:L:ZW:E:X:")) != -1) {
     printf("handling optarg %c\n",c);
     switch (c) {
 
@@ -331,8 +333,23 @@ int main(int argc, char *argv[])
       break;
 
     case 'o':
+      //switch on optarg to choose the offload option
+      switch ((char) *optarg) {
+        case '1':
           ldpc_offload_flag = 1;
           break;
+        case '2':
+          ldpc_xdma_flag = 1;
+          if (optarg[1]=',') {
+            ldpc_xdma_number_threads_predecoding = atoi(&optarg[2]);
+          } else {
+            printf("Expecting \"-o 2,<number of predecoding threads>\"! Falling back to one predecoding thread\n");
+          }
+          break;
+        default:
+          printf("Invalid offload mode!\n");
+      }
+      break;
 
     case 'p':
       extended_prefix_flag = 1;
@@ -493,7 +510,7 @@ int main(int argc, char *argv[])
       printf("-k 3/4 sampling\n");
       printf("-m MCS value\n");
       printf("-n Number of trials to simulate\n");
-      printf("-o ldpc offload flag\n");
+      printf("-o <mode, 1(T1/T2), 2(XDMA)>[,<number of predecoding threads (mode 2)>] ldpc offload flag\n");
       printf("-p Use extended prefix mode\n");
       printf("-q MCS table\n");
       printf("-r Number of allocated resource blocks for PUSCH\n");
@@ -630,6 +647,9 @@ int main(int argc, char *argv[])
 
 //  nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01);
   gNB->ldpc_offload_flag = ldpc_offload_flag;
+  gNB->ldpc_xdma_flag = ldpc_xdma_flag;
+  gNB->ldpc_xdma_number_threads_predecoding = ldpc_xdma_number_threads_predecoding;
+  AssertFatal(gNB->ldpc_xdma_number_threads_predecoding > 0, "Number of predecoding threads should be positive");
   gNB->chest_freq = chest_type[0];
   gNB->chest_time = chest_type[1];