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zzha zzha
OpenXG-RAN
Commits
f161b406
Commit
f161b406
authored
Dec 19, 2017
by
Eurecom
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Set RU 0 to master and others to slave. Testing the synch
parent
630746e4
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targets/RT/USER/lte-ru.c
targets/RT/USER/lte-ru.c
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targets/RT/USER/lte-ru.c
View file @
f161b406
...
@@ -1722,7 +1722,7 @@ static void* ru_thread( void* param ) {
...
@@ -1722,7 +1722,7 @@ static void* ru_thread( void* param ) {
else
LOG_I
(
PHY
,
"RU %d no asynch_south interface
\n
"
,
ru
->
idx
);
else
LOG_I
(
PHY
,
"RU %d no asynch_south interface
\n
"
,
ru
->
idx
);
// if this is a slave RRU, try to synchronize on the DL frequency
// if this is a slave RRU, try to synchronize on the DL frequency
if
((
ru
->
is_slave
)
&&
(
ru
->
if_south
==
LOCAL_RF
))
do_ru_synch
(
ru
);
if
((
ru
->
is_slave
==
1
)
&&
(
ru
->
if_south
==
LOCAL_RF
))
do_ru_synch
(
ru
);
// This is a forever while loop, it loops over subframes which are scheduled by incoming samples from HW devices
// This is a forever while loop, it loops over subframes which are scheduled by incoming samples from HW devices
...
...
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