Commit 1a516df2 authored by shahab SHARIATBAGHERI's avatar shahab SHARIATBAGHERI

proto uplink mac

parent 0b83862f
...@@ -36,34 +36,39 @@ message flex_dl_dci { ...@@ -36,34 +36,39 @@ message flex_dl_dci {
} }
message flex_ul_dci { message flex_ul_dci {
optional uint32 handle = 1;
optional uint32 size = 2; // Size of the ULSCH PDU in bytes for UL Grant.
optional uint32 rnti = 1; optional uint32 rnti = 1;
optional uint32 res_alloc = 2; // Type of resource allocation optional uint32 res_block_start = 2; // match DCI format 0 PDU
optional uint32 rb_bitmap = 3; // Bitmap for RB allocation optional uint32 rb_bitmap = 3; // Bitmap for RB allocation
optional uint32 rb_shift = 4; // See TS 36.214, section 7.1.6.2 optional uint32 modulation_t = 4; // A FLMOD_* Value
repeated uint32 tbs_size = 5; // The size of each TBS optional uint32 cyclic_shift2 = 5; // match DCI format 0/4 PDU
repeated uint32 mcs = 6; // The MCS of each TB optional uint32 freq_hop_flag = 6; // 0 no hopping, 1 hoppping
repeated uint32 ndi = 7; // New data indicator of each TB optional uint32 freq_hop_map = 8; // match DCI format 0 PDU
//repeated uint32 rv = 8; // Redundancy version of each TB optional uint32 ndi = 7; // New data indicator of each TB
//optional uint32 cce_index = 9; // CCE index used to send the DCI optional uint32 rv = 8; // Redundancy version of each TB
//optional uint32 aggr_level = 10; optional uint32 harq_process_number = 14; // A FLHARQ_* value
//optional uint32 precoding_info = 11; // 2 antenna ports:0..6, optional uint32 ultx_mode = 14; // A FLULM_* value
// 4 antenna ports:0..50 repeated uint32 tbs_size = 5; // The size of each TBS
repeated uint32 current_harq = 9; // CCE index used to send the DCI
optional uint32 n_srs = 10; // Over lap indication with srs
optional uint32 res_alloc = 2; // Type of resource allocation
optional uint32 format = 12; // DCI format. A FLDCIF_* value optional uint32 format = 12; // DCI format. A FLDCIF_* value
optional uint32 tpc = 13; // TS 36.213, sec 5.1.1.1
optional uint32 harq_process = 14; // HARQ process ID
optional uint32 dai = 15; // TDD only // optional uint32 dai = 15; // TDD only
//optional uint32 vrb_format = 16; // One of the FLVRBF_* values
optional uint32 tb_swap = 17; // Boolean. TB to codeword swap flag // optional uint32 tb_swap = 17; // Boolean. TB to codeword swap flag
//optional uint32 sps_release = 18; // Flag value
optional uint32 pdcch_order = 19; // optional uint32 pdcch_order = 19;
// optional uint32 preamble_index = 20; // Only valid if pdcch_order = 1 // optional uint32 preamble_index = 20; // Only valid if pdcch_order = 1
optional uint32 prach_mask_index = 21; // Only valid if pdcch_order = 1 // optional uint32 prach_mask_index = 21; // Only valid if pdcch_order = 1
optional uint32 n_gap = 22; // One of the FLNGV_* values
optional uint32 tbs_idx = 23; // The TBS index for Format 1A // optional uint32 tbs_idx = 23; // The TBS index for Format 1A
optional uint32 dl_power_offset = 24; // For format 1D
// optional uint32 pdcch_power_offset = 25; // DL PDCCH power boosting in dB
// optional uint32 cif_present = 26; // Boolean. Indication of CIF field
// optional uint32 cif = 27; // CIF for cross-carrier scheduling
} }
// //
...@@ -104,4 +109,10 @@ enum flex_vrb_format { ...@@ -104,4 +109,10 @@ enum flex_vrb_format {
enum flex_ngap_val { enum flex_ngap_val {
FLNGV_1 = 0; FLNGV_1 = 0;
FLNGV_2 = 1; FLNGV_2 = 1;
} }
\ No newline at end of file
enum flex_mod_type {
FLMOD_QPSK = 2;
FLMOD_16QAM = 4;
FLMOD_64QAM = 6;
}
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