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ZhouShuya
OpenXG-RAN
Commits
8adfe07b
Commit
8adfe07b
authored
Sep 24, 2020
by
Sakthivel Velumani
Browse files
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Plain Diff
fixed cce indexing to allow multiple pdcch on single coreset
parent
5372a347
Changes
6
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6 changed files
with
68 additions
and
31 deletions
+68
-31
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+26
-20
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+3
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+30
-8
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+2
-2
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+6
-0
No files found.
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
8adfe07b
...
@@ -153,37 +153,23 @@ void nr_pdcch_scrambling(uint32_t *in,
...
@@ -153,37 +153,23 @@ void nr_pdcch_scrambling(uint32_t *in,
}
}
}
}
uint8_t
nr_generate_dci
(
PHY_VARS_gNB
*
gNB
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
,
uint8_t
nr_generate_dci_top
(
PHY_VARS_gNB
*
gNB
,
uint32_t
**
gold_pdcch_dmrs
,
nfapi_nr_dl_tti_pdcch_pdu
*
pdcch_pdu
,
int32_t
*
txdataF
,
nfapi_nr_dl_tti_pdcch_pdu
*
ul_dci_pdu
,
int16_t
amp
,
uint32_t
**
gold_pdcch_dmrs
,
NR_DL_FRAME_PARMS
frame_parms
)
{
int32_t
*
txdataF
,
int16_t
amp
,
NR_DL_FRAME_PARMS
frame_parms
)
{
int16_t
mod_dmrs
[
NR_MAX_CSET_DURATION
][
NR_MAX_PDCCH_DMRS_LENGTH
>>
1
]
__attribute__
((
aligned
(
16
)));
// 3 for the max coreset duration
int16_t
mod_dmrs
[
NR_MAX_CSET_DURATION
][
NR_MAX_PDCCH_DMRS_LENGTH
>>
1
]
__attribute__
((
aligned
(
16
)));
// 3 for the max coreset duration
uint16_t
cset_start_sc
;
uint16_t
cset_start_sc
;
uint8_t
cset_start_symb
,
cset_nsymb
;
uint8_t
cset_start_symb
,
cset_nsymb
;
int
k
,
l
,
k_prime
,
dci_idx
,
dmrs_idx
;
int
k
,
l
,
k_prime
,
dci_idx
,
dmrs_idx
;
/*First iteration: single DCI*/
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
NULL
;
// find coreset descriptor
// find coreset descriptor
int
rb_offset
;
int
rb_offset
;
int
n_rb
;
int
n_rb
;
AssertFatal
(
pdcch_pdu
!=
NULL
||
ul_dci_pdu
!=
NULL
,
"At least one pointer has to be !NULL
\n
"
);
AssertFatal
(
pdcch_pdu
==
NULL
||
ul_dci_pdu
==
NULL
,
"Can't handle both DL and UL DCI in same slot
\n
"
);
if
(
pdcch_pdu
)
pdcch_pdu_rel15
=
&
pdcch_pdu
->
pdcch_pdu_rel15
;
else
if
(
ul_dci_pdu
)
pdcch_pdu_rel15
=
&
ul_dci_pdu
->
pdcch_pdu_rel15
;
nr_fill_cce_list
(
gNB
,
0
,
pdcch_pdu_rel15
);
nr_fill_cce_list
(
gNB
,
0
,
pdcch_pdu_rel15
);
get_coreset_rballoc
(
pdcch_pdu_rel15
->
FreqDomainResource
,
&
n_rb
,
&
rb_offset
);
get_coreset_rballoc
(
pdcch_pdu_rel15
->
FreqDomainResource
,
&
n_rb
,
&
rb_offset
);
...
@@ -333,3 +319,23 @@ uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
...
@@ -333,3 +319,23 @@ uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
return
0
;
return
0
;
}
}
uint8_t
nr_generate_dci_top
(
PHY_VARS_gNB
*
gNB
,
nfapi_nr_dl_tti_pdcch_pdu
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu
*
ul_dci_pdu
,
uint32_t
**
gold_pdcch_dmrs
,
int32_t
*
txdataF
,
int16_t
amp
,
NR_DL_FRAME_PARMS
frame_parms
)
{
AssertFatal
(
pdcch_pdu
!=
NULL
||
ul_dci_pdu
!=
NULL
,
"At least one pointer has to be !NULL
\n
"
);
if
(
pdcch_pdu
&&
ul_dci_pdu
)
return
(
nr_generate_dci
(
gNB
,
&
pdcch_pdu
->
pdcch_pdu_rel15
,
gold_pdcch_dmrs
,
txdataF
,
amp
,
frame_parms
)
||
nr_generate_dci
(
gNB
,
&
ul_dci_pdu
->
pdcch_pdu_rel15
,
gold_pdcch_dmrs
,
txdataF
,
amp
,
frame_parms
));
else
if
(
pdcch_pdu
)
return
nr_generate_dci
(
gNB
,
&
pdcch_pdu
->
pdcch_pdu_rel15
,
gold_pdcch_dmrs
,
txdataF
,
amp
,
frame_parms
);
else
if
(
ul_dci_pdu
)
return
nr_generate_dci
(
gNB
,
&
ul_dci_pdu
->
pdcch_pdu_rel15
,
gold_pdcch_dmrs
,
txdataF
,
amp
,
frame_parms
);
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
8adfe07b
...
@@ -465,6 +465,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -465,6 +465,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coreset0
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coreset0
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coresetid 1
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coresetid 1
for
(
int
i
=
0
;
i
<
MAX_NUM_CORESET
;
i
++
)
RC
.
nrmac
[
module_idP
]
->
UE_list
.
num_pdcch_cand
[
UE_id
][
i
]
=
0
;
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
//mbsfn_status[CC_id] = 0;
//mbsfn_status[CC_id] = 0;
...
@@ -508,6 +510,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -508,6 +510,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedule RA procedure if not in phy_test mode
// This schedule RA procedure if not in phy_test mode
// Otherwise already consider 5G already connected
// Otherwise already consider 5G already connected
RC
.
nrmac
[
module_idP
]
->
current_slot
=
slot
;
if
(
get_softmodem_params
()
->
phy_test
==
0
)
{
if
(
get_softmodem_params
()
->
phy_test
==
0
)
{
nr_schedule_RA
(
module_idP
,
frame
,
slot
);
nr_schedule_RA
(
module_idP
,
frame
,
slot
);
nr_schedule_reception_msg3
(
module_idP
,
0
,
frame
,
slot
);
nr_schedule_reception_msg3
(
module_idP
,
0
,
frame
,
slot
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
8adfe07b
...
@@ -418,7 +418,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
...
@@ -418,7 +418,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
int
ret
=
nr_configure_pdcch
(
nr_mac
,
int
ret
=
nr_configure_pdcch
(
nr_mac
,
pdcch_pdu_rel15
,
pdcch_pdu_rel15
,
UE_
list
->
rnti
[
UE_id
]
,
UE_
id
,
1
,
// ue-specific
1
,
// ue-specific
ss
,
ss
,
scc
,
scc
,
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
8adfe07b
...
@@ -133,7 +133,7 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
...
@@ -133,7 +133,7 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
int
aggregation
,
int
aggregation
,
int
search_space
,
// 0 common, 1 ue-specific
int
search_space
,
// 0 common, 1 ue-specific
int
UE_id
,
int
UE_id
,
int
m
)
{
int
nr_of_candidates
)
{
// uncomment these when we allocate for common search space
// uncomment these when we allocate for common search space
// NR_COMMON_channels_t *cc = nr_mac->common_channels;
// NR_COMMON_channels_t *cc = nr_mac->common_channels;
// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
...
@@ -169,16 +169,19 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
...
@@ -169,16 +169,19 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
uint16_t
N_reg
=
n_rb
*
coreset
->
duration
;
uint16_t
N_reg
=
n_rb
*
coreset
->
duration
;
uint16_t
Y
=
0
,
N_cce
,
M_s_max
,
n_CI
=
0
;
uint16_t
Y
=
0
,
N_cce
,
M_s_max
,
n_CI
=
0
;
uint16_t
n_RNTI
=
search_space
==
1
?
UE_list
->
rnti
[
UE_id
]
:
0
;
uint16_t
n_RNTI
=
search_space
==
1
?
UE_list
->
rnti
[
UE_id
]
:
0
;
uint32_t
A
[
3
]
=
{
39827
,
39829
,
39839
};
N_cce
=
N_reg
/
NR_NB_REG_PER_CCE
;
N_cce
=
N_reg
/
NR_NB_REG_PER_CCE
;
M_s_max
=
(
aggregation
==
4
)
?
4
:
(
aggregation
==
8
)
?
2
:
1
;
M_s_max
=
nr_of_candidates
;
if
(
search_space
==
1
)
{
if
(
search_space
==
1
)
{
Y
=
(
A
[
0
]
*
n_RNTI
)
%
65537
;
// Candidate 0, antenna port 0
Y
=
UE_list
->
Y
[
UE_id
][
coreset_id
][
nr_mac
->
current_slot
];
}
}
int
first_cce
=
aggregation
*
((
Y
+
(
m
*
N_cce
)
/
(
aggregation
*
M_s_max
)
+
n_CI
)
%
CEILIDIV
(
N_cce
,
aggregation
));
int
m
=
nr_mac
->
UE_list
.
num_pdcch_cand
[
UE_id
][
coreset_id
];
AssertFatal
(
m
<
nr_of_candidates
,
"PDCCH candidate index %d for RNTI %d in CORESET %d exceeds the maximum number of PDCCH candidates (%d) for the search space %d
\n
"
,
m
,
n_RNTI
,
coreset_id
,
nr_of_candidates
,
search_space
);
int
first_cce
=
aggregation
*
((
Y
+
CEILIDIV
((
m
*
N_cce
),(
aggregation
*
M_s_max
))
+
n_CI
)
%
CEILIDIV
(
N_cce
,
aggregation
));
for
(
int
i
=
0
;
i
<
aggregation
;
i
++
)
for
(
int
i
=
0
;
i
<
aggregation
;
i
++
)
if
(
cce_list
[
first_cce
+
i
]
!=
0
)
return
(
-
1
);
if
(
cce_list
[
first_cce
+
i
]
!=
0
)
return
(
-
1
);
...
@@ -409,7 +412,7 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
...
@@ -409,7 +412,7 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
int
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
int
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
uint16_t
rnti
,
int
UE_id
,
int
ss_type
,
int
ss_type
,
NR_SearchSpace_t
*
ss
,
NR_SearchSpace_t
*
ss
,
NR_ServingCellConfigCommon_t
*
scc
,
NR_ServingCellConfigCommon_t
*
scc
,
...
@@ -418,6 +421,7 @@ int nr_configure_pdcch(gNB_MAC_INST *nr_mac,
...
@@ -418,6 +421,7 @@ int nr_configure_pdcch(gNB_MAC_INST *nr_mac,
int
CCEIndex
=
-
1
;
int
CCEIndex
=
-
1
;
int
cid
=
0
;
int
cid
=
0
;
NR_ControlResourceSet_t
*
coreset
=
NULL
;
NR_ControlResourceSet_t
*
coreset
=
NULL
;
uint16_t
rnti
=
nr_mac
->
UE_list
.
rnti
[
UE_id
];
if
(
bwp
)
{
// This is not the InitialBWP
if
(
bwp
)
{
// This is not the InitialBWP
NR_ControlResourceSet_t
*
temp_coreset
;
NR_ControlResourceSet_t
*
temp_coreset
;
...
@@ -517,8 +521,8 @@ int nr_configure_pdcch(gNB_MAC_INST *nr_mac,
...
@@ -517,8 +521,8 @@ int nr_configure_pdcch(gNB_MAC_INST *nr_mac,
cid
,
cid
,
aggregation_level
,
aggregation_level
,
ss
->
searchSpaceType
->
present
-
1
,
// search_space, 0 common, 1 ue-specific
ss
->
searchSpaceType
->
present
-
1
,
// search_space, 0 common, 1 ue-specific
0
,
// UE-id
UE_id
,
0
);
// m
nr_of_candidates
);
if
(
CCEIndex
<
0
)
if
(
CCEIndex
<
0
)
return
(
CCEIndex
);
return
(
CCEIndex
);
...
@@ -531,6 +535,7 @@ int nr_configure_pdcch(gNB_MAC_INST *nr_mac,
...
@@ -531,6 +535,7 @@ int nr_configure_pdcch(gNB_MAC_INST *nr_mac,
pdcch_pdu
->
dci_pdu
.
powerControlOffsetSS
[
pdcch_pdu
->
numDlDci
]
=
1
;
pdcch_pdu
->
dci_pdu
.
powerControlOffsetSS
[
pdcch_pdu
->
numDlDci
]
=
1
;
pdcch_pdu
->
numDlDci
++
;
pdcch_pdu
->
numDlDci
++
;
nr_mac
->
UE_list
.
num_pdcch_cand
[
UE_id
][
coresetid
]
++
;
return
(
0
);
return
(
0
);
}
}
else
{
// this is for InitialBWP
else
{
// this is for InitialBWP
...
@@ -1437,6 +1442,22 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
...
@@ -1437,6 +1442,22 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
return
-
1
;
return
-
1
;
}
}
void
set_Y
(
NR_UE_list_t
*
UE_list
,
int
UE_id
)
{
int
A
[
3
]
=
{
39827
,
39829
,
39839
};
int
D
=
65537
;
int
s
=
0
;
UE_list
->
Y
[
UE_id
][
0
][
s
]
=
(
A
[
0
]
*
UE_list
->
rnti
[
UE_id
])
%
D
;
UE_list
->
Y
[
UE_id
][
1
][
s
]
=
(
A
[
1
]
*
UE_list
->
rnti
[
UE_id
])
%
D
;
UE_list
->
Y
[
UE_id
][
2
][
s
]
=
(
A
[
2
]
*
UE_list
->
rnti
[
UE_id
])
%
D
;
for
(
s
=
1
;
s
<
160
;
s
++
)
{
UE_list
->
Y
[
UE_id
][
0
][
s
]
=
(
A
[
0
]
*
UE_list
->
Y
[
UE_id
][
0
][
s
-
1
])
%
D
;
UE_list
->
Y
[
UE_id
][
1
][
s
]
=
(
A
[
1
]
*
UE_list
->
Y
[
UE_id
][
1
][
s
-
1
])
%
D
;
UE_list
->
Y
[
UE_id
][
2
][
s
]
=
(
A
[
2
]
*
UE_list
->
Y
[
UE_id
][
2
][
s
-
1
])
%
D
;
}
}
int
add_new_nr_ue
(
module_id_t
mod_idP
,
rnti_t
rntiP
){
int
add_new_nr_ue
(
module_id_t
mod_idP
,
rnti_t
rntiP
){
int
UE_id
;
int
UE_id
;
...
@@ -1462,6 +1483,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
...
@@ -1462,6 +1483,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
UE_list
->
num_UEs
++
;
UE_list
->
num_UEs
++
;
UE_list
->
active
[
UE_id
]
=
TRUE
;
UE_list
->
active
[
UE_id
]
=
TRUE
;
UE_list
->
rnti
[
UE_id
]
=
rntiP
;
UE_list
->
rnti
[
UE_id
]
=
rntiP
;
set_Y
(
UE_list
,
UE_id
);
memset
((
void
*
)
&
UE_list
->
UE_sched_ctrl
[
UE_id
],
memset
((
void
*
)
&
UE_list
->
UE_sched_ctrl
[
UE_id
],
0
,
0
,
sizeof
(
NR_UE_sched_ctrl_t
));
sizeof
(
NR_UE_sched_ctrl_t
));
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
8adfe07b
...
@@ -213,7 +213,7 @@ void find_search_space(int ss_type,
...
@@ -213,7 +213,7 @@ void find_search_space(int ss_type,
int
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
int
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
uint16_t
rnti
,
int
UE_id
,
int
ss_type
,
int
ss_type
,
NR_SearchSpace_t
*
ss
,
NR_SearchSpace_t
*
ss
,
NR_ServingCellConfigCommon_t
*
scc
,
NR_ServingCellConfigCommon_t
*
scc
,
...
@@ -271,7 +271,7 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
...
@@ -271,7 +271,7 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
int
aggregation
,
int
aggregation
,
int
search_space
,
// 0 common, 1 ue-specific
int
search_space
,
// 0 common, 1 ue-specific
int
UE_id
,
int
UE_id
,
int
m
int
nr_of_candidates
);
);
int
get_dlscs
(
nfapi_nr_config_request_t
*
cfg
);
int
get_dlscs
(
nfapi_nr_config_request_t
*
cfg
);
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
8adfe07b
...
@@ -335,6 +335,10 @@ typedef struct {
...
@@ -335,6 +335,10 @@ typedef struct {
rnti_t
tc_rnti
[
MAX_MOBILES_PER_GNB
];
rnti_t
tc_rnti
[
MAX_MOBILES_PER_GNB
];
NR_preamble_ue
preambles
[
MAX_MOBILES_PER_GNB
];
NR_preamble_ue
preambles
[
MAX_MOBILES_PER_GNB
];
NR_CellGroupConfig_t
*
secondaryCellGroup
[
MAX_MOBILES_PER_GNB
];
NR_CellGroupConfig_t
*
secondaryCellGroup
[
MAX_MOBILES_PER_GNB
];
/// CCE indexing
int
Y
[
MAX_MOBILES_PER_GNB
][
3
][
160
];
int
m
[
MAX_MOBILES_PER_GNB
];
int
num_pdcch_cand
[
MAX_MOBILES_PER_GNB
][
MAX_NUM_CORESET
];
}
NR_UE_list_t
;
}
NR_UE_list_t
;
/*! \brief top level eNB MAC structure */
/*! \brief top level eNB MAC structure */
...
@@ -401,6 +405,8 @@ typedef struct gNB_MAC_INST_s {
...
@@ -401,6 +405,8 @@ typedef struct gNB_MAC_INST_s {
time_stats_t
schedule_pch
;
time_stats_t
schedule_pch
;
/// CCE lists
/// CCE lists
int
cce_list
[
MAX_NUM_BWP
][
MAX_NUM_CORESET
][
MAX_NUM_CCE
];
int
cce_list
[
MAX_NUM_BWP
][
MAX_NUM_CORESET
][
MAX_NUM_CCE
];
/// current slot
int
current_slot
;
}
gNB_MAC_INST
;
}
gNB_MAC_INST
;
#endif
/*__LAYER2_NR_MAC_GNB_H__ */
#endif
/*__LAYER2_NR_MAC_GNB_H__ */
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