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Commit f88dd725 authored by Francesco Mani's avatar Francesco Mani
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Merge branch 'nr_tdd_configuration' into NR_RRCConfiguration

parents 32f4c11b c53a3f35
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Showing with 205 additions and 76 deletions
executables/nr-ru.c
View file @ f88dd725
...@@ -310,11 +310,13 @@ void fh_if5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp) ...@@ -310,11 +310,13 @@ void fh_if5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp)
// southbound IF4p5 fronthaul // southbound IF4p5 fronthaul
void fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp) void fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp)
{ {
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff ); if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.tti_tx); LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.tti_tx);
if ((nr_slot_select(ru->nr_frame_parms,ru->proc.frame_tx,ru->proc.tti_tx)&NR_DOWNLINK_SLOT) > 0)
if ((nr_slot_select(cfg,ru->proc.frame_tx,ru->proc.tti_tx)&NR_DOWNLINK_SLOT) > 0)
send_IF4p5(ru,frame, slot, IF4p5_PDLFFT); send_IF4p5(ru,frame, slot, IF4p5_PDLFFT);
} }
...@@ -517,6 +519,7 @@ void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *slot) { ...@@ -517,6 +519,7 @@ void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) { void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms; NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc; RU_proc_t *proc = &ru->proc;
uint16_t packet_type; uint16_t packet_type;
uint32_t symbol_number,symbol_mask,symbol_mask_full=0; uint32_t symbol_number,symbol_mask,symbol_mask_full=0;
...@@ -529,10 +532,10 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) { ...@@ -529,10 +532,10 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
do { do {
recv_IF4p5(ru, &frame_tx, &slot_tx, &packet_type, &symbol_number); recv_IF4p5(ru, &frame_tx, &slot_tx, &packet_type, &symbol_number);
if (((nr_slot_select(ru->nr_frame_parms,frame_tx,slot_tx) & NR_DOWNLINK_SLOT) > 0) && (symbol_number == 0)) start_meas(&ru->rx_fhaul); if (((nr_slot_select(cfg,frame_tx,slot_tx) & NR_DOWNLINK_SLOT) > 0) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
LOG_D(PHY,"slot %d (%d): frame %d, slot %d, symbol %d\n", LOG_D(PHY,"slot %d (%d): frame %d, slot %d, symbol %d\n",
*slot,nr_slot_select(ru->nr_frame_parms,frame_tx,*slot),frame_tx,slot_tx,symbol_number); *slot,nr_slot_select(cfg,frame_tx,*slot),frame_tx,slot_tx,symbol_number);
if (proc->first_tx != 0) { if (proc->first_tx != 0) {
*frame = frame_tx; *frame = frame_tx;
...@@ -551,7 +554,7 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) { ...@@ -551,7 +554,7 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
} else AssertFatal(1==0,"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d\n",packet_type); } else AssertFatal(1==0,"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d\n",packet_type);
} while (symbol_mask != symbol_mask_full); } while (symbol_mask != symbol_mask_full);
if ((nr_slot_select(ru->nr_frame_parms,frame_tx,slot_tx) & NR_DOWNLINK_SLOT)>0) stop_meas(&ru->rx_fhaul); if ((nr_slot_select(cfg,frame_tx,slot_tx) & NR_DOWNLINK_SLOT)>0) stop_meas(&ru->rx_fhaul);
proc->tti_tx = slot_tx; proc->tti_tx = slot_tx;
proc->frame_tx = frame_tx; proc->frame_tx = frame_tx;
...@@ -711,32 +714,56 @@ void rx_rf(RU_t *ru,int *frame,int *slot) { ...@@ -711,32 +714,56 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
RU_proc_t *proc = &ru->proc; RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms; NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
//nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config; nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
void *txp[ru->nb_tx]; void *txp[ru->nb_tx];
unsigned int txs; unsigned int txs;
int i; int i,txsymb;
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(frame), T_INT(slot), T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(frame), T_INT(slot),
T_INT(0), T_BUFFER(&ru->common.txdata[0][slot * fp->samples_per_slot], fp->samples_per_slot * 4)); T_INT(0), T_BUFFER(&ru->common.txdata[0][slot * fp->samples_per_slot], fp->samples_per_slot * 4));
int slot_type = nr_slot_select(ru->nr_frame_parms,frame,slot%fp->slots_per_frame); int slot_type = nr_slot_select(cfg,frame,slot%((1<<cfg->ssb_config.scs_common.value)*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME));
int sf_extension = 0; int prevslot_type = nr_slot_select(cfg,frame,(slot+(((1<<cfg->ssb_config.scs_common.value)*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)-1))%((1<<cfg->ssb_config.scs_common.value)*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME));
int sf_extension = 0;
if ((slot == 0) || //nr_subframe_t SF_type = nr_slot_select(cfg,slot%fp->slots_per_frame);
(slot == 1) || IS_SOFTMODEM_RFSIM ) { if (slot_type == NR_DOWNLINK_SLOT ||
slot_type == NR_MIXED_SLOT) {
int siglen=fp->samples_per_slot,flags=1;
if(slot_type == NR_MIXED_SLOT) {
txsymb = 0;
for(int symbol_count =0;symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT;symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
txsymb++;
}
}
AssertFatal(txsymb>0,"illegal txsymb %d\n",txsymb);
siglen = (fp->ofdm_symbol_size + fp->nb_prefix_samples0)
+ (txsymb - 1) * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
//+ ru->end_of_burst_delay;
flags=3; // end of burst
}
if (cfg->cell_config.frame_duplex_type.value == TDD &&
slot_type == NR_DOWNLINK_SLOT &&
prevslot_type == NR_UPLINK_SLOT) {
flags = 2; // start of burst
//sf_extension = ru->sf_extension;
}
/*if ((slot == 0) ||
(slot == 1)) {
int siglen=fp->samples_per_slot; int siglen=fp->samples_per_slot;
int flags; int flags;
if (slot==0) if (slot==0)
flags = 2; flags = 2;
else if (slot==1) else if (slot==1)
flags=3; flags=3;*/
else
flags=4;
if ((slot_type & NR_UPLINK_SLOT) == 0) { //if ((slot_type & NR_UPLINK_SLOT) == 0) {
/*
if (SF_type == SF_S) { /* if (SF_type == SF_S) {
siglen = fp->dl_symbols_in_S_subframe*(fp->ofdm_symbol_size+fp->nb_prefix_samples0); siglen = fp->dl_symbols_in_S_subframe*(fp->ofdm_symbol_size+fp->nb_prefix_samples0);
flags=3; // end of burst flags=3; // end of burst
} }
...@@ -754,7 +781,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { ...@@ -754,7 +781,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
(nextSF_type == SF_UL)) { (nextSF_type == SF_UL)) {
flags = 4; // start of burst and end of burst (only one DL SF between two UL) flags = 4; // start of burst and end of burst (only one DL SF between two UL)
sf_extension = ru->N_TA_offset<<1; sf_extension = ru->N_TA_offset<<1;
} */ }*/
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot );
...@@ -771,12 +798,11 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { ...@@ -771,12 +798,11 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
siglen+sf_extension, siglen+sf_extension,
ru->nb_tx, ru->nb_tx,
flags); flags);
LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, subframe %d\n",ru->idx, LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, slot %d\n",ru->idx,
(long long unsigned int)timestamp,frame,proc->frame_tx_unwrap,slot); (long long unsigned int)timestamp,frame,proc->frame_tx_unwrap,slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 ); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
AssertFatal(txs == siglen+sf_extension,"TX : Timeout (sent %u/%d)\n", txs, siglen); AssertFatal(txs == siglen+sf_extension,"TX : Timeout (sent %u/%d)\n", txs, siglen);
} }
}
} }
...@@ -791,6 +817,7 @@ void *ru_thread_asynch_rxtx( void *param ) { ...@@ -791,6 +817,7 @@ void *ru_thread_asynch_rxtx( void *param ) {
static int ru_thread_asynch_rxtx_status; static int ru_thread_asynch_rxtx_status;
RU_t *ru = (RU_t *)param; RU_t *ru = (RU_t *)param;
RU_proc_t *proc = &ru->proc; RU_proc_t *proc = &ru->proc;
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
int slot=0, frame=0; int slot=0, frame=0;
// wait for top-level synchronization and do one acquisition to get timestamp for setting frame/subframe // wait for top-level synchronization and do one acquisition to get timestamp for setting frame/subframe
wait_sync("ru_thread_asynch_rxtx"); wait_sync("ru_thread_asynch_rxtx");
...@@ -814,7 +841,7 @@ void *ru_thread_asynch_rxtx( void *param ) { ...@@ -814,7 +841,7 @@ void *ru_thread_asynch_rxtx( void *param ) {
// asynchronous receive from north (RRU IF4/IF5) // asynchronous receive from north (RRU IF4/IF5)
if (ru->fh_north_asynch_in) { if (ru->fh_north_asynch_in) {
if ((nr_slot_select(ru->nr_frame_parms,frame,slot) & NR_DOWNLINK_SLOT)>0) if ((nr_slot_select(cfg,frame,slot) & NR_DOWNLINK_SLOT)>0)
ru->fh_north_asynch_in(ru,&frame,&slot); ru->fh_north_asynch_in(ru,&frame,&slot);
} else AssertFatal(1==0,"Unknown function in ru_thread_asynch_rxtx\n"); } else AssertFatal(1==0,"Unknown function in ru_thread_asynch_rxtx\n");
} }
......
openair1/PHY/INIT/nr_init.c
View file @ f88dd725
...@@ -390,6 +390,7 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) { ...@@ -390,6 +390,7 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) {
} }
memcpy((void*)&gNB_config->prach_config,(void*)&phy_config->cfg->prach_config,sizeof(phy_config->cfg->prach_config)); memcpy((void*)&gNB_config->prach_config,(void*)&phy_config->cfg->prach_config,sizeof(phy_config->cfg->prach_config));
memcpy((void*)&gNB_config->tdd_table,(void*)&phy_config->cfg->tdd_table,sizeof(phy_config->cfg->tdd_table));
RC.gNB[Mod_id]->mac_enabled = 1; RC.gNB[Mod_id]->mac_enabled = 1;
fp->dl_CarrierFreq = (gNB_config->carrier_config.dl_frequency.value)*1e3 + (gNB_config->carrier_config.dl_bandwidth.value)*5e5; fp->dl_CarrierFreq = (gNB_config->carrier_config.dl_frequency.value)*1e3 + (gNB_config->carrier_config.dl_bandwidth.value)*5e5;
...@@ -408,8 +409,8 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) { ...@@ -408,8 +409,8 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) {
(unsigned long long)fp->dl_CarrierFreq, (unsigned long long)fp->dl_CarrierFreq,
(unsigned long long)fp->ul_CarrierFreq); (unsigned long long)fp->ul_CarrierFreq);
nr_init_frame_parms(gNB_config, fp); nr_init_frame_parms(gNB_config, fp);
if (RC.gNB[Mod_id]->configured == 1) { if (RC.gNB[Mod_id]->configured == 1) {
LOG_E(PHY,"Already gNB already configured, do nothing\n"); LOG_E(PHY,"Already gNB already configured, do nothing\n");
......
openair1/PHY/defs_common.h
View file @ f88dd725
...@@ -88,6 +88,7 @@ ...@@ -88,6 +88,7 @@
#define LTE_CE_OFFSET LTE_CE_FILTER_LENGTH #define LTE_CE_OFFSET LTE_CE_FILTER_LENGTH
#define TX_RX_SWITCH_SYMBOL (NUMBER_OF_SYMBOLS_PER_FRAME>>1) #define TX_RX_SWITCH_SYMBOL (NUMBER_OF_SYMBOLS_PER_FRAME>>1)
#define PBCH_PDU_SIZE 3 //bytes #define PBCH_PDU_SIZE 3 //bytes
#define NR_NUMBER_OF_SYMBOLS_PER_SLOT 14
#define PRACH_SYMBOL 3 //position of the UL PSS wrt 2nd slot of special subframe #define PRACH_SYMBOL 3 //position of the UL PSS wrt 2nd slot of special subframe
......
openair1/SCHED_NR/nr_ru_procedures.c
View file @ f88dd725
...@@ -111,7 +111,7 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa) { ...@@ -111,7 +111,7 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa) {
void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) { void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc; RU_proc_t *proc = &ru->proc;
RU_feptx_t *feptx = proc->feptx; RU_feptx_t *feptx = proc->feptx;
...@@ -128,7 +128,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) { ...@@ -128,7 +128,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
int ofdm_mask_full = (1<<(ru->nb_tx*2))-1; int ofdm_mask_full = (1<<(ru->nb_tx*2))-1;
int txdataF_offset = ((tti_tx%2)*fp->samples_per_slot_wCP); int txdataF_offset = ((tti_tx%2)*fp->samples_per_slot_wCP);
if (nr_slot_select(fp,frame_tx,slot) == NR_UPLINK_SLOT) return; if (nr_slot_select(cfg,frame_tx,slot) == NR_UPLINK_SLOT) return;
for (aa=0; aa<fp->Lmax; aa++) { for (aa=0; aa<fp->Lmax; aa++) {
memset(ru->common.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t)); memset(ru->common.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
} }
...@@ -155,7 +155,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) { ...@@ -155,7 +155,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 ); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
if (nr_slot_select(fp,frame_tx,slot)==NR_DOWNLINK_SLOT) { if (nr_slot_select(cfg,frame_tx,slot)==NR_DOWNLINK_SLOT) {
// If this is not an S-tti // If this is not an S-tti
for(i=0; i<ru->nb_tx; ++i){ for(i=0; i<ru->nb_tx; ++i){
if(j%2 == 0){ if(j%2 == 0){
...@@ -291,6 +291,7 @@ static void *nr_feptx_thread(void *param) { ...@@ -291,6 +291,7 @@ static void *nr_feptx_thread(void *param) {
// seems to be hardcoded to numerology 1 (2 slots=1 subframe) // seems to be hardcoded to numerology 1 (2 slots=1 subframe)
void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) { void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms; NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
int cyclic_prefix_type = NFAPI_CP_NORMAL; int cyclic_prefix_type = NFAPI_CP_NORMAL;
...@@ -308,7 +309,7 @@ void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) { ...@@ -308,7 +309,7 @@ void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot); // LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
nr_feptx0(ru,slot,0,fp->symbols_per_slot,aa); nr_feptx0(ru,slot,0,NR_NUMBER_OF_SYMBOLS_PER_SLOT,aa);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 ); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 );
stop_meas(&ru->ofdm_mod_stats); stop_meas(&ru->ofdm_mod_stats);
......
openair1/SCHED_NR/phy_frame_config_nr.c
View file @ f88dd725
...@@ -32,6 +32,8 @@ ...@@ -32,6 +32,8 @@
#include "SCHED_NR_UE/defs.h" #include "SCHED_NR_UE/defs.h"
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h" #include "SCHED_NR_UE/phy_frame_config_nr.h"
#include "PHY/defs_common.h"
#include "PHY/impl_defs_top.h"
/******************************************************************* /*******************************************************************
* *
...@@ -49,56 +51,105 @@ ...@@ -49,56 +51,105 @@
* *
*********************************************************************/ *********************************************************************/
int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeriodicity, int set_tdd_config_nr( nfapi_nr_config_request_scf_t *cfg,
int mu,
int nrofDownlinkSlots, int nrofDownlinkSymbols, int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols) int nrofUplinkSlots, int nrofUplinkSymbols)
{ {
TDD_UL_DL_configCommon_t *p_tdd_ul_dl_configuration; int slot_number = 0,nb_periods_per_frame;
int slot_number = 0; int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(1<<mu)*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME;
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
switch(cfg->tdd_table.tdd_period.value) {
/* allocate buffer for configuration structure */ case 0:
p_tdd_ul_dl_configuration = calloc( 1, sizeof(TDD_UL_DL_configCommon_t)); nb_periods_per_frame = 20; // 10ms/0p5ms
break;
if (p_tdd_ul_dl_configuration == NULL) { case 1:
printf("Error test_frame_configuration: memory allocation problem \n"); nb_periods_per_frame = 16; // 10ms/0p625ms
assert(0); break;
case 2:
nb_periods_per_frame = 10; // 10ms/1ms
break;
case 3:
nb_periods_per_frame = 8; // 10ms/1p25ms
break;
case 4:
nb_periods_per_frame = 5; // 10ms/2ms
break;
case 5:
nb_periods_per_frame = 4; // 10ms/2p5ms
break;
case 6:
nb_periods_per_frame = 2; // 10ms/5ms
break;
case 7:
nb_periods_per_frame = 1; // 10ms/10ms
break;
default:
AssertFatal(1==0,"Undefined tdd period %d\n", cfg->tdd_table.tdd_period.value);
} }
else {
frame_parms->frame_type = TDD;
}
p_tdd_ul_dl_configuration->dl_UL_TransmissionPeriodicity = dl_UL_TransmissionPeriodicity;
p_tdd_ul_dl_configuration->nrofDownlinkSlots = nrofDownlinkSlots;
p_tdd_ul_dl_configuration->nrofDownlinkSymbols = nrofDownlinkSymbols;
p_tdd_ul_dl_configuration->nrofUplinkSlots = nrofUplinkSlots;
p_tdd_ul_dl_configuration->nrofUplinkSymbols = nrofUplinkSymbols;
frame_parms->p_tdd_UL_DL_Configuration = p_tdd_ul_dl_configuration;
int nb_periods_per_frame = (FRAME_DURATION_MICRO_SEC/dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = ((1<<frame_parms->numerology_index) * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
int nb_slots_per_period = ((1<<mu) * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots + 1), AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots + 1),
"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, nrofUplinkSlots %d, nb_slots_per_period %d \n", "set_tdd_configuration_nr: given period is inconsistent with current tdd configuration, nrofDownlinkSlots %d, nrofUplinkSlots %d, nb_slots_per_period %d \n",
nrofDownlinkSlots,nrofUplinkSlots,nb_slots_per_period); nrofDownlinkSlots,nrofUplinkSlots,nb_slots_per_period);
AssertFatal(nrofDownlinkSymbols + nrofUplinkSymbols < 14,"illegal symbol configuration DL %d, UL %d\n",nrofDownlinkSymbols,nrofUplinkSymbols); AssertFatal(nrofDownlinkSymbols + nrofUplinkSymbols < 14,"illegal symbol configuration DL %d, UL %d\n",nrofDownlinkSymbols,nrofUplinkSymbols);
cfg->tdd_table.max_tdd_periodicity_list = (nfapi_nr_max_tdd_periodicity_t *) malloc(nb_slots_to_set*sizeof(nfapi_nr_max_tdd_periodicity_t));
for(int memory_alloc =0 ; memory_alloc<nb_slots_to_set;memory_alloc++) {
cfg->tdd_table.max_tdd_periodicity_list[memory_alloc].max_num_of_symbol_per_slot_list = (nfapi_nr_max_num_of_symbol_per_slot_t *) malloc(NR_NUMBER_OF_SYMBOLS_PER_SLOT*sizeof(nfapi_nr_max_num_of_symbol_per_slot_t));
}
while(slot_number != nb_slots_to_set) { while(slot_number != nb_slots_to_set) {
if(nrofDownlinkSlots != 0) {
for (int number_of_symbol = 0; number_of_symbol < nrofDownlinkSlots*NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.value= 0;
if((number_of_symbol+1)%NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0) {
slot_number++;
}
}
}
if (nrofDownlinkSymbols != 0 || nrofUplinkSymbols != 0) {
for(int number_of_symbol =0; number_of_symbol < nrofDownlinkSymbols; number_of_symbol++){
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config.value= 0;
}
for(int number_of_symbol = nrofDownlinkSymbols; number_of_symbol < NR_NUMBER_OF_SYMBOLS_PER_SLOT-nrofUplinkSymbols; number_of_symbol++){
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config.value= 2;
}
for(int number_of_symbol = NR_NUMBER_OF_SYMBOLS_PER_SLOT-nrofUplinkSymbols; number_of_symbol < NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++){
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol].slot_config.value= 1;
}
slot_number++;
}
if(nrofUplinkSlots != 0) {
for (int number_of_symbol = 0; number_of_symbol < nrofUplinkSlots*NR_NUMBER_OF_SYMBOLS_PER_SLOT; number_of_symbol++) {
cfg->tdd_table.max_tdd_periodicity_list[slot_number].max_num_of_symbol_per_slot_list[number_of_symbol%NR_NUMBER_OF_SYMBOLS_PER_SLOT].slot_config.value= 1;
if((number_of_symbol+1)%NR_NUMBER_OF_SYMBOLS_PER_SLOT == 0) {
slot_number++;
}
}
}
}
/*
while(slot_number != nb_slots_to_set) {
for (int number_of_slot = 0; number_of_slot < nrofDownlinkSlots; number_of_slot++) { for (int number_of_slot = 0; number_of_slot < nrofDownlinkSlots; number_of_slot++) {
frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_DOWNLINK_SLOT; frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_DOWNLINK_SLOT;
printf("slot %d set as downlink\n",slot_number);
slot_number++; slot_number++;
} }
if (p_tdd_ul_dl_configuration->nrofDownlinkSymbols != 0) { if (nrofDownlinkSymbols != 0 || nrofUplinkSymbols != 0) {
LOG_E(PHY,"set_tdd_configuration_nr: downlink symbol for slot is not supported for tdd configuration \n"); frame_parms->tdd_uplink_nr[slot_number] = (1<<nrofUplinkSymbols) - 1;
return (-1); printf("slot %d set as SL\n",slot_number);
slot_number++;
} }
for (int number_of_slot = 0; number_of_slot < nrofUplinkSlots; number_of_slot++) { for (int number_of_slot = 0; number_of_slot < nrofUplinkSlots; number_of_slot++) {
frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_UPLINK_SLOT; frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_UPLINK_SLOT;
printf("slot %d set as uplink\n",slot_number);
slot_number++; slot_number++;
} }
...@@ -111,7 +162,7 @@ int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeri ...@@ -111,7 +162,7 @@ int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeri
if (frame_parms->p_tdd_UL_DL_ConfigurationCommon2 != NULL) { if (frame_parms->p_tdd_UL_DL_ConfigurationCommon2 != NULL) {
LOG_E(PHY,"set_tdd_configuration_nr: additionnal tdd configuration 2 is not supported for tdd configuration \n"); LOG_E(PHY,"set_tdd_configuration_nr: additionnal tdd configuration 2 is not supported for tdd configuration \n");
return (-1); return (-1);
} }*/
return (0); return (0);
} }
...@@ -250,26 +301,57 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) ...@@ -250,26 +301,57 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
* *
*********************************************************************/ *********************************************************************/
int nr_slot_select(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti) int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
{ {
/* for FFD all slot can be considered as an uplink */ /* for FFD all slot can be considered as an uplink */
if (frame_parms->frame_type == FDD) { int mu = cfg->ssb_config.scs_common.value,check_slot=0;
if (cfg->cell_config.frame_duplex_type.value == FDD) {
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT ); return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT );
} }
if (nr_frame%2 == 0) { if (nr_frame%2 == 0) {
if (frame_parms->tdd_uplink_nr[nr_tti] == NR_TDD_UPLINK_SLOT) { for(int symbol_count=0;symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT;symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT); return (NR_UPLINK_SLOT);
}
check_slot = 0;
for(int symbol_count=0;symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT;symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT);
} }
else { else {
return (NR_MIXED_SLOT);
}
} else {
for(int symbol_count=0;symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT;symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0;
for(int symbol_count=0;symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT;symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT); return (NR_DOWNLINK_SLOT);
} }
} else {
else if ((frame_parms->tdd_uplink_nr[(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti] == NR_TDD_UPLINK_SLOT)) { return (NR_MIXED_SLOT);
return (NR_UPLINK_SLOT); }
}
else {
return (NR_DOWNLINK_SLOT);
} }
} }
......
openair1/SCHED_NR/phy_frame_config_nr.h
View file @ f88dd725
...@@ -47,7 +47,7 @@ ...@@ -47,7 +47,7 @@
* @param nrofUplinkSymbols number of uplink symbols * @param nrofUplinkSymbols number of uplink symbols
@returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */ @returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */
int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeriodicity, int set_tdd_config_nr(nfapi_nr_config_request_scf_t *cfg, int mu,
int nrofDownlinkSlots, int nrofDownlinkSymbols, int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols); int nrofUplinkSlots, int nrofUplinkSymbols);
...@@ -78,7 +78,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms); ...@@ -78,7 +78,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
* @param nr_tti : slot number * @param nr_tti : slot number
@returns nr_slot_t : downlink or uplink */ @returns nr_slot_t : downlink or uplink */
nr_slot_t nr_slot_select(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti); nr_slot_t nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti);
/** \brief This function frees tdd configuration for nr /** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
......
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @ f88dd725
...@@ -163,8 +163,8 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -163,8 +163,8 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
if (cfg->ssb_table.ssb_period.value > 1) if (cfg->ssb_table.ssb_period.value > 1)
ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ; // 10ms is the frame length ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ; // 10ms is the frame length
if ((cfg->cell_config.frame_duplex_type.value == TDD) && if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
((nr_slot_select(fp,frame,slot)&NR_UPLINK_SLOT) > 0)) return; ((nr_slot_select(cfg,frame,slot)&NR_UPLINK_SLOT) > 0)) return;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1);
......
openair1/SCHED_NR_UE/phy_frame_config_nr.h
View file @ f88dd725
...@@ -45,7 +45,7 @@ ...@@ -45,7 +45,7 @@
* @param nrofUplinkSymbols number of uplink symbols * @param nrofUplinkSymbols number of uplink symbols
@returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */ @returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */
int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeriodicity, int set_tdd_config_nr(nfapi_nr_config_request_scf_t *cfg, int mu,
int nrofDownlinkSlots, int nrofDownlinkSymbols, int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols); int nrofUplinkSlots, int nrofUplinkSymbols);
......
openair2/LAYER2/NR_MAC_gNB/config.c
View file @ f88dd725
...@@ -41,6 +41,7 @@ ...@@ -41,6 +41,7 @@
#include "NR_ServingCellConfigCommon.h" #include "NR_ServingCellConfigCommon.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h" #include "LAYER2/NR_MAC_gNB/mac_proto.h"
#include "SCHED_NR/phy_frame_config_nr.h"
#include "NR_MIB.h" #include "NR_MIB.h"
...@@ -403,9 +404,25 @@ void config_common(int Mod_idP, NR_ServingCellConfigCommon_t *scc) { ...@@ -403,9 +404,25 @@ void config_common(int Mod_idP, NR_ServingCellConfigCommon_t *scc) {
cfg->num_tlv++; cfg->num_tlv++;
// TDD Table Configuration // TDD Table Configuration
cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity; //cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG; cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
if(cfg->cell_config.frame_duplex_type.value == TDD){
int return_tdd = set_tdd_config_nr(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols
);
if (return_tdd !=0){
LOG_E(PHY,"TDD configuration can not be done\n");
}
else LOG_I(PHY,"TDD has been properly configurated\n");
}
/* /*
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf
View file @ f88dd725
...@@ -169,11 +169,11 @@ gNBs = ...@@ -169,11 +169,11 @@ gNBs =
# pattern1 # pattern1
# dl_UL_TransmissionPeriodicity # dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 0; dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7; nrofDownlinkSlots = 2;
nrofDownlinkSymbols = 6; nrofDownlinkSymbols = 1;
nrofUplinkSlots = 2; nrofUplinkSlots = 7;
nrofUplinkSymbols = 4; nrofUplinkSymbols = 7;
ssPBCH_BlockPower = 10; ssPBCH_BlockPower = 10;
} }
......
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