1. 27 Apr, 2021 8 commits
    • Robert Schmidt's avatar
      51e844e1
    • Robert Schmidt's avatar
      Bugfixes in nr_acknack_scheduling() · f73e8e04
      Robert Schmidt authored
      1: there can be 2bits AckNack + SR in PUCCH F0
      2: when allocating csi_pucch, zero out struct
      3: Make unfree resources a warning
      4: When asserting, explain the issue
      f73e8e04
    • Robert Schmidt's avatar
    • Robert Schmidt's avatar
    • Robert Schmidt's avatar
      Configure secondaryCellGroup: dedicated PUCCH, CSI, Preamble · c2d16eb8
      Robert Schmidt authored
      - Configure PUCCH Format 0 to be in separate RBs (each UE has dedicated
        resources)
      - Configure RA preamble to be different per UE
      - Configure CSI offset such that no two UEs have their report in the
        same frame
      c2d16eb8
    • Robert Schmidt's avatar
      f39b97a9
    • Robert Schmidt's avatar
      initial_csi_index depends on local_uid · 84e57113
      Robert Schmidt authored
      Nb_ue is not unique among UEs: consider 2 UEs present. The last UE has
      CSI idx "2". Now the first UE disconnects, and a new UE connects. It
      will also get CSI idx "2", and I assume this is not what we want.
      84e57113
    • Remi Hardy's avatar
      Integration 2021 wk17 a · d953b253
      Remi Hardy authored
      MR !1079 / MR !1108:
      1. Read slots from config file and schedules all slots *except* for slots 0 and 10. This is not a problem, since currently we cannot allocate more than six HARQ feedbacks in a slot, but we might have up to 7 with current configuration
      
      2. phytest mode is configurable. From `nr-softmodem -h`:
      
         -m: Set the downlink MCS for PHYTEST mode
         -t: Set the uplink MCS for PHYTEST mode
         -M: Set the downlink banwdwidth (in PRBs) for PHYTEST mode
         -T: Set the uplink banwdwidth (in PRBs) for PHYTEST mode
         -D: Bitmap for DLSCH slots (slot 0 starts at LSB)
         -U: Bitmap for ULSCH slots (slot 0 starts at LSB)
      
      3. Scheduler prints more information: UE PHR, PUCCH SNR, PUSCH SNR, RSSI
      4. The scheduler learned to scheduler DLSCH/ULSCH in mixed slots (if the time domain allocation matches the mixed slot)
      5. The scheduler expects
         * PDSCH Time Domain allocation index 0 to be the DL slot allocation
         * PDSCH TDA index 1 for Mixed DL slot
         * PUSCH TDA index 0 for UL slot
         * PUSCH TDA index 1 for Mixed UL slot
         * PUSCH TDA index 2 for Msg.3
      6. Some more cleanup, e.g., separate PDSCH/PUSCH data structures into "semi-static" data (e.g., TDA allocation to use, since it changes seldomly) and "dynamic" data (e.g., RB allocation per slot, which changes every slot)
      
      
      MR !1137 : Benetel config files fix
      d953b253
  2. 26 Apr, 2021 1 commit
  3. 25 Apr, 2021 2 commits
  4. 24 Apr, 2021 1 commit
    • Remi Hardy's avatar
      Integration 2021 wk16 · 5d834473
      Remi Hardy authored
      MR !1129 : gnb-realtime-hotfix
      -Hotfix for realtime performance issue
      -Enabled L1 and scheduler timing statistics
      -Changed order of UL Indication. L1 Rx -> UL Ind -> L1 Tx
      
      MR !1123 : [CI] ci_phytest
      -new 5G NR phy test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106
      
      MR !1128 : [CI] ci_add_runtime_stats
      -adding L1 processing stats
      
      MR !1132 : [CI] ci_add_uldlharq_stats
      -additonal ulsch/dlsch stat
      
      no MR : hotfix branch fixgtpu 
      -revert default values for 5GS
      -fix T_IDs.h build
      5d834473
  5. 23 Apr, 2021 1 commit
  6. 22 Apr, 2021 3 commits
  7. 21 Apr, 2021 11 commits
  8. 20 Apr, 2021 2 commits
  9. 19 Apr, 2021 3 commits
  10. 18 Apr, 2021 1 commit
    • rmagueta's avatar
      Fixes after merge · 8613aeb9
      rmagueta authored
      - No warning in RRC
      - Ethernet lib fix: correct include
      - fixes Msg.4
      - fixes conf: the UE cannot handle mixed slots
      8613aeb9
  11. 17 Apr, 2021 1 commit
  12. 16 Apr, 2021 6 commits