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  1. 06 May, 2021 1 commit
  3. 04 May, 2021 1 commit
  5. 03 May, 2021 5 commits
  7. 30 Apr, 2021 2 commits
  9. 29 Apr, 2021 10 commits
  11. 28 Apr, 2021 3 commits
  13. 27 Apr, 2021 5 commits
    • Florian Kaltenberger's avatar
      yet some more fixes to the benetel config files · 8d0b9e4c
      Florian Kaltenberger authored
      8d0b9e4c
    • hardy's avatar
      tentative to improve Module control encapsulation · b6daabc2
      hardy authored
      b6daabc2
    • francescomani's avatar
      Merge remote-tracking branch 'origin/develop' into multiple_ssb_sib1_bugfix · b08037d6
      francescomani authored
      b08037d6
    • Raphael Defosseux's avatar
      CI: fixes for OpenShift deployment of physical-simulators · 42a21722
      Raphael Defosseux authored 
        -- Missing finished tag in one deployment
  -- Deep copy of the array of pod names
  -- Hack for the out-of-sync on pexpect for `oc logs` and `oc get pods` commands
Signed-off-by: default avatarRaphael Defosseux <raphael.defosseux@eurecom.fr>
      42a21722
    • Remi Hardy's avatar
      Integration 2021 wk17 a · d953b253
      Remi Hardy authored 
      MR !1079 / MR !1108:
1. Read slots from config file and schedules all slots *except* for slots 0 and 10. This is not a problem, since currently we cannot allocate more than six HARQ feedbacks in a slot, but we might have up to 7 with current configuration

2. phytest mode is configurable. From `nr-softmodem -h`:

   -m: Set the downlink MCS for PHYTEST mode
   -t: Set the uplink MCS for PHYTEST mode
   -M: Set the downlink banwdwidth (in PRBs) for PHYTEST mode
   -T: Set the uplink banwdwidth (in PRBs) for PHYTEST mode
   -D: Bitmap for DLSCH slots (slot 0 starts at LSB)
   -U: Bitmap for ULSCH slots (slot 0 starts at LSB)

3. Scheduler prints more information: UE PHR, PUCCH SNR, PUSCH SNR, RSSI
4. The scheduler learned to scheduler DLSCH/ULSCH in mixed slots (if the time domain allocation matches the mixed slot)
5. The scheduler expects
   * PDSCH Time Domain allocation index 0 to be the DL slot allocation
   * PDSCH TDA index 1 for Mixed DL slot
   * PUSCH TDA index 0 for UL slot
   * PUSCH TDA index 1 for Mixed UL slot
   * PUSCH TDA index 2 for Msg.3
6. Some more cleanup, e.g., separate PDSCH/PUSCH data structures into "semi-static" data (e.g., TDA allocation to use, since it changes seldomly) and "dynamic" data (e.g., RB allocation per slot, which changes every slot)


MR !1137 : Benetel config files fix
      d953b253
  15. 26 Apr, 2021 2 commits
  17. 25 Apr, 2021 3 commits
  19. 24 Apr, 2021 1 commit
    • Remi Hardy's avatar
      Integration 2021 wk16 · 5d834473
      Remi Hardy authored 
      MR !1129 : gnb-realtime-hotfix
-Hotfix for realtime performance issue
-Enabled L1 and scheduler timing statistics
-Changed order of UL Indication. L1 Rx -> UL Ind -> L1 Tx

MR !1123 : [CI] ci_phytest
-new 5G NR phy test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106

MR !1128 : [CI] ci_add_runtime_stats
-adding L1 processing stats

MR !1132 : [CI] ci_add_uldlharq_stats
-additonal ulsch/dlsch stat

no MR : hotfix branch fixgtpu 
-revert default values for 5GS
-fix T_IDs.h build
      5d834473
  21. 23 Apr, 2021 1 commit
  23. 22 Apr, 2021 6 commits