Commit 115c1f38 authored by Robert Schmidt's avatar Robert Schmidt

Use fptr for preproc and align UL PP definition

parent a21e9aa6
......@@ -266,10 +266,11 @@ void RCconfig_macrlc(int macrlc_has_f1[MAX_MAC_INST]) {
void *d = dlsym(NULL, s);
AssertFatal(d, "%s(): no default scheduler DL algo '%s' found\n", __func__, s);
// release default, add new
RC.mac[j]->dl_algo.unset(&RC.mac[j]->dl_algo.data);
RC.mac[j]->dl_algo = *(default_sched_dl_algo_t *) d;
RC.mac[j]->dl_algo.data = RC.mac[j]->dl_algo.setup();
LOG_I(ENB_APP, "using default scheduler DL algo '%s'\n", RC.mac[j]->dl_algo.name);
pp_impl_param_t *dl_pp = &RC.mac[j]->pre_processor_dl;
dl_pp->dl_algo.unset(&dl_pp->dl_algo.data);
dl_pp->dl_algo = *(default_sched_dl_algo_t *) d;
dl_pp->dl_algo.data = dl_pp->dl_algo.setup();
LOG_I(ENB_APP, "using default scheduler DL algo '%s'\n", dl_pp->dl_algo.name);
}// j=0..num_inst
} /*else {// MacRLC_ParamList.numelt > 0 // ignore it
......
......@@ -573,10 +573,7 @@ schedule_ue_spec(module_id_t module_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,
VCD_FUNCTION_IN);
start_meas(&eNB->schedule_dlsch_preprocessor);
dlsch_scheduler_pre_processor(module_idP,
CC_id,
frameP,
subframeP);
eNB->pre_processor_dl.dl(module_idP, CC_id, frameP, subframeP);
stop_meas(&eNB->schedule_dlsch_preprocessor);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,
VCD_FUNCTION_OUT);
......
......@@ -2199,6 +2199,12 @@ add_new_ue(module_id_t mod_idP,
UE_info->active[UE_id] = TRUE;
add_ue_list(&UE_info->list, UE_id);
dump_ue_list(&UE_info->list);
pp_impl_param_t* dl = &RC.mac[mod_idP]->pre_processor_dl;
if (dl->slices) // inform slice implementation about new UE
dl->add_UE(dl->slices, UE_id);
pp_impl_param_t* ul = &RC.mac[mod_idP]->pre_processor_ul;
if (ul->slices) // inform slice implementation about new UE
ul->add_UE(ul->slices, UE_id);
if (IS_SOFTMODEM_IQPLAYER)// not specific to record/playback ?
UE_info->UE_template[cc_idP][UE_id].pre_assigned_mcs_ul = 0;
UE_info->UE_template[cc_idP][UE_id].rach_resource_type = rach_resource_type;
......@@ -2262,6 +2268,12 @@ rrc_mac_remove_ue(module_id_t mod_idP,
UE_info->num_UEs--;
remove_ue_list(&UE_info->list, UE_id);
pp_impl_param_t* dl = &RC.mac[mod_idP]->pre_processor_dl;
if (dl->slices) // inform slice implementation about new UE
dl->remove_UE(dl->slices, UE_id);
pp_impl_param_t* ul = &RC.mac[mod_idP]->pre_processor_ul;
if (ul->slices) // inform slice implementation about new UE
ul->remove_UE(ul->slices, UE_id);
/* Clear all remaining pending transmissions */
memset(&UE_info->UE_template[pCC_id][UE_id], 0, sizeof(UE_TEMPLATE));
......
......@@ -1301,11 +1301,11 @@ schedule_ulsch_rnti(module_id_t module_idP,
/*
* ULSCH preprocessor: set UE_template->
* pre_allocated_nb_rb_ul[slice_idx]
* pre_allocated_nb_rb_ul
* pre_assigned_mcs_ul
* pre_allocated_rb_table_index_ul
*/
ulsch_scheduler_pre_processor(module_idP, CC_id, frameP, subframeP, sched_frame, sched_subframeP);
mac->pre_processor_ul.ul(module_idP, CC_id, frameP, subframeP, sched_frame, sched_subframeP);
for (int UE_id = UE_info->list.head; UE_id >= 0; UE_id = UE_info->list.next[UE_id]) {
if (UE_info->UE_template[CC_id][UE_id].rach_resource_type > 0)
......
......@@ -540,7 +540,6 @@ typedef enum {
SCHED_MODE_FAIR_RR /// fair raund robin
} SCHEDULER_MODES;
/*! \brief temporary struct for ULSCH sched */
typedef struct {
rnti_t rnti;
......@@ -1199,6 +1198,56 @@ typedef struct {
void *data;
} default_sched_ul_algo_t;
typedef void (*pp_impl_dl)(module_id_t mod_id,
int CC_id,
frame_t frame,
sub_frame_t subframe);
typedef void (*pp_impl_ul)(module_id_t mod_id,
int CC_id,
frame_t frame,
sub_frame_t subframe,
frame_t sched_frame,
sub_frame_t sched_subframe);
struct slice_info_s;
typedef struct {
int algorithm;
/// inform the slice algorithm about a new UE
void (*add_UE)(struct slice_info_s *s, int UE_id);
/// inform the slice algorithm about a UE that disconnected
void (*remove_UE)(struct slice_info_s *s, int UE_id);
/// move a UE to a slice in DL/UL, -1 means don't move (no-op).
void (*move_UE)(struct slice_info_s *s, int UE_id, int idx);
/// Adds a new slice through admission control. slice_params are
/// algorithm-specific parameters. sched is either a default_sched_ul_algo_t
/// or default_sched_dl_algo_t, depending on whether this implementation
/// handles UL/DL. If slice at index exists, updates existing
/// slice. Returns index of new slice or -1 on failure.
int (*addmod_slice)(struct slice_info_s *s,
int id,
char *label,
void *sched,
void *slice_params);
/// Returns slice through slice_idx. 1 if successful, 0 if not.
int (*remove_slice)(struct slice_info_s *s, uint8_t slice_idx);
union {
pp_impl_dl dl;
pp_impl_ul ul;
};
union {
default_sched_ul_algo_t ul_algo;
default_sched_dl_algo_t dl_algo;
};
void (*destroy)(struct slice_info_s **s);
struct slice_info_s *slices;
} pp_impl_param_t;
/*! \brief eNB common channels */
typedef struct {
int physCellId;
......@@ -1354,9 +1403,11 @@ typedef struct eNB_MAC_INST_s {
UE_free_list_t UE_free_list;
/// for scheduling selection
SCHEDULER_MODES scheduler_mode;
/// scheduling algorithm used in default scheduler
default_sched_dl_algo_t dl_algo;
default_sched_ul_algo_t ul_algo;
/// Default scheduler: Pre-processor implementation. Algorithms for UL/DL
/// are called by ULSCH/DLSCH, respectively. Pro-processor implementation can
/// encapsulate slicing.
pp_impl_param_t pre_processor_dl;
pp_impl_param_t pre_processor_ul;
int32_t puSch10xSnr;
int32_t puCch10xSnr;
......
......@@ -674,10 +674,10 @@ void set_ul_DAI(int module_idP,
void ulsch_scheduler_pre_processor(module_id_t module_idP,
int CC_id,
int frameP,
frame_t frameP,
sub_frame_t subframeP,
int sched_frameP,
unsigned char sched_subframeP);
frame_t sched_frameP,
sub_frame_t sched_subframeP);
int phy_stats_exist(module_id_t Mod_id, int rnti);
......
......@@ -99,16 +99,21 @@ void mac_top_init_eNB(void)
}
mac[i]->if_inst = IF_Module_init(i);
mac[i]->pre_processor_dl.dl = dlsch_scheduler_pre_processor;
char *s = "round_robin_dl";
void *d = dlsym(NULL, s);
AssertFatal(d, "%s(): no scheduler algo '%s' found\n", __func__, s);
mac[i]->dl_algo = *(default_sched_dl_algo_t *) d;
mac[i]->dl_algo.data = mac[i]->dl_algo.setup();
mac[i]->pre_processor_dl.dl_algo = *(default_sched_dl_algo_t *) d;
mac[i]->pre_processor_dl.dl_algo.data = mac[i]->pre_processor_dl.dl_algo.setup();
mac[i]->pre_processor_ul.ul = ulsch_scheduler_pre_processor;
s = "round_robin_ul";
d = dlsym(NULL, s);
AssertFatal(d, "%s(): no scheduler algo '%s' found\n", __func__, s);
mac[i]->ul_algo = *(default_sched_ul_algo_t *) d;
mac[i]->ul_algo.data = mac[i]->ul_algo.setup();
mac[i]->pre_processor_ul.ul_algo = *(default_sched_ul_algo_t *) d;
mac[i]->pre_processor_ul.ul_algo.data = mac[i]->pre_processor_ul.ul_algo.setup();
init_UE_info(&mac[i]->UE_info);
}
......
......@@ -691,15 +691,15 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
n_rbg_sched += rbgalloc_mask[i];
}
mac->dl_algo.run(Mod_id,
CC_id,
frameP,
subframeP,
&UE_to_sched,
4, // max_num_ue
n_rbg_sched,
rbgalloc_mask,
mac->dl_algo.data);
mac->pre_processor_dl.dl_algo.run(Mod_id,
CC_id,
frameP,
subframeP,
&UE_to_sched,
4, // max_num_ue
n_rbg_sched,
rbgalloc_mask,
mac->pre_processor_dl.dl_algo.data);
// the following block is meant for validation of the pre-processor to check
// whether all UE allocations are non-overlapping and is not necessary for
......@@ -1068,10 +1068,10 @@ default_sched_ul_algo_t round_robin_ul = {
void ulsch_scheduler_pre_processor(module_id_t Mod_id,
int CC_id,
int frameP,
frame_t frameP,
sub_frame_t subframeP,
int sched_frameP,
unsigned char sched_subframeP) {
frame_t sched_frameP,
sub_frame_t sched_subframeP) {
eNB_MAC_INST *mac = RC.mac[Mod_id];
UE_info_t *UE_info = &mac->UE_info;
const int N_RB_UL = to_prb(mac->common_channels[CC_id].ul_Bandwidth);
......@@ -1128,17 +1128,17 @@ void ulsch_scheduler_pre_processor(module_id_t Mod_id,
}
}
mac->ul_algo.run(Mod_id,
CC_id,
frameP,
subframeP,
sched_frameP,
sched_subframeP,
&UE_to_sched,
4, // max_num_ue
n_contig,
rbs,
mac->ul_algo.data);
mac->pre_processor_ul.ul_algo.run(Mod_id,
CC_id,
frameP,
subframeP,
sched_frameP,
sched_subframeP,
&UE_to_sched,
4, // max_num_ue
n_contig,
rbs,
mac->pre_processor_ul.ul_algo.data);
// the following block is meant for validation of the pre-processor to check
// whether all UE allocations are non-overlapping and is not necessary for
......
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