Commit 361446fd authored by cig's avatar cig

Consolidation of TA updates changes in the noS1 mode:

- merged nr-schedule_ue_spec into nr_schedule_uss_dlsch_phytest
- enabled nr_ue_send_sdu for S1 mode
- increased ta_timer to 100
- restored NR_UPLINK_SLOT to 2 (as it was in develop-nr)
- fixed logic for S1 and noS1 modes
- code cleanup and formatting
parent 98d2caf5
......@@ -120,7 +120,7 @@ SystemInformationBlockType1_nr_t;
#define NR_TDD_SET_ALL_SYMBOLS (0x3FFF)
#define NR_DOWNLINK_SLOT (0x01)
#define NR_UPLINK_SLOT (0x05)
#define NR_UPLINK_SLOT (0x02)
#define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */
......
......@@ -2296,8 +2296,7 @@ void nr_ue_process_mac_pdu(
#endif
*/
LOG_D(MAC, "Received TA_COMMAND %u TAGID %u CC_id %d\n",
ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id);
LOG_D(MAC, "Received TA_COMMAND %u TAGID %u CC_id %d\n", ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id);
break;
case DL_SCH_LCID_CON_RES_ID:
......
......@@ -299,7 +299,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
protocol_ctxt_t ctxt;
int CC_id, i = -1, UE_id = 0, ta_update;
int CC_id, i = -1, UE_id = 0;
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
UE_list_t *UE_list = &gNB->UE_list;
rnti_t rnti;
......@@ -377,9 +377,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (ue_sched_ctl->ta_timer == 0) {
gNB->ta_command = ue_sched_ctl->ta_update;
/* if time is up, then set the timer to not send it for 4 frames
/* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */
ue_sched_ctl->ta_timer = 80;
ue_sched_ctl->ta_timer = 100;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
/* MAC CE flag indicating TA length */
......@@ -391,8 +391,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
}
if (slot_txP == NR_DOWNLINK_SLOT){
nr_schedule_ue_spec(module_idP, frame_txP, slot_txP);
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
// resetting ta flag
gNB->ta_len = 0;
}
/*
......
......@@ -103,9 +103,6 @@ int nr_generate_dlsch_pdu(module_id_t module_idP,
memcpy((void *) mac_pdu_ptr, (void *) ce_ptr, mac_ce_size);
ce_ptr += mac_ce_size;
mac_pdu_ptr += (unsigned char) mac_ce_size;
// resetting ta flag
gNB->ta_len = 0;
}
......@@ -179,147 +176,6 @@ int nr_generate_dlsch_pdu(module_id_t module_idP,
return offset;
}
/*TODO expand the scheduling functionalities
this function is just generating a dummy MAC PDU and is used to transmit the TA
The structure of the algorithm is taken from the schedule_ue_spec function in LTE
and is preserved for future reference.*/
void
nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
UE_list_t *UE_list = &gNB->UE_list;
nfapi_nr_dl_config_request_body_t *dl_req;
// TODO size corretly the arrays
// at present, preserved the array length from lte code
// however not sure why NR_MAX_NB_RB was used here
unsigned char sdu_lcids[NR_MAX_NB_RB] = {0};
uint16_t sdu_lengths[NR_MAX_NB_RB] = {0};
int padding = 0, post_padding = 0, ta_len = 0, header_length_total = 0, sdu_length_total = 0, num_sdus = 0;
int CC_id, sub_pdu_id, lcid, offset, i, j=0, k=0, ta_command;
// hardcoded parameters
// for DMRS configuration type 1
// sdus should come from RLC
static unsigned char dlsch_buffer[MAX_NR_DLSCH_PAYLOAD_BYTES];
uint8_t Qm = 2;
uint16_t R = 697;
uint16_t nb_rb = 50 ;
uint32_t TBS = nr_compute_tbs(Qm, R, nb_rb, 12, 6, 0, 1)/8; // this is in bits TODO use nr_get_tbs
int UE_id = 0; // UE_list->head is -1 !
UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
//ta_update = ue_sched_ctl->ta_update;
for (CC_id = 0; CC_id < RC.nb_nr_mac_CC[module_idP]; CC_id++) {
LOG_D(MAC, "doing nr_schedule_ue_spec for UE_id %d CC_id %d frame %d slot %d\n", UE_id, CC_id, frameP, slotP);
dl_req = &gNB->DL_req[CC_id].dl_config_request_body;
//for (UE_id = UE_list->head; UE_id >= -1; UE_id = UE_list->next[UE_id]) {
/*
//process retransmission
if (round != 8) {
} else { // This is a potentially new SDU opportunity */
//ta_len = (ta_update != 31) ? 2 : 0;
// fill dlsch_buffer with random data
for (i = 0; i < MAX_NR_DLSCH_PAYLOAD_BYTES; i++){
dlsch_buffer[i] = (unsigned char) rand();
}
/*
//Sending SDUs with size 1
//Initialize elements of sdu_lcids and sdu_lengths
//TODO this will be eventually be removed
for (j = 0; j < NB_RB_MAX; j++){
sdu_lcids[j] = 0x05; // DRB
}
for (k = 0; k < NB_RB_MAX; k++){
sdu_lengths[k] = 1;
header_length_total += 2;
sdu_length_total += 1;
}*/
//Sending SDUs with size 1
//Initialize elements of sdu_lcids and sdu_lengths
//TODO this will be eventually be removed
while (TBS >= 3 + header_length_total + sdu_length_total + ta_len){
if (k < NR_MAX_NB_RB && j < NR_MAX_NB_RB){
sdu_lcids[j] = 0x05; // DRB
sdu_lengths[k] = 1;
header_length_total += 2;
sdu_length_total += 1;
num_sdus +=1;
k++, j++;
}
else {
break;
}
}
/*
// RLC data on DCCH
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
}
// RLC data on DCCH1
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
}
// looping over lcid
for (lcid = NB_RB_MAX - 1; lcid >= DTCH; lcid--) {
// here sdu_lcids[num_sdus] is populated
}*/
// there is at least one SDU or TA command
// if (num_sdus > 0 ){
if (ta_len + sdu_length_total + header_length_total > 0) {
// Check if there is data from RLC or CE
if (TBS >= 2 + header_length_total + sdu_length_total + ta_len) {
// we have to consider padding
// padding param currently not in use
padding = TBS - header_length_total - sdu_length_total - ta_len - 1;
post_padding = 1;
} else {
post_padding = 0;
}
offset = nr_generate_dlsch_pdu(module_idP,
(unsigned char *) dlsch_buffer,
(unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
num_sdus, //num_sdus
sdu_lengths,
sdu_lcids,
255, // no drx
NULL, // contention res id
post_padding);
// Padding: fill remainder of DLSCH with 0
if (post_padding > 0){
for (int j = 0; j < (TBS - offset); j++)
UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset + j] = 0;
}
// Printing bit by bit for debugging purpose
/*for (int k = 0; k < TBS; k++){
printf("MAC PDU %u\n",((( UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][k/8]) & (1 << (k & 7))) >> (k & 7)));
if ((k+1)%8 == 0)
printf("\n");
}*/
}
else { // There is no data from RLC or MAC header, so don't schedule
}
//}
//} // UE_id loop
} // CC_id loop
/* functionalities of this function have been moved to nr_schedule_uss_dlsch_phytest */
void nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
}
......@@ -118,7 +118,7 @@ nr_rx_sdu(const module_id_t gnb_mod_idP,
// uint8_t lcgid = 0;
// int lcgid_updated[4] = {0, 0, 0, 0};
// rrc_eNB_ue_context_t *ue_contextP = NULL;
gNB_MAC_INST *gNB = NULL;
gNB_MAC_INST *gNB_mac = NULL;
UE_list_t *UE_list = NULL;
UE_sched_ctrl_t *UE_scheduling_control = NULL;
// UE_TEMPLATE *UE_template_ptr = NULL;
......@@ -126,8 +126,9 @@ nr_rx_sdu(const module_id_t gnb_mod_idP,
/* Init */
current_rnti = rntiP;
UE_id = find_nrUE_id(gnb_mod_idP, current_rnti);
gNB = RC.nrmac[gnb_mod_idP];
UE_list = &gNB->UE_list;
gNB_mac = RC.nrmac[gnb_mod_idP];
UE_list = &gNB_mac->UE_list;
// harq_pid = subframe2harqpid(&mac->common_channels[CC_idP], frameP, subframeP);
// memset(rx_ces, 0, MAX_NUM_CE * sizeof(unsigned char));
......@@ -176,6 +177,7 @@ nr_rx_sdu(const module_id_t gnb_mod_idP,
* NR: smoothing removed
*/
//UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4;
UE_scheduling_control->ta_update = timing_advance;
// printf("UE_scheduling_control->ta_update %u\n", UE_scheduling_control->ta_update);
// UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi;
......
......@@ -118,7 +118,7 @@ typedef struct gNB_MAC_INST_s {
int ta_command;
/// MAC CE flag indicating TA length
int ta_len;
/// Common cell resources
/// Common cell resources
NR_COMMON_channels_t common_channels[NFAPI_CC_MAX];
/// current PDU index (BCH,DLSCH)
uint16_t pdu_index[NFAPI_CC_MAX];
......
......@@ -74,7 +74,8 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr
// L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len, frame_t frame, int slot, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
if (IS_SOFTMODEM_NOS1 || IS_SOFTMODEM_RFSIM)
//if (IS_SOFTMODEM_NOS1 || IS_SOFTMODEM_RFSIM)
// sdu should be processed even when is S1 mode because data and timing advance updates are transmitted by the UE
nr_ue_send_sdu(module_id, cc_id, frame, slot,
pduP,
pdu_len,
......
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