Commit 4901daf7 authored by Robert Schmidt's avatar Robert Schmidt

FlexRAN: New protobuf slice structure + Static Slice handling

parent 872cfc03
dev 1 128-ues 256_QAM_demod Fix_SA_SIB1 NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_NGAP NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguration_FR2 NR_RRC_config_simplified NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_UE_CONFIG_REQ_FIXES NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_SA NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_Wireshark NR_beam_simulation NR_mac_uci_functions_rework NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 PBCHNRTCFIX PUSCH_TA_update RA_CI_test RFquality Saankhya_NRPRACH_HighSpeed UE_DL_DCI_hotfix add-dmrs-test bch-fixes-bitmap benetel_5g_prach_fix benetel_config_file_fix benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes benetel_phase_rotation benetel_phase_rotation_old bsr-fix bugfix-free-ra-process bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-new-docker-pipeline ci-reduce-nb-vms ci-test ci-ul-iperf-from-trf-container ci_benetel_test ci_phytest ci_quectel_support ci_test_ra_fr2 ci_vm_resource_fix cleanup_softmodem_main constant_power develop develop-CBRA-v3 develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-v3 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop_stable dfts_alternatives disable_CSI_measrep dlsch_encode_mthread dlsch_parallel docker-improvements-2021-april docker-no-cache-option dongzhanyi-zte-develop2 enhance-rfsim episys-merge episys/nsa_development feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fembms-enb-ue fft_bench_hotfix finalize-oaicn-integration firas fix-ci-tun fix-itti-segv fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-quectel fix-realtime fix-softmodem-restart fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_pdsch_low_prb fix_rb_corruption fix_reestablishment fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun fixgtpu flexran-apps flexran-repair-mme-mgmt fujitsu_lte_contribution fujitsu_lte_contribution-128 git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-exit-gnb-when-no-enb-nsa harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable improve_nr_modulation integ-w13-test-rt-issue integration_2020_wk15 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_w5GC_CBRA_test inter-RRU-final itti-enhancement ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 migrate-cpp-check-container minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-bsr-fix nr-dl-mimo-2layer nr-dmrs-fixes nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-srb-integrity nr-ra-fix nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-stats-print nrPBCHTCFix nrPbchTcFix nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fdd_if_fix nr_power_measurement_fixes nr_prach_fr2 nr_ue_msg3 nr_ue_pdcp_fix nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop physim-build-deploy prb_based_dl_channel_estimation ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul recursive-cmake remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_oc rh_ci_phy_test_improve rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_ue_parallel rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rohan_ulsim2RxFix rrc-enb-phy-testmode s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-demo-hs sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai sim-channels small-bugfixes-w40 small-config-change small_nr_bugfixes smallcleanup t-gnb-tracer test-panos test_nsa_gtpu_fix test_rt-fix_phy-test testing_with_external_txdata ue-dci-false-detection ue-fixes ue-pdsch-pusch-parallel ue-race-fix ue_beam_selection ul-freq-iq-samps-to-file ul_dl_dci_same_slot ulsch_decode_mthread ulsim_changes usrp_x400 wf-sa-rrc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest x2-endc-processing xiangwab xiangwan xw2 yihongzheng_srb zzs 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 benetel_phase_rotation benetel_gnb_rel_1.0 benetel_enb_rel_1.0
No related merge requests found
......@@ -1452,9 +1452,74 @@ void flexran_agent_fill_mac_cell_config(mid_t mod_id, uint8_t cc_id,
conf->si_config->has_sfn = 1;
}
/* get a pointer to the config which is maintained in the agent throughout
* its lifetime */
conf->slice_config = flexran_agent_get_slice_config(mod_id);
conf->slice_config = malloc(sizeof(Protocol__FlexSliceConfig));
if (conf->slice_config) {
protocol__flex_slice_config__init(conf->slice_config);
Protocol__FlexSliceConfig *sc = conf->slice_config;
sc->dl = malloc(sizeof(Protocol__FlexSliceDlUlConfig));
DevAssert(sc->dl);
protocol__flex_slice_dl_ul_config__init(sc->dl);
sc->dl->algorithm = flexran_get_dl_slice_algo(mod_id);
sc->dl->has_algorithm = 1;
sc->dl->n_slices = flexran_get_num_dl_slices(mod_id);
if (sc->dl->n_slices > 0) {
sc->dl->slices = calloc(sc->dl->n_slices, sizeof(Protocol__FlexSlice *));
DevAssert(sc->dl->slices);
for (int i = 0; i < sc->dl->n_slices; ++i) {
sc->dl->slices[i] = malloc(sizeof(Protocol__FlexSlice));
DevAssert(sc->dl->slices[i]);
protocol__flex_slice__init(sc->dl->slices[i]);
flexran_get_dl_slice(mod_id, i, sc->dl->slices[i], sc->dl->algorithm);
}
} else {
sc->dl->scheduler = flexran_get_dl_scheduler_name(mod_id);
}
sc->ul = malloc(sizeof(Protocol__FlexSliceDlUlConfig));
DevAssert(sc->ul);
protocol__flex_slice_dl_ul_config__init(sc->ul);
sc->ul->algorithm = flexran_get_ul_slice_algo(mod_id);
sc->ul->has_algorithm = 1;
sc->ul->n_slices = flexran_get_num_ul_slices(mod_id);
if (sc->ul->n_slices > 0) {
sc->ul->slices = calloc(sc->ul->n_slices, sizeof(Protocol__FlexSlice *));
DevAssert(sc->ul->slices);
for (int i = 0; i < sc->ul->n_slices; ++i) {
sc->ul->slices[i] = malloc(sizeof(Protocol__FlexSlice));
DevAssert(sc->ul->slices[i]);
protocol__flex_slice__init(sc->ul->slices[i]);
flexran_get_ul_slice(mod_id, i, sc->ul->slices[i], sc->ul->algorithm);
}
} else {
sc->ul->scheduler = flexran_get_ul_scheduler_name(mod_id);
}
}
}
void flexran_agent_destroy_mac_slice_config(Protocol__FlexCellConfig *conf) {
Protocol__FlexSliceConfig *sc = conf->slice_config;
for (int i = 0; i < sc->dl->n_slices; ++i) {
free(sc->dl->slices[i]);
sc->dl->slices[i] = NULL;
/* scheduler names are not freed: we assume we read them directly from the
* underlying memory and do not dispose it */
}
free(sc->dl->slices);
/* scheduler name is not freed */
free(sc->dl);
sc->dl = NULL;
for (int i = 0; i < sc->ul->n_slices; ++i) {
free(sc->ul->slices[i]);
sc->ul->slices[i] = NULL;
/* scheduler names are not freed */
}
free(sc->ul->slices);
/* scheduler name is not freed */
free(sc->ul);
sc->ul = NULL;
free(conf->slice_config);
conf->slice_config = NULL;
}
void flexran_agent_fill_mac_ue_config(mid_t mod_id, mid_t ue_id,
......@@ -1568,46 +1633,46 @@ int flexran_agent_unregister_mac_xface(mid_t mod_id)
return 0;
}
void flexran_create_config_structures(mid_t mod_id)
{
int i;
int n_dl = flexran_get_num_dl_slices(mod_id);
int m_ul = flexran_get_num_ul_slices(mod_id);
slice_config[mod_id] = flexran_agent_create_slice_config(n_dl, m_ul);
sc_update[mod_id] = flexran_agent_create_slice_config(n_dl, m_ul);
if (!slice_config[mod_id] || !sc_update[mod_id]) return;
//flexran_agent_read_slice_config(mod_id, slice_config[mod_id]);
//flexran_agent_read_slice_config(mod_id, sc_update[mod_id]);
for (i = 0; i < n_dl; i++) {
//flexran_agent_read_slice_dl_config(mod_id, i, slice_config[mod_id]->dl[i]);
//flexran_agent_read_slice_dl_config(mod_id, i, sc_update[mod_id]->dl[i]);
void helper_destroy_mac_slice_config(Protocol__FlexSliceConfig *slice_config) {
if (slice_config->dl) {
if (slice_config->dl->scheduler)
free(slice_config->dl->scheduler);
for (int i = 0; i < slice_config->dl->n_slices; i++)
if (slice_config->dl->slices[i]->scheduler)
free(slice_config->dl->slices[i]->scheduler);
}
for (i = 0; i < m_ul; i++) {
//flexran_agent_read_slice_ul_config(mod_id, i, slice_config[mod_id]->ul[i]);
//flexran_agent_read_slice_ul_config(mod_id, i, sc_update[mod_id]->ul[i]);
if (slice_config->ul) {
if (slice_config->ul->scheduler)
free(slice_config->ul->scheduler);
for (int i = 0; i < slice_config->ul->n_slices; i++)
if (slice_config->ul->slices[i]->scheduler)
free(slice_config->ul->slices[i]->scheduler);
}
}
void flexran_check_and_remove_slices(mid_t mod_id)
{
Protocol__FlexCellConfig helper;
helper.slice_config = slice_config;
flexran_agent_destroy_mac_slice_config(&helper);
}
void flexran_agent_slice_update(mid_t mod_id)
{
void prepare_update_slice_config(mid_t mod_id, Protocol__FlexSliceConfig **slice_config) {
if (!*slice_config) return;
Protocol__FlexSliceConfig *sc = *slice_config;
*slice_config = NULL;
/* TODO handle using lock-free queue */
apply_update_dl_slice_config(mod_id, sc->dl);
apply_update_ul_slice_config(mod_id, sc->ul);
helper_destroy_mac_slice_config(*slice_config);
}
Protocol__FlexSliceConfig *flexran_agent_get_slice_config(mid_t mod_id)
{
if (!slice_config[mod_id]) return NULL;
Protocol__FlexSliceConfig *config = NULL;
void prepare_ue_slice_assoc_update(mid_t mod_id, Protocol__FlexUeConfig **ue_config) {
/* TODO handle using lock-free queue */
apply_ue_slice_assoc_update(mod_id, *ue_config);
pthread_mutex_lock(&sc_update_mtx);
if (!config) {
pthread_mutex_unlock(&sc_update_mtx);
return NULL;
}
pthread_mutex_unlock(&sc_update_mtx);
return config;
free(*ue_config);
*ue_config = NULL;
}
void flexran_agent_slice_update(mid_t mod_id) {
}
......@@ -115,7 +115,16 @@ int flexran_agent_unregister_mac_xface(mid_t mod_id);
/* Inform controller about possibility to update slice configuration */
void flexran_agent_slice_update(mid_t mod_id);
/* return a pointer to the current config */
Protocol__FlexSliceConfig *flexran_agent_get_slice_config(mid_t mod_id);
/* marks slice_config so that it can be applied later. Takes ownership of the
* FlexSliceConfig message */
void prepare_update_slice_config(mid_t mod_id, Protocol__FlexSliceConfig **slice);
/* inserts a new ue_config into the structure keeping ue to slice association
* updates and marks so it can be applied. Takes ownership of the FlexUeConfig message */
void prepare_ue_slice_assoc_update(mid_t mod_id, Protocol__FlexUeConfig **ue_config);
/* free slice_config part of flexCellConfig, filled in
* flexran_agent_fill_mac_cell_config() */
void flexran_agent_destroy_mac_slice_config(Protocol__FlexCellConfig *conf);
#endif
......@@ -1025,60 +1025,166 @@ int load_dl_scheduler_function(mid_t mod_id, const char *function_name) {
}
Protocol__FlexSliceConfig *flexran_agent_create_slice_config(int n_dl, int m_ul)
{
Protocol__FlexSliceConfig *fsc = malloc(sizeof(Protocol__FlexSliceConfig));
if (!fsc) return NULL;
protocol__flex_slice_config__init(fsc);
/* TODO */
return fsc;
void update_or_remove_dl(mid_t mod_id, Protocol__FlexSlice *s) {
if (s->params_case == PROTOCOL__FLEX_SLICE__PARAMS__NOT_SET
&& !s->label && !s->scheduler) {
LOG_I(FLEXRAN_AGENT, "remove DL slice ID %d\n", s->id);
const int rc = flexran_remove_dl_slice(mod_id, s);
if (!rc)
LOG_W(FLEXRAN_AGENT, "error while removing slice ID %d\n", s->id);
} else {
LOG_I(FLEXRAN_AGENT, "updating DL slice ID %d\n", s->id);
const int rc = flexran_create_dl_slice(mod_id, s);
if (rc < 0)
LOG_W(FLEXRAN_AGENT,
"error while update slice ID %d: flexran_create_dl_slice() -> %d\n",
s->id, rc);
}
}
void prepare_update_slice_config(mid_t mod_id, Protocol__FlexSliceConfig *sup)
{
void update_or_remove_ul(mid_t mod_id, Protocol__FlexSlice *s) {
if (s->params_case == PROTOCOL__FLEX_SLICE__PARAMS__NOT_SET
&& !s->label && !s->scheduler) {
LOG_I(FLEXRAN_AGENT, "remove UL slice ID %d\n", s->id);
const int rc = flexran_remove_ul_slice(mod_id, s);
if (!rc)
LOG_W(FLEXRAN_AGENT, "error while removing slice ID %d\n", s->id);
} else {
LOG_I(FLEXRAN_AGENT, "updating UL slice ID %d\n", s->id);
const int rc = flexran_create_ul_slice(mod_id, s);
if (rc < 0)
LOG_W(FLEXRAN_AGENT,
"error while updating slice ID %d: flexran_create_ul_slice() -> %d)\n",
s->id, rc);
}
}
void apply_update_dl_slice_config(mid_t mod_id, Protocol__FlexSliceDlUlConfig *dl) {
if (!dl)
return;
void prepare_ue_slice_assoc_update(mid_t mod_id, Protocol__FlexUeConfig *ue_config)
{
if (n_ue_slice_assoc_updates == 10) {
LOG_E(FLEXRAN_AGENT,
"[%d] can not handle flex_ue_config message, buffer is full; try again later\n",
mod_id);
Protocol__FlexSliceAlgorithm dl_algo = flexran_get_dl_slice_algo(mod_id);
if (dl->has_algorithm && dl_algo != dl->algorithm) {
LOG_I(FLEXRAN_AGENT, "loading new DL slice algorithm %d\n", dl->algorithm);
dl_algo = dl->algorithm;
flexran_set_dl_slice_algo(mod_id, dl_algo);
}
/* first update existing slices, then create new. Thus, we go through the
* list twice. First round, if a slice exists, handle and mark as such. Then,
* apply all others in the second round */
if (dl->n_slices > 0) {
if (dl_algo == PROTOCOL__FLEX_SLICE_ALGORITHM__None) {
LOG_E(FLEXRAN_AGENT, "cannot update slices: no algorithm loaded\n");
return;
}
int handled_dl[dl->n_slices];
for (int i = 0; i < dl->n_slices; ++i) {
if (flexran_find_dl_slice(mod_id, dl->slices[i]->id) < 0) {
handled_dl[i] = 0;
continue;
}
update_or_remove_dl(mod_id, dl->slices[i]);
handled_dl[i] = 1;
}
for (int i = 0; i < dl->n_slices; ++i) {
if (handled_dl[i])
continue;
update_or_remove_dl(mod_id, dl->slices[i]);
}
}
if (dl->scheduler) {
if (dl_algo != PROTOCOL__FLEX_SLICE_ALGORITHM__None) {
LOG_E(FLEXRAN_AGENT, "cannot update scheduling algorithm: slice algorithm loaded\n");
return;
}
LOG_I(FLEXRAN_AGENT, "loading DL new scheduling algorithm '%s'\n", dl->scheduler);
const int rc = flexran_set_dl_scheduler(mod_id, dl->scheduler);
if (rc < 0) {
LOG_E(FLEXRAN_AGENT,
"error while updating scheduling algorithm: "
"flexran_update_dl_sched_algo() -> %d)\n",
rc);
return;
}
}
}
void apply_update_ul_slice_config(mid_t mod_id, Protocol__FlexSliceDlUlConfig *ul) {
if (!ul)
return;
Protocol__FlexSliceAlgorithm ul_algo = flexran_get_ul_slice_algo(mod_id);
if (ul->has_algorithm && ul_algo != ul->algorithm) {
LOG_I(FLEXRAN_AGENT, "loading new UL slice algorithm %d\n", ul->algorithm);
ul_algo = ul->algorithm;
flexran_set_ul_slice_algo(mod_id, ul_algo);
}
if (ul->n_slices > 0) {
if (ul_algo == PROTOCOL__FLEX_SLICE_ALGORITHM__None) {
LOG_E(FLEXRAN_AGENT, "cannot update slices: no algorithm loaded\n");
return;
}
int handled_ul[ul->n_slices];
for (int i = 0; i < ul->n_slices; ++i) {
if (flexran_find_ul_slice(mod_id, ul->slices[i]->id) < 0) {
handled_ul[i] = 0;
continue;
}
update_or_remove_ul(mod_id, ul->slices[i]);
handled_ul[i] = 1;
}
for (int i = 0; i < ul->n_slices; ++i) {
if (handled_ul[i])
continue;
update_or_remove_ul(mod_id, ul->slices[i]);
}
}
if (ul->scheduler) {
if (ul_algo != PROTOCOL__FLEX_SLICE_ALGORITHM__None) {
LOG_E(FLEXRAN_AGENT, "cannot update scheduling algorithm: slice algorithm loaded\n");
return;
}
LOG_I(FLEXRAN_AGENT, "loading new UL scheduling algorithm '%s'\n", ul->scheduler);
const int rc = flexran_set_ul_scheduler(mod_id, ul->scheduler);
if (rc < 0) {
LOG_E(FLEXRAN_AGENT,
"error while updating scheduling algorithm: "
"flexran_update_dl_sched_algo() -> %d)\n",
rc);
return;
}
}
}
int apply_ue_slice_assoc_update(mid_t mod_id, Protocol__FlexUeConfig *ue_config)
{
if (!ue_config->has_rnti) {
LOG_E(FLEXRAN_AGENT,
"[%d] cannot update UE to slice association, no RNTI in flex_ue_config message\n",
mod_id);
return;
return 0;
}
if (ue_config->has_dl_slice_id)
LOG_I(FLEXRAN_AGENT, "[%d] associating UE RNTI %#x to DL slice ID %d\n",
mod_id, ue_config->rnti, ue_config->dl_slice_id);
if (ue_config->has_ul_slice_id)
LOG_I(FLEXRAN_AGENT, "[%d] associating UE RNTI %#x to UL slice ID %d\n",
mod_id, ue_config->rnti, ue_config->ul_slice_id);
ue_slice_assoc_update[n_ue_slice_assoc_updates++] = ue_config;
perform_slice_config_update_count = 2;
}
int apply_ue_slice_assoc_update(mid_t mod_id)
{
int i;
int changes = 0;
for (i = 0; i < n_ue_slice_assoc_updates; i++) {
int ue_id = find_UE_id(mod_id, ue_slice_assoc_update[i]->rnti);
if (ue_id < 0 || ue_id > MAX_MOBILES_PER_ENB){
LOG_E(FLEXRAN_AGENT,"UE_id %d is wrong!!\n",ue_id);
continue;
}
if (ue_slice_assoc_update[i]->has_dl_slice_id) {
int UE_id = flexran_get_mac_ue_id_rnti(mod_id, ue_config->rnti);
if (ue_config->has_dl_slice_id) {
if (flexran_get_dl_slice_algo(mod_id) == PROTOCOL__FLEX_SLICE_ALGORITHM__None) {
LOG_E(FLEXRAN_AGENT, "no DL slice algorithm loaded\n");
} else {
LOG_I(FLEXRAN_AGENT, "[%d] associating UE RNTI %04x - %d/UE %d to DL slice ID %d\n",
mod_id, ue_config->rnti, ue_config->rnti, UE_id, ue_config->dl_slice_id);
flexran_set_ue_dl_slice_id(mod_id, UE_id, ue_config->dl_slice_id);
}
if (ue_slice_assoc_update[i]->has_ul_slice_id) {
}
if (ue_config->has_ul_slice_id) {
if (flexran_get_ul_slice_algo(mod_id) == PROTOCOL__FLEX_SLICE_ALGORITHM__None) {
LOG_E(FLEXRAN_AGENT, "no UL slice algorithm loaded\n");
} else {
LOG_I(FLEXRAN_AGENT, "[%d] associating UE RNTI %04x - %d/UE %d to UL slice ID %d\n",
mod_id, ue_config->rnti, ue_config->rnti, UE_id, ue_config->ul_slice_id);
flexran_set_ue_ul_slice_id(mod_id, UE_id, ue_config->ul_slice_id);
}
}
n_ue_slice_assoc_updates = 0;
return changes;
return 0;
}
......@@ -103,23 +103,11 @@ int load_dl_scheduler_function(mid_t mod_id, const char *function_name);
/*** Functions for handling a slice config ***/
/* allocate memory for a Protocol__FlexSliceConfig structure with n_dl DL slice
* configs and m_ul UL slice configs */
Protocol__FlexSliceConfig *flexran_agent_create_slice_config(int n_dl, int m_ul);
/* read the general slice parameters via RAN into the given
* Protocol__FlexSliceConfig struct */
void flexran_agent_read_slice_config(mid_t mod_id, Protocol__FlexSliceConfig *s);
/* reads content of slice over the sc_update structure, so that it can be
* applied later by performing a diff between slice_config and sc_update */
void prepare_update_slice_config(mid_t mod_id, Protocol__FlexSliceConfig *slice);
/* inserts a new ue_config into the structure keeping ue to slice association
* updates and marks so it can be applied */
void prepare_ue_slice_assoc_update(mid_t mod_id, Protocol__FlexUeConfig *ue_config);
/* Prepare the application of a slicing config */
void apply_update_dl_slice_config(mid_t mod_id, Protocol__FlexSliceDlUlConfig *slice);
void apply_update_ul_slice_config(mid_t mod_id, Protocol__FlexSliceDlUlConfig *slice);
/* apply a new association between a UE and a slice (both DL and UL) */
int apply_ue_slice_assoc_update(mid_t mod_id);
int apply_ue_slice_assoc_update(mid_t mod_id, Protocol__FlexUeConfig *ue_config);
#endif /*FLEXRAN_AGENT_MAC_INTERNAL_H_*/
......@@ -61,6 +61,31 @@ enum flex_qam {
//
// Slice config related structures and enums
//
enum flex_slice_algorithm {
None = 0;
Static = 1;
NVS = 2;
}
message flex_slice_static {
optional uint32 posLow = 1;
optional uint32 posHigh = 2;
}
message flex_slice {
optional uint32 id = 1;
optional string label = 2;
optional string scheduler = 3;
oneof params {
flex_slice_static static = 10;
}
}
message flex_slice_dl_ul_config {
optional flex_slice_algorithm algorithm = 1;
repeated flex_slice slices = 2;
optional string scheduler = 3; // if no slicing
}
//
// UE config related structures and enums
......
......@@ -49,6 +49,8 @@ message flex_cell_config {
}
message flex_slice_config {
optional flex_slice_dl_ul_config dl = 6;
optional flex_slice_dl_ul_config ul = 7;
}
message flex_ue_config {
......
......@@ -306,6 +306,7 @@ int flexran_agent_destroy_enb_config_reply(Protocol__FlexranMessage *msg) {
if (reply->cell_config[i]->mbsfn_subframe_config_sfalloc)
free(reply->cell_config[i]->mbsfn_subframe_config_sfalloc);
/* si_config is shared between MAC and RRC, free here */
if (reply->cell_config[i]->si_config) {
for(int j = 0; j < reply->cell_config[i]->si_config->n_si_message; j++) {
free(reply->cell_config[i]->si_config->si_message[j]);
......@@ -316,8 +317,7 @@ int flexran_agent_destroy_enb_config_reply(Protocol__FlexranMessage *msg) {
}
if (reply->cell_config[i]->slice_config) {
/* TODO */
free(reply->cell_config[i]->slice_config);
flexran_agent_destroy_mac_slice_config(reply->cell_config[i]);
}
free(reply->cell_config[i]);
......@@ -880,7 +880,7 @@ int flexran_agent_handle_enb_config_reply(mid_t mod_id, const void *params, Prot
if (enb_config->n_cell_config > 0) {
if (flexran_agent_get_mac_xface(mod_id) && enb_config->cell_config[0]->slice_config) {
prepare_update_slice_config(mod_id, enb_config->cell_config[0]->slice_config);
prepare_update_slice_config(mod_id, &enb_config->cell_config[0]->slice_config);
}
if (enb_config->cell_config[0]->has_eutra_band
&& enb_config->cell_config[0]->has_dl_freq
......@@ -921,7 +921,11 @@ int flexran_agent_handle_ue_config_reply(mid_t mod_id, const void *params, Proto
Protocol__FlexUeConfigReply *ue_config_reply = input->ue_config_reply_msg;
for (i = 0; flexran_agent_get_mac_xface(mod_id) && i < ue_config_reply->n_ue_config; i++)
prepare_ue_slice_assoc_update(mod_id, ue_config_reply->ue_config[i]);
prepare_ue_slice_assoc_update(mod_id, &ue_config_reply->ue_config[i]);
/* prepare_ue_slice_assoc_update takes ownership of the individual
* FlexUeConfig messages. Therefore, mark zero messages to not accidentally
* free them twice */
ue_config_reply->n_ue_config = 0;
*msg = NULL;
return 0;
......
This diff is collapsed.
......@@ -656,41 +656,66 @@ int flexran_agent_rrc_gtp_get_teid_sgw(mid_t mod_id, rnti_t rnti, int index);
uint32_t flexran_get_rrc_enb_ue_s1ap_id(mid_t mod_id, rnti_t rnti);
/************************** Slice configuration **************************/
/* Get the currently active DL slicing algorithm */
Protocol__FlexSliceAlgorithm flexran_get_dl_slice_algo(mid_t mod_id);
/* Set the active DL slicing algorithm */
int flexran_set_dl_slice_algo(mid_t mod_id, Protocol__FlexSliceAlgorithm algo);
/* Get the currently active UL slicing algorithm */
Protocol__FlexSliceAlgorithm flexran_get_ul_slice_algo(mid_t mod_id);
/* Set the active UL slicing algorithm */
int flexran_set_ul_slice_algo(mid_t mod_id, Protocol__FlexSliceAlgorithm algo);
/* Get the DL slice ID for a UE */
int flexran_get_ue_dl_slice_id(mid_t mod_id, mid_t ue_id);
/* Set the DL slice index(!) for a UE */
//void flexran_set_ue_dl_slice_idx(mid_t mod_id, mid_t ue_id, int slice_idx);
/* Set the DL slice for a UE */
void flexran_set_ue_dl_slice_id(mid_t mod_id, mid_t ue_id, slice_id_t slice_id);
/* Get the UL slice ID for a UE */
int flexran_get_ue_ul_slice_id(mid_t mod_id, mid_t ue_id);
/* Set the UL slice index(!) for a UE */
//void flexran_set_ue_ul_slice_idx(mid_t mod_id, mid_t ue_id, int slice_idx);
/* Set the UL slice for a UE */
void flexran_set_ue_ul_slice_id(mid_t mod_id, mid_t ue_id, slice_id_t slice_id);
/* Create slice in DL, returns the new slice index */
//int flexran_create_dl_slice(mid_t mod_id, slice_id_t slice_id);
int flexran_create_dl_slice(mid_t mod_id, const Protocol__FlexSlice *s);
/* Remove slice in DL, returns new number of slices or -1 on error */
//int flexran_remove_dl_slice(mid_t mod_id, int slice_idx);
int flexran_remove_dl_slice(mid_t mod_id, const Protocol__FlexSlice *s);
/* Finds slice in DL with given slice_id and returns slice index */
int flexran_find_dl_slice(mid_t mod_id, slice_id_t slice_id);
/* Return the parameters of slice at index slice_idx */
//void flexran_get_dl_slice(mid_t mod_id, int slice_idx, Protocol__FlexSlice *s);
void flexran_get_dl_slice(mid_t mod_id,
int slice_idx,
Protocol__FlexSlice *slice,
Protocol__FlexSliceAlgorithm algo);
/* Get the number of slices in DL */
int flexran_get_num_dl_slices(mid_t mod_id);
/* Create slice in UL, returns the new slice index */
//int flexran_create_ul_slice(mid_t mod_id, slice_id_t slice_id);
int flexran_create_ul_slice(mid_t mod_id, const Protocol__FlexSlice *s);
/* Remove slice in UL */
//int flexran_remove_ul_slice(mid_t mod_id, int slice_idx);
int flexran_remove_ul_slice(mid_t mod_id, const Protocol__FlexSlice *s);
/* Finds slice in DL with given slice_id and returns slice index */
int flexran_find_ul_slice(mid_t mod_id, slice_id_t slice_id);
/* Return the parameters of slice at index slice_idx */
//void flexran_get_ul_slice(mid_t mod_id, int slice_idx, Protocol__FlexSlice *s);
void flexran_get_ul_slice(mid_t mod_id,
int slice_idx,
Protocol__FlexSlice *slice,
Protocol__FlexSliceAlgorithm algo);
/* Get the number of slices in UL */
int flexran_get_num_ul_slices(mid_t mod_id);
/* Get the name of/Set the DL scheduling algorithm. If slicing is active, this
* corresponds to the default algorithm for slices, otherwise the currently
* used one. */
char *flexran_get_dl_scheduler_name(mid_t mod_id);
int flexran_set_dl_scheduler(mid_t mod_id, char *sched);
/* Get the name of/Set the UL scheduler algorithm. Same applies as for the DL
* case */
char *flexran_get_ul_scheduler_name(mid_t mod_id);
int flexran_set_ul_scheduler(mid_t mod_id, char *sched);
/************************** S1AP **************************/
/* Get the number of MMEs to be connected */
......
......@@ -100,6 +100,7 @@ void mac_top_init_eNB(void)
mac[i]->if_inst = IF_Module_init(i);
mac[i]->pre_processor_dl.algorithm = 0;
mac[i]->pre_processor_dl.dl = dlsch_scheduler_pre_processor;
char *s = "round_robin_dl";
void *d = dlsym(NULL, s);
......@@ -107,6 +108,7 @@ void mac_top_init_eNB(void)
mac[i]->pre_processor_dl.dl_algo = *(default_sched_dl_algo_t *) d;
mac[i]->pre_processor_dl.dl_algo.data = mac[i]->pre_processor_dl.dl_algo.setup();
mac[i]->pre_processor_ul.algorithm = 0;
mac[i]->pre_processor_ul.ul = ulsch_scheduler_pre_processor;
s = "round_robin_ul";
d = dlsym(NULL, s);
......
......@@ -258,13 +258,26 @@ int addmod_static_slice_ul(slice_info_t *si,
return si->num - 1;
}
int remove_static_slice(slice_info_t *si, uint8_t slice_idx) {
int remove_static_slice_dl(slice_info_t *si, uint8_t slice_idx) {
if (slice_idx == 0)
return 0;
slice_t *sr = _remove_slice(&si->num, si->s, si->UE_assoc_slice, slice_idx);
if (!sr)
return 0;
free(sr->algo_data);
sr->dl_algo.unset(&sr->dl_algo.data);
free(sr);
return 1;
}
int remove_static_slice_ul(slice_info_t *si, uint8_t slice_idx) {
if (slice_idx == 0)
return 0;
slice_t *sr = _remove_slice(&si->num, si->s, si->UE_assoc_slice, slice_idx);
if (!sr)
return 0;
free(sr->algo_data);
sr->ul_algo.unset(&sr->ul_algo.data);
free(sr);
return 1;
}
......@@ -528,6 +541,7 @@ pp_impl_param_t static_dl_init(module_id_t mod_id, int CC_id) {
dlp->posLow = 0;
dlp->posHigh = to_rbg(RC.mac[mod_id]->common_channels[CC_id].mib->message.dl_Bandwidth) - 1;
default_sched_dl_algo_t *algo = &RC.mac[mod_id]->pre_processor_dl.dl_algo;
algo->data = NULL;
DevAssert(0 == addmod_static_slice_dl(si, 0, strdup("default"), algo, dlp));
const UE_list_t *UE_list = &RC.mac[mod_id]->UE_info.list;
for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id])
......@@ -539,7 +553,7 @@ pp_impl_param_t static_dl_init(module_id_t mod_id, int CC_id) {
sttc.remove_UE = slicing_remove_UE;
sttc.move_UE = slicing_move_UE;
sttc.addmod_slice = addmod_static_slice_dl;
sttc.remove_slice = remove_static_slice;
sttc.remove_slice = remove_static_slice_dl;
sttc.dl = static_dl;
// current DL algo becomes default scheduler
sttc.dl_algo = *algo;
......@@ -564,6 +578,7 @@ pp_impl_param_t static_ul_init(module_id_t mod_id, int CC_id) {
ulp->posLow = 0;
ulp->posHigh = to_prb(RC.mac[mod_id]->common_channels[CC_id].ul_Bandwidth) - 1;
default_sched_ul_algo_t *algo = &RC.mac[mod_id]->pre_processor_ul.ul_algo;
algo->data = NULL;
DevAssert(0 == addmod_static_slice_ul(si, 0, strdup("default"), algo, ulp));
const UE_list_t *UE_list = &RC.mac[mod_id]->UE_info.list;
for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id])
......@@ -575,7 +590,7 @@ pp_impl_param_t static_ul_init(module_id_t mod_id, int CC_id) {
sttc.remove_UE = slicing_remove_UE;
sttc.move_UE = slicing_move_UE;
sttc.addmod_slice = addmod_static_slice_ul;
sttc.remove_slice = remove_static_slice;
sttc.remove_slice = remove_static_slice_ul;
sttc.ul = static_ul;
// current DL algo becomes default scheduler
sttc.ul_algo = *algo;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment