Commit 825ae3c0 authored by Guido Casati's avatar Guido Casati Committed by cig

Integration PHY and MAC procedures for Timing Advance updates. Compilation and...

Integration PHY and MAC procedures for Timing Advance updates. Compilation and run is OK. TA updates need further fixes as not working as expected.

- "nr_process_timing_advance": TA to be applied is commented out, need to be uncommented
- with introduced delay of 50 in rx_rf, TA update should be 34 in MAC CE
  but this does not occur when ta is applied at UE side according to standard
- introduced ULSCH scheduler and NR RX SDU functions
- fixes to logic in UL fill RX indication
- added crc indication in UL RX
- temporary hardcoded UE_id to 0, rnti not considered in the logic
parent 6ec89bec
......@@ -1642,6 +1642,7 @@ set (MAC_NR_SRC
${NR_MAC_DIR}/gNB_scheduler.c
${NR_MAC_DIR}/gNB_scheduler_bch.c
${NR_MAC_DIR}/gNB_scheduler_dlsch.c
${NR_MAC_DIR}/gNB_scheduler_ulsch.c
${NR_MAC_DIR}/gNB_scheduler_primitives.c
${NR_MAC_DIR}/gNB_scheduler_phytest.c
)
......
......@@ -46,3 +46,5 @@ void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
uint8_t *sdu);
void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid);
void nr_fill_crc_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t crc_flag);
\ No newline at end of file
......@@ -267,7 +267,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
// [hna] TO BE CLEANED
// --------------------
// nfapi_rx_indication_pdu_t *pdu;
nfapi_rx_indication_pdu_t *pdu;
int timing_advance_update;
int sync_pos;
......@@ -277,7 +277,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
// gNB->UL_INFO.rx_ind.sfn_sf = frame<<4| slot_rx;
// gNB->UL_INFO.rx_ind.rx_indication_body.tl.tag = NFAPI_RX_INDICATION_BODY_TAG;
// pdu = &gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list[gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus];
pdu = &gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list[gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus];
// pdu->rx_ue_information.handle = gNB->ulsch[UE_id+1][0]->handle;
// pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
......@@ -285,11 +285,10 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
// pdu->rx_indication_rel8.tl.tag = NFAPI_RX_INDICATION_REL8_TAG;
// pdu->rx_indication_rel8.length = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->TBS>>3;
// pdu->rx_indication_rel8.offset = 1; // DJP - I dont understand - but broken unless 1 ???? 0; // filled in at the end of the UL_INFO formation
// pdu->data = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b;
pdu->data = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b;
// estimate timing advance for MAC
sync_pos = nr_est_timing_advance_pusch(gNB, UE_id);
timing_advance_update = sync_pos; // - gNB->frame_parms.nb_prefix_samples/4; //to check
// printf("\x1B[33m" "timing_advance_update = %d\n" "\x1B[0m", timing_advance_update);
switch (gNB->frame_parms.N_RB_DL) {
// case 6: /* nothing to do */ break;
......@@ -309,7 +308,9 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
if (timing_advance_update < 0) timing_advance_update = 0;
if (timing_advance_update > 63) timing_advance_update = 63;
// pdu->rx_indication_rel8.timing_advance = timing_advance_update;
printf("\x1B[33m" "Estimated timing advance PUSCH is = %d, timing_advance_update is %d \n" "\x1B[0m", sync_pos,timing_advance_update);
pdu->rx_indication_rel8.timing_advance = timing_advance_update;
// estimate UL_CQI for MAC (from antenna port 0 only)
// int SNRtimes10 = dB_fixed_times10(gNB->pusch_vars[UE_id]->ulsch_power[0]) - 300;//(10*gNB->measurements.n0_power_dB[0]);
......@@ -322,12 +323,28 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
// harq_pid,frame,slot_rx,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,pdu->rx_indication_rel8.timing_advance,
// timing_advance_update);
// gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus++;
gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus++;
// gNB->UL_INFO.rx_ind.sfn_sf = frame<<4 | slot_rx;
// pthread_mutex_unlock(&gNB->UL_INFO_mutex);
}
void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t crc_flag){
// pthread_mutex_lock(&gNB->UL_INFO_mutex);
nfapi_crc_indication_pdu_t *pdu = &gNB->UL_INFO.crc_ind.crc_indication_body.crc_pdu_list[gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs];
// gNB->UL_INFO.crc_ind.sfn_sf = frame<<4 | subframe;
// gNB->UL_INFO.crc_ind.header.message_id = NFAPI_CRC_INDICATION;
// gNB->UL_INFO.crc_ind.crc_indication_body.tl.tag = NFAPI_CRC_INDICATION_BODY_TAG;
// pdu->instance_length = 0; // don't know what to do with this
// // pdu->rx_ue_information.handle = handle;
// pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
// pdu->rx_ue_information.rnti = gNB->ulsch[UE_id]->rnti;
// pdu->crc_indication_rel8.tl.tag = NFAPI_CRC_INDICATION_REL8_TAG;
// pdu->crc_indication_rel8.crc_flag = crc_flag;
gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs++;
//LOG_D(PHY, "%s() rnti:%04x crcs:%d crc_flag:%d\n", __FUNCTION__, pdu->rx_ue_information.rnti, gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs, crc_flag);
// pthread_mutex_unlock(&gNB->UL_INFO_mutex);
}
void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
......@@ -355,9 +372,10 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
int num_pusch_pdu = UL_tti_req->n_pdus;
LOG_D(PHY,"phy_procedures_gNB_uespec_RX frame %d, slot %d, num_pusch_pdu %d\n",frame_rx,slot_rx,num_pusch_pdu);
for (int i = 0; i < num_pusch_pdu; i++) {
gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus = 0;
for (int i = 0; i < num_pusch_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
{
......@@ -378,6 +396,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[UE_id]->rxdataF_ext[0],6900,1,1);
nr_ulsch_procedures(gNB, frame_rx, slot_rx, UE_id, harq_pid);
nr_fill_rx_indication(gNB, frame_rx, slot_rx, UE_id, harq_pid); // indicate SDU to MAC
nr_fill_crc_indication(gNB, frame_rx, slot_rx, UE_id, 0);
}
}
}
......
......@@ -1551,10 +1551,10 @@ void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t timing
int factor_mu = 1 << mu;
PHY_vars_UE_g[Mod_id][CC_id]->timing_advance += (timing_advance - 31) * 1024 / factor_mu ;
//PHY_vars_UE_g[Mod_id][CC_id]->timing_advance += (timing_advance - 31) * 1024 / factor_mu ;
LOG_D(PHY,"[UE %d] Got timing advance %d from MAC, new value is %d\n",Mod_id, timing_advance, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
LOG_D(PHY,"[UE %d] Got timing advance %u from MAC, new value is %u\n",Mod_id, timing_advance, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
}
void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,
......
......@@ -185,7 +185,7 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
uint16_t sdu_lengths[NR_MAX_NB_RB] = {0};
int padding = 0, post_padding = 0, ta_len = 0, header_length_total = 0, sdu_length_total = 0, num_sdus = 0;
int CC_id, sub_pdu_id, lcid, offset, i, j=0, k=0;
int CC_id, sub_pdu_id, lcid, offset, i, j=0, k=0, ta_update;
// hardcoded parameters
// for DMRS configuration type 1
......@@ -195,11 +195,11 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
uint16_t R = 697;
uint16_t nb_rb = 50 ;
uint32_t TBS = nr_compute_tbs(Qm, R, nb_rb, 12, 6, 0, 1)/8; // this is in bits TODO use nr_get_tbs
int ta_update = 17;
NR_TAG_Id_t tag_id = 0;
int UE_id = 0; // UE_list->head is -1 !
UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
ta_update = ue_sched_ctl->ta_update;
for (CC_id = 0; CC_id < RC.nb_nr_mac_CC[module_idP] + 1; CC_id++) {
LOG_D(MAC, "doing nr_schedule_ue_spec for CC_id %d\n", CC_id);
......@@ -214,13 +214,14 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
} else { // This is a potentially new SDU opportunity */
if (gNB->tag->timeAlignmentTimer != NULL) {
printf(" SHOULD NOT ENTER HERE \n");
if (gNB->tag->timeAlignmentTimer == 0) {
ta_update = ue_sched_ctl->ta_update;
/* if we send TA then set timer to not send it for a while */
if (ta_update != 31)
ue_sched_ctl->ta_timer = 20;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
ue_sched_ctl->ta_update = 31;
} else {
ta_update = 31;
}
......
......@@ -464,3 +464,21 @@ int get_symbolsperslot(nfapi_nr_config_request_t *cfg) {
}
int find_nrUE_id(module_id_t mod_idP, rnti_t rntiP) {
int UE_id;
UE_list_t *UE_list = &RC.nrmac[mod_idP]->UE_list;
for (UE_id = 0; UE_id < MAX_MOBILES_PER_GNB; UE_id++) {
if (UE_list->active[UE_id] == TRUE) {
if (UE_list->UE_template[nrUE_PCCID(mod_idP, UE_id)][UE_id].rnti == rntiP) {
return UE_id;
}
}
}
return -1;
}
int nrUE_PCCID(module_id_t mod_idP, int ue_idP) {
return (RC.nrmac[mod_idP]->UE_list.pCC_id[ue_idP]);
}
This diff is collapsed.
......@@ -149,6 +149,10 @@ uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw);
int32_t get_nr_uldl_offset(int nr_bandP);
int find_nrUE_id(module_id_t mod_idP, rnti_t rntiP);
int nrUE_PCCID(module_id_t mod_idP, int ue_idP);
void config_nr_mib(int Mod_idP,
int CC_idP,
int p_gNBP,
......@@ -159,4 +163,22 @@ void config_nr_mib(int Mod_idP,
int cellBarred,
int intraFreqReselection);
/* \brief Function to indicate a received SDU on ULSCH.
@param Mod_id Instance ID of gNB
@param CC_id Component carrier index
@param rnti RNTI of UE transmitting the SDU
@param sdu Pointer to received SDU
@param sdu_len Length of SDU
@param timing_advance timing advance adjustment after this pdu
@param ul_cqi Uplink CQI estimate after this pdu (SNR quantized to 8 bits, -64 ... 63.5 dB in .5dB steps)
*/
void nr_rx_sdu(const module_id_t gnb_mod_idP,
const int CC_idP,
const frame_t frameP,
const sub_frame_t subframeP,
const rnti_t rntiP,
uint8_t * sduP,
const uint16_t sdu_lenP,
const uint16_t timing_advance, const uint8_t ul_cqi);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/
......@@ -169,6 +169,7 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
}
} else {
printf("UL_info->rx_ind.rx_indication_body.number_of_pdus %d UL_info->crc_ind.crc_indication_body.number_of_crcs %d\n", UL_info->rx_ind.rx_indication_body.number_of_pdus, UL_info->crc_ind.crc_indication_body.number_of_crcs);
if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->crc_ind.crc_indication_body.number_of_crcs>0) {
for (int i=0; i<UL_info->rx_ind.rx_indication_body.number_of_pdus; i++) {
for (int j=0; j<UL_info->crc_ind.crc_indication_body.number_of_crcs; j++) {
......@@ -182,28 +183,29 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication
LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->slot);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
(uint8_t *)NULL,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
} else {
nr_rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
(uint8_t *)NULL,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
else {
LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->slot);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
nr_rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
printf("rx_indication_rel8.timing_advance %d\n", UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance);
break;
} //if (UL_info->crc_ind.crc_pdu_list[j].rx_ue_information.rnti ==
......
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