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OpenXG-RAN
Commit 9fac807d authored by Raymond Knopp's avatar Raymond Knopp
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added support for 1.5/10/20 MHz. 1.5MHz primary synch is still broken (128-bit... 

added support for 1.5/10/20 MHz. 1.5MHz primary synch is still broken (128-bit alignment issue with 128-point DFTs). 1/2 UEs connection seems to work ok for 10/20 MHz.

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@4023 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent 4980ec2c
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Showing with 1613 additions and 846 deletions
openair2/LAYER2/MAC/defs.h
View file @ 9fac807d
...@@ -125,6 +125,8 @@ ...@@ -125,6 +125,8 @@
// The power headroom reporting range is from -23 ...+40 dB and beyond, with step 1 // The power headroom reporting range is from -23 ...+40 dB and beyond, with step 1
#define PHR_MAPPING_OFFSET 23 // if ( x>= -23 ) val = floor (x + 23) #define PHR_MAPPING_OFFSET 23 // if ( x>= -23 ) val = floor (x + 23)
#define N_RBGS_MAX 25
#define LCGID0 0 #define LCGID0 0
#define LCGID1 1 #define LCGID1 1
#define LCGID2 2 #define LCGID2 2
...@@ -579,6 +581,8 @@ typedef struct{ ...@@ -579,6 +581,8 @@ typedef struct{
DCI_PDU DCI_pdu; DCI_PDU DCI_pdu;
/// Outgoing BCCH pdu for PHY /// Outgoing BCCH pdu for PHY
BCCH_PDU BCCH_pdu; BCCH_PDU BCCH_pdu;
/// Outgoing BCCH DCI allocation
uint32_t BCCH_alloc_pdu;
/// Outgoing CCCH pdu for PHY /// Outgoing CCCH pdu for PHY
CCCH_PDU CCCH_pdu; CCCH_PDU CCCH_pdu;
/// Outgoing DLSCH pdu for PHY /// Outgoing DLSCH pdu for PHY
...@@ -962,6 +966,25 @@ void mac_UE_out_of_sync_ind(u8 Mod_id,u32 frame, u16 CH_index); ...@@ -962,6 +966,25 @@ void mac_UE_out_of_sync_ind(u8 Mod_id,u32 frame, u16 CH_index);
// eNB functions // eNB functions
/* \brief This function assigns pre-available RBS to each UE in specified sub-bands before scheduling is done
@param Mod_id Instance ID of eNB
@param frame Index of frame
@param subframe Index of current subframe
@param dl_pow_off Pointer to store resulting power offset for DCI
@param pre_nb_available_rbs Pointer to store number of remaining rbs after scheduling
@param N_RBS Number of resource block groups
@param rb_alloc_sub Table of resource block groups allocated to each UE
*/
void dlsch_scheduler_pre_processor (unsigned char Mod_id,
u32 frame,
unsigned char subframe,
u8 *dl_pow_off,
u16 *pre_nb_available_rbs,
int N_RBGS,
unsigned char rballoc_sub_UE[NUMBER_OF_UE_MAX][N_RBGS_MAX]);
/* \brief Function to trigger the eNB scheduling procedure. It is called by PHY at the beginning of each subframe, \f$n$\f /* \brief Function to trigger the eNB scheduling procedure. It is called by PHY at the beginning of each subframe, \f$n$\f
and generates all DLSCH allocations for subframe \f$n\f$ and ULSCH allocations for subframe \f$n+k$\f. The resultant DCI_PDU is and generates all DLSCH allocations for subframe \f$n\f$ and ULSCH allocations for subframe \f$n+k$\f. The resultant DCI_PDU is
ready after returning from this call. ready after returning from this call.
...@@ -988,7 +1011,6 @@ DCI_PDU *get_dci_sdu(u8 Mod_id,u32 frame,u8 subframe); ...@@ -988,7 +1011,6 @@ DCI_PDU *get_dci_sdu(u8 Mod_id,u32 frame,u8 subframe);
*/ */
void initiate_ra_proc(u8 Mod_id,u32 frame, u16 preamble_index,s16 timing_offset,u8 sect_id,u8 subframe,u8 f_id); void initiate_ra_proc(u8 Mod_id,u32 frame, u16 preamble_index,s16 timing_offset,u8 sect_id,u8 subframe,u8 f_id);
/* \brief Function in eNB to fill RAR pdu when requested by PHY. This provides a single RAR SDU for the moment and returns the t-CRNTI. /* \brief Function in eNB to fill RAR pdu when requested by PHY. This provides a single RAR SDU for the moment and returns the t-CRNTI.
@param Mod_id Instance ID of eNB @param Mod_id Instance ID of eNB
@param dlsch_buffer Pointer to DLSCH input buffer @param dlsch_buffer Pointer to DLSCH input buffer
......
openair2/LAYER2/MAC/eNB_scheduler.c
View file @ 9fac807d
This source diff could not be displayed because it is too large. You can view the blob instead.
openair2/LAYER2/MAC/lte_transport_init.c
View file @ 9fac807d
...@@ -17,7 +17,7 @@ void init_transport_channels(unsigned char transmission_mode) { ...@@ -17,7 +17,7 @@ void init_transport_channels(unsigned char transmission_mode) {
UL_alloc_pdu.TPC = 0; UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cqi_req = 1; UL_alloc_pdu.cqi_req = 1;
/*
BCCH_alloc_pdu.type = 1; BCCH_alloc_pdu.type = 1;
BCCH_alloc_pdu.vrb_type = 0; BCCH_alloc_pdu.vrb_type = 0;
BCCH_alloc_pdu.rballoc = BCCH_RB_ALLOC; BCCH_alloc_pdu.rballoc = BCCH_RB_ALLOC;
...@@ -36,6 +36,7 @@ void init_transport_channels(unsigned char transmission_mode) { ...@@ -36,6 +36,7 @@ void init_transport_channels(unsigned char transmission_mode) {
BCCH_alloc_pdu_fdd.mcs = 1; BCCH_alloc_pdu_fdd.mcs = 1;
BCCH_alloc_pdu_fdd.harq_pid = 0; BCCH_alloc_pdu_fdd.harq_pid = 0;
BCCH_alloc_pdu_fdd.TPC = 1; // set to 3 PRB BCCH_alloc_pdu_fdd.TPC = 1; // set to 3 PRB
*/
DLSCH_alloc_pdu1A.type = 1; DLSCH_alloc_pdu1A.type = 1;
DLSCH_alloc_pdu1A.vrb_type = 0; DLSCH_alloc_pdu1A.vrb_type = 0;
......
openair2/LAYER2/MAC/main.c
View file @ 9fac807d
...@@ -139,6 +139,7 @@ int mac_top_init(int eMBMS_active, u8 cba_group_active){ ...@@ -139,6 +139,7 @@ int mac_top_init(int eMBMS_active, u8 cba_group_active){
unsigned char Mod_id,i,j; unsigned char Mod_id,i,j;
RA_TEMPLATE *RA_template; RA_TEMPLATE *RA_template;
UE_TEMPLATE *UE_template; UE_TEMPLATE *UE_template;
int size_bytes1,size_bytes2,size_bits1,size_bits2;
LOG_I(MAC,"[MAIN] Init function start:Nb_UE_INST=%d\n",NB_UE_INST); LOG_I(MAC,"[MAIN] Init function start:Nb_UE_INST=%d\n",NB_UE_INST);
if (NB_UE_INST>0) { if (NB_UE_INST>0) {
...@@ -209,21 +210,81 @@ int mac_top_init(int eMBMS_active, u8 cba_group_active){ ...@@ -209,21 +210,81 @@ int mac_top_init(int eMBMS_active, u8 cba_group_active){
RA_template = (RA_TEMPLATE *)&eNB_mac_inst[i].RA_template[0]; RA_template = (RA_TEMPLATE *)&eNB_mac_inst[i].RA_template[0];
for (j=0;j<NB_RA_PROC_MAX;j++) { for (j=0;j<NB_RA_PROC_MAX;j++) {
if (mac_xface->lte_frame_parms->frame_type == TDD) { if (mac_xface->lte_frame_parms->frame_type == TDD) {
memcpy((void *)&RA_template[j].RA_alloc_pdu1[0],(void *)&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t)); switch (mac_xface->lte_frame_parms->N_RB_DL) {
memcpy((void *)&RA_template[j].RA_alloc_pdu2[0],(void *)&DLSCH_alloc_pdu1A,sizeof(DCI1A_5MHz_TDD_1_6_t)); case 6:
RA_template[j].RA_dci_size_bytes1 = sizeof(DCI1A_5MHz_TDD_1_6_t); size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
RA_template[j].RA_dci_size_bytes2 = sizeof(DCI1A_5MHz_TDD_1_6_t); size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
RA_template[j].RA_dci_size_bits1 = sizeof_DCI1A_5MHz_TDD_1_6_t; size_bits1 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
RA_template[j].RA_dci_size_bits2 = sizeof_DCI1A_5MHz_TDD_1_6_t; size_bits2 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
break;
case 25:
size_bytes1 = sizeof(DCI1A_5MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_5MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_5MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_5MHz_TDD_1_6_t;
break;
case 50:
size_bytes1 = sizeof(DCI1A_10MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_10MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_10MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_10MHz_TDD_1_6_t;
break;
case 100:
size_bytes1 = sizeof(DCI1A_20MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_20MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_20MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_20MHz_TDD_1_6_t;
break;
default:
size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
break;
}
} }
else { else {
memcpy((void *)&RA_template[j].RA_alloc_pdu1[0],(void *)&RA_alloc_pdu_fdd,sizeof(DCI1A_5MHz_FDD_t)); switch (mac_xface->lte_frame_parms->N_RB_DL) {
memcpy((void *)&RA_template[j].RA_alloc_pdu2[0],(void *)&DLSCH_alloc_pdu1A_fdd,sizeof(DCI1A_5MHz_FDD_t)); case 6:
RA_template[j].RA_dci_size_bytes1 = sizeof(DCI1A_5MHz_FDD_t); size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
RA_template[j].RA_dci_size_bytes2 = sizeof(DCI1A_5MHz_FDD_t); size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
RA_template[j].RA_dci_size_bits1 = sizeof_DCI1A_5MHz_FDD_t; size_bits1 = sizeof_DCI1A_1_5MHz_FDD_t;
RA_template[j].RA_dci_size_bits2 = sizeof_DCI1A_5MHz_FDD_t; size_bits2 = sizeof_DCI1A_1_5MHz_FDD_t;
break;
case 25:
size_bytes1 = sizeof(DCI1A_5MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_5MHz_FDD_t);
size_bits1 = sizeof_DCI1A_5MHz_FDD_t;
size_bits2 = sizeof_DCI1A_5MHz_FDD_t;
break;
case 50:
size_bytes1 = sizeof(DCI1A_10MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_10MHz_FDD_t);
size_bits1 = sizeof_DCI1A_10MHz_FDD_t;
size_bits2 = sizeof_DCI1A_10MHz_FDD_t;
break;
case 100:
size_bytes1 = sizeof(DCI1A_20MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_20MHz_FDD_t);
size_bits1 = sizeof_DCI1A_20MHz_FDD_t;
size_bits2 = sizeof_DCI1A_20MHz_FDD_t;
break;
default:
size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bits1 = sizeof_DCI1A_1_5MHz_FDD_t;
size_bits2 = sizeof_DCI1A_1_5MHz_FDD_t;
break;
}
} }
memcpy((void *)&RA_template[j].RA_alloc_pdu1[0],(void *)&RA_alloc_pdu,size_bytes1);
memcpy((void *)&RA_template[j].RA_alloc_pdu2[0],(void *)&DLSCH_alloc_pdu1A,size_bytes2);
RA_template[j].RA_dci_size_bytes1 = size_bytes1;
RA_template[j].RA_dci_size_bytes2 = size_bytes2;
RA_template[j].RA_dci_size_bits1 = size_bits1;
RA_template[j].RA_dci_size_bits2 = size_bits2;
RA_template[j].RA_dci_fmt1 = format1A; RA_template[j].RA_dci_fmt1 = format1A;
RA_template[j].RA_dci_fmt2 = format1A; RA_template[j].RA_dci_fmt2 = format1A;
} }
......
openair2/LAYER2/MAC/pre_processor.c
View file @ 9fac807d
This diff is collapsed.
openair2/LAYER2/MAC/ue_procedures.c
View file @ 9fac807d
...@@ -401,7 +401,7 @@ void ue_decode_si(u8 Mod_id,u32 frame, u8 eNB_index, void *pdu,u16 len) { ...@@ -401,7 +401,7 @@ void ue_decode_si(u8 Mod_id,u32 frame, u8 eNB_index, void *pdu,u16 len) {
int i; int i;
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_DECODE_SI, VCD_FUNCTION_IN); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_DECODE_SI, VCD_FUNCTION_IN);
// LOG_D(MAC,"[UE %d] Frame %d Sending SI to RRC (LCID Id %d)\n",Mod_id,frame,BCCH); LOG_D(MAC,"[UE %d] Frame %d Sending SI to RRC (LCID Id %d,len %d)\n",Mod_id,frame,BCCH,len);
mac_rrc_data_ind(Mod_id, mac_rrc_data_ind(Mod_id,
frame, frame,
......
openair2/NAS/DRIVER/MESH/Makefile
View file @ 9fac807d
...@@ -28,7 +28,6 @@ IS_KERNEL_SUBVERSION_GREATER_THAN_22=$(shell if [ $(SUBVERSION) -ge 22 ] ; then ...@@ -28,7 +28,6 @@ IS_KERNEL_SUBVERSION_GREATER_THAN_22=$(shell if [ $(SUBVERSION) -ge 22 ] ; then
IS_KERNEL_SUBVERSION_GREATER_THAN_29=$(shell if [ $(SUBVERSION) -ge 29 ] ; then echo true ; fi) IS_KERNEL_SUBVERSION_GREATER_THAN_29=$(shell if [ $(SUBVERSION) -ge 29 ] ; then echo true ; fi)
IS_KERNEL_SUBVERSION_GREATER_THAN_30=$(shell if [ $(SUBVERSION) -ge 30 ] ; then echo true ; fi) IS_KERNEL_SUBVERSION_GREATER_THAN_30=$(shell if [ $(SUBVERSION) -ge 30 ] ; then echo true ; fi)
IS_KERNEL_SUBVERSION_GREATER_THAN_32=$(shell if [ $(SUBVERSION) -ge 32 ] ; then echo true ; fi) IS_KERNEL_SUBVERSION_GREATER_THAN_32=$(shell if [ $(SUBVERSION) -ge 32 ] ; then echo true ; fi)
# Add global rule for V3 kernels # Add global rule for V3 kernels
IS_KERNEL_SUBVERSION_GREATER_THAN_301= "false" IS_KERNEL_SUBVERSION_GREATER_THAN_301= "false"
...@@ -38,6 +37,7 @@ ifeq ($(KERNEL_MAIN_VERSION),3) ...@@ -38,6 +37,7 @@ ifeq ($(KERNEL_MAIN_VERSION),3)
IS_KERNEL_SUBVERSION_GREATER_THAN_30 = "true" IS_KERNEL_SUBVERSION_GREATER_THAN_30 = "true"
IS_KERNEL_SUBVERSION_GREATER_THAN_32 = "true" IS_KERNEL_SUBVERSION_GREATER_THAN_32 = "true"
IS_KERNEL_SUBVERSION_GREATER_THAN_301=$(shell if [ $(SUBVERSION) -ge 1 ] ; then echo true ; fi) IS_KERNEL_SUBVERSION_GREATER_THAN_301=$(shell if [ $(SUBVERSION) -ge 1 ] ; then echo true ; fi)
IS_KERNEL_SUBVERSION_GREATER_THAN_307=$(shell if [ $(SUBVERSION) -ge 7 ] ; then echo true ; fi)
endif endif
GT2622 = $(if $(IS_KERNEL_SUBVERSION_GREATER_THAN_22),-DKERNEL_VERSION_GREATER_THAN_2622=1) GT2622 = $(if $(IS_KERNEL_SUBVERSION_GREATER_THAN_22),-DKERNEL_VERSION_GREATER_THAN_2622=1)
......
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