Enabled 4UL per frame using 4 DL DCI

- Enabled slot 1 and 2 for DLSCH
- Enabled slot 6,7,8,9,16,17,18,19 fir ULSCH

openair1/SCHED_NR/phy_procedures_nr_gNB.c

@@ -653,7 +653,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
 	  for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
 	    no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
             if (no_sig) {
-              LOG_I(PHY, "PUSCH not detected in symbol %d\n",symbol);
+              LOG_I(PHY, "PUSCH not detected for %4d.%2d in symbol %d\n",frame_rx,slot_rx,symbol);
               nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1);
               return;
             }

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -368,9 +368,10 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
   }
 
 #define BIT(x) (1 << (x))
-  const uint64_t dlsch_in_slot_bitmap = BIT( 1) | BIT( 2) | BIT( 3) | BIT( 4) | BIT( 5) | BIT( 6)
-                                      | BIT(11) | BIT(12) | BIT(13) | BIT(14) | BIT(15) | BIT(16);
-  const uint64_t ulsch_in_slot_bitmap = BIT( 8) | BIT(18);
+  const uint64_t dlsch_in_slot_bitmap = BIT( 0) |BIT( 1) | BIT( 2) | BIT( 3) | BIT( 4) 
+                                      | BIT(10) |BIT(11) | BIT(12) | BIT(13) | BIT(14);
+  const uint64_t ulsch_in_slot_bitmap = BIT( 6) | BIT( 7) | BIT( 8) | BIT( 9)
+                                      | BIT(16) | BIT(17) | BIT(18) | BIT(19) ;
 
   memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
   memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -406,12 +406,12 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id,
   /* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE
    * limitations).  Note that if K2 or the TDD configuration is changed, below
    * conditions might exclude each other and never be true */
-  if (!(is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && sched_slot == 8))
+  if (!(is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) ))
     return false;
 
   const int bw = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
   uint16_t rbStart = 0;
-  uint16_t rbSize = 50; /* due to OAI UE limitations */
+  uint16_t rbSize = 106;
   if (rbSize>bw)
     rbSize = bw;
 

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c

@@ -962,7 +962,7 @@ void nr_schedule_ulsch(module_id_t module_id,
     memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
     future_ul_tti_req->n_pdus += 1;
 
-    LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH\n", frame, slot);
+    LOG_D(MAC, "%4d.%2d Scheduling UE specific PUSCH for %4d.%2d\n", frame, slot,sched_pusch->frame,sched_pusch->slot);
 
     pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
     pusch_pdu->rnti = rnti;

targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf

@@ -182,9 +182,9 @@ gNBs =
       # dl_UL_TransmissionPeriodicity
       # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
       dl_UL_TransmissionPeriodicity                                 = 6;
-      nrofDownlinkSlots                                             = 7;
+      nrofDownlinkSlots                                             = 5;
       nrofDownlinkSymbols                                           = 6;
-      nrofUplinkSlots                                               = 2;
+      nrofUplinkSlots                                               = 4;
       nrofUplinkSymbols                                             = 4;
 
   ssPBCH_BlockPower                                             = 10;

targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf

@@ -182,9 +182,9 @@ gNBs =
       # dl_UL_TransmissionPeriodicity
       # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
       dl_UL_TransmissionPeriodicity                                 = 6;
-      nrofDownlinkSlots                                             = 7;
+      nrofDownlinkSlots                                             = 5;
       nrofDownlinkSymbols                                           = 6;
-      nrofUplinkSlots                                               = 2;
+      nrofUplinkSlots                                               = 4;
       nrofUplinkSymbols                                             = 4;
 
   ssPBCH_BlockPower                                             = 10;