Commit ef1decce authored by cig's avatar cig

Introduced RA type @ UE

- whether it is 2-step or 4-step RA
- added checks on CFRA and 2-step RA pointer members
- introduced enum and PRACH resources struct member
parent 1d2d96f3
dev Fix_SA_SIB1 NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_DLUL_PF NR_DLUL_PF_4UL NR_DL_MIMO NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_initsync_fixes NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_RA_cleanup NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_w5GCN_new_gtpu NR_UE_CONFIG_REQ_FIXES NR_UE_SA NR_UL_SCFDMA_100MHz NR_scheduling_CSIRS NR_scheduling_request PBCHNRTCFIX RFquality Saankhya_NRPRACH_HighSpeed add-dmrs-test benetel_config_file_fix benetel_driver_update benetel_fixes bsr-fix bugfix-free-ra-process bugfix-nr-t-reordering ci-new-docker-pipeline ci-reduce-nb-vms ci_benetel_test ci_phytest ci_quectel_support ci_test_ra_fr2 ci_vm_resource_fix develop develop-CBRA-v3 develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-v3 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA disable_CSI_measrep docker-improvements-2021-april docker-no-cache-option enhance-rfsim episys-merge episys/nsa_development fft_bench_hotfix fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-quectel fix-realtime fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_rb_corruption fix_reestablishment fixgtpu git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-exit-gnb-when-no-enb-nsa integ-w13-test-rt-issue integration_2020_wk15 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_w5GC_CBRA_test inter-RRU-final migrate-cpp-check-container msg4_phy_0303_lfq multiple_ssb_sib1_bugfix new-gtpu nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new nr-bsr-fix nr-dl-mimo-2layer nr-dmrs-fixes nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-srb-integrity nr-ra-fix nr-stats-print nrPBCHTCFix nrPbchTcFix nr_power_measurement_fixes nr_ue_pdcp_fix oairu physim-build-deploy prb_based_dl_channel_estimation ptrs_rrc_config recursive-cmake rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_phy_test_improve rohan_ulsim2RxFix s1_subnormal sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai sim-channels small_nr_bugfixes t-gnb-tracer test-panos test_nsa_gtpu_fix test_rt-fix_phy-test ue-dci-false-detection ue-fixes ue-pdsch-pusch-parallel ue-race-fix usrp_x400 wf-sa-rrc wk11-with-phytest xw2 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 benetel_gnb_rel_1.0 benetel_enb_rel_1.0
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...@@ -154,6 +154,11 @@ typedef enum { ...@@ -154,6 +154,11 @@ typedef enum {
MOD_QAM256 MOD_QAM256
}nr_mod_t; }nr_mod_t;
typedef enum {
RA_2STEP = 0,
RA_4STEP
} nr_ra_type_e;
typedef struct { typedef struct {
/// Size of first RBG /// Size of first RBG
uint8_t start_size; uint8_t start_size;
...@@ -221,6 +226,8 @@ typedef struct { ...@@ -221,6 +226,8 @@ typedef struct {
uint8_t RA_PREAMBLE_BACKOFF; uint8_t RA_PREAMBLE_BACKOFF;
/// ///
uint8_t RA_SCALING_FACTOR_BI; uint8_t RA_SCALING_FACTOR_BI;
/// Indicating whether it is 2-step or 4-step RA
uint8_t RA_TYPE;
/// ///
uint8_t RA_PCMAX; uint8_t RA_PCMAX;
/// Corresponding RA-RNTI for UL-grant /// Corresponding RA-RNTI for UL-grant
......
...@@ -106,9 +106,20 @@ void nr_get_prach_resources(module_id_t mod_id, ...@@ -106,9 +106,20 @@ void nr_get_prach_resources(module_id_t mod_id,
// - available SSB with SS-RSRP above rsrp-ThresholdSSB: SSB selection // - available SSB with SS-RSRP above rsrp-ThresholdSSB: SSB selection
// - available CSI-RS with CSI-RSRP above rsrp-ThresholdCSI-RS: CSI-RS selection // - available CSI-RS with CSI-RSRP above rsrp-ThresholdCSI-RS: CSI-RS selection
// - network controlled Mobility // - network controlled Mobility
uint8_t cfra_ssb_resource_idx = 0;
prach_resources->ra_PreambleIndex = rach_ConfigDedicated->cfra->resources.choice.ssb->ssb_ResourceList.list.array[cfra_ssb_resource_idx]->ra_PreambleIndex; if (rach_ConfigDedicated->cfra){
LOG_D(MAC, "[RAPROC] - Selected RA preamble index %d for contention-free random access procedure... \n", prach_resources->ra_PreambleIndex); uint8_t cfra_ssb_resource_idx = 0;
prach_resources->ra_PreambleIndex = rach_ConfigDedicated->cfra->resources.choice.ssb->ssb_ResourceList.list.array[cfra_ssb_resource_idx]->ra_PreambleIndex;
LOG_D(MAC, "In %s: selected RA preamble index %d for contention-free random access procedure\n", __FUNCTION__, prach_resources->ra_PreambleIndex);
}
if (rach_ConfigDedicated->ext1){
if (rach_ConfigDedicated->ext1->cfra_TwoStep_r16){
LOG_D(MAC, "In %s: 2-step RA type...\n", __FUNCTION__);
prach_resources->RA_TYPE = RA_2STEP;
}
}
} else { } else {
//////////* Contention-based RA preamble selection *////////// //////////* Contention-based RA preamble selection *//////////
// todo: // todo:
...@@ -440,6 +451,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -440,6 +451,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
prach_resources->RA_PREAMBLE_BACKOFF = 0; prach_resources->RA_PREAMBLE_BACKOFF = 0;
prach_resources->RA_SCALING_FACTOR_BI = 1; prach_resources->RA_SCALING_FACTOR_BI = 1;
prach_resources->RA_PCMAX = 0; // currently hardcoded to 0 prach_resources->RA_PCMAX = 0; // currently hardcoded to 0
prach_resources->RA_TYPE = RA_4STEP;
payload = (uint8_t*) &mac->CCCH_pdu.payload; payload = (uint8_t*) &mac->CCCH_pdu.payload;
......
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