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Commit f55bd83d authored by Masayuki HARADA's avatar Masayuki HARADA
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select scheduler by config file

parent dc76ce82
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Showing with 70 additions and 52 deletions
openair2/ENB_APP/enb_config.c
View file @ f55bd83d
...@@ -384,7 +384,17 @@ void RCconfig_macrlc() { ...@@ -384,7 +384,17 @@ void RCconfig_macrlc() {
printf("**************** RETURNED FROM configure_nfapi_vnf() vnf_port:%d\n", RC.mac[j]->eth_params_s.my_portc); printf("**************** RETURNED FROM configure_nfapi_vnf() vnf_port:%d\n", RC.mac[j]->eth_params_s.my_portc);
} else { // other midhaul } else { // other midhaul
AssertFatal(1==0,"MACRLC %d: %s unknown southbound midhaul\n",j,*(MacRLC_ParamList.paramarray[j][MACRLC_TRANSPORT_S_PREFERENCE_IDX].strptr)); AssertFatal(1==0,"MACRLC %d: %s unknown southbound midhaul\n",j,*(MacRLC_ParamList.paramarray[j][MACRLC_TRANSPORT_S_PREFERENCE_IDX].strptr));
} }
if (strcmp(*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr), "default") == 0){
global_scheduler_mode=SCHED_MODE_DEFAULT;
printf("sched mode = default %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}else if (strcmp(*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr), "fairRR") == 0){
global_scheduler_mode=SCHED_MODE_FAIR_RR;
printf("sched mode = fairRR %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}else{
global_scheduler_mode=SCHED_MODE_DEFAULT;
printf("sched mode = default %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}
}// j=0..num_inst }// j=0..num_inst
} else {// MacRLC_ParamList.numelt > 0 } else {// MacRLC_ParamList.numelt > 0
AssertFatal (0, AssertFatal (0,
......
openair2/ENB_APP/enb_paramdef.h
View file @ f55bd83d
...@@ -652,6 +652,7 @@ static int DEFENBS[] = {0}; ...@@ -652,6 +652,7 @@ static int DEFENBS[] = {0};
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTC "remote_s_portc" #define CONFIG_STRING_MACRLC_REMOTE_S_PORTC "remote_s_portc"
#define CONFIG_STRING_MACRLC_LOCAL_S_PORTD "local_s_portd" #define CONFIG_STRING_MACRLC_LOCAL_S_PORTD "local_s_portd"
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTD "remote_s_portd" #define CONFIG_STRING_MACRLC_REMOTE_S_PORTD "remote_s_portd"
#define CONFIG_STRING_MACRLC_SCHED_MODE "scheduler_mode"
/*-------------------------------------------------------------------------------------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------------------------------------------------------------------------------------*/
...@@ -676,6 +677,7 @@ static int DEFENBS[] = {0}; ...@@ -676,6 +677,7 @@ static int DEFENBS[] = {0};
{CONFIG_STRING_MACRLC_REMOTE_S_PORTC, NULL, 0, uptr:NULL, defintval:50020, TYPE_UINT, 0}, \ {CONFIG_STRING_MACRLC_REMOTE_S_PORTC, NULL, 0, uptr:NULL, defintval:50020, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_LOCAL_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \ {CONFIG_STRING_MACRLC_LOCAL_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_REMOTE_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \ {CONFIG_STRING_MACRLC_REMOTE_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_SCHED_MODE, NULL, 0, strptr:NULL, defintval:"default", TYPE_STRING, 0}, \
} }
#define MACRLC_CC_IDX 0 #define MACRLC_CC_IDX 0
#define MACRLC_TRANSPORT_N_PREFERENCE_IDX 1 #define MACRLC_TRANSPORT_N_PREFERENCE_IDX 1
...@@ -694,4 +696,5 @@ static int DEFENBS[] = {0}; ...@@ -694,4 +696,5 @@ static int DEFENBS[] = {0};
#define MACRLC_REMOTE_S_PORTC_IDX 14 #define MACRLC_REMOTE_S_PORTC_IDX 14
#define MACRLC_LOCAL_S_PORTD_IDX 15 #define MACRLC_LOCAL_S_PORTD_IDX 15
#define MACRLC_REMOTE_S_PORTD_IDX 16 #define MACRLC_REMOTE_S_PORTD_IDX 16
#define MACRLC_SCHED_MODE_IDX 17
/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
openair2/LAYER2/MAC/config.c
View file @ f55bd83d
...@@ -1021,6 +1021,7 @@ rrc_mac_config_req_eNB(module_id_t Mod_idP, ...@@ -1021,6 +1021,7 @@ rrc_mac_config_req_eNB(module_id_t Mod_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
} }
RC.mac[Mod_idP]->scheduler_mode = global_scheduler_mode;
return(0); return(0);
} }
......
openair2/LAYER2/MAC/defs.h
View file @ f55bd83d
...@@ -432,6 +432,12 @@ typedef enum { ...@@ -432,6 +432,12 @@ typedef enum {
CBA_RS /// random allocation CBA_RS /// random allocation
} CBA_POLICY; } CBA_POLICY;
/*!\brief scheduler mode */
typedef enum {
SCHED_MODE_DEFAULT = 0, /// default cheduler
SCHED_MODE_FAIR_RR /// fair raund robin
} SCHEDULER_MODES;
/*! \brief temporary struct for ULSCH sched */ /*! \brief temporary struct for ULSCH sched */
typedef struct { typedef struct {
...@@ -1138,6 +1144,9 @@ typedef struct eNB_MAC_INST_s { ...@@ -1138,6 +1144,9 @@ typedef struct eNB_MAC_INST_s {
time_stats_t schedule_pch; time_stats_t schedule_pch;
UE_free_list_t UE_free_list; UE_free_list_t UE_free_list;
/// for scheduling selection
SCHEDULER_MODES scheduler_mode;
} eNB_MAC_INST; } eNB_MAC_INST;
/* /*
......
openair2/LAYER2/MAC/eNB_scheduler.c
View file @ f55bd83d
...@@ -793,9 +793,21 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, ...@@ -793,9 +793,21 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
} }
#endif #endif
#ifdef UE_EXPANSION static int debug_flag=0;
memset(dlsch_ue_select, 0, sizeof(dlsch_ue_select)); void (*schedule_ulsch_p)(module_id_t module_idP, frame_t frameP, sub_frame_t subframe);
#endif void (*schedule_ue_spec_p)(module_id_t module_idP, frame_t frameP, sub_frame_t subframe, int *mbsfn_flag);
if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_DEFAULT){
schedule_ulsch_p = schedule_ulsch;
schedule_ue_spec_p = schedule_ue_spec;
}else if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
memset(dlsch_ue_select, 0, sizeof(dlsch_ue_select));
schedule_ulsch_p = schedule_ulsch_fairRR;
schedule_ue_spec_p = schedule_ue_spec_fairRR;
}
if(debug_flag==0){
LOG_E(MAC,"SCHED_MODE=%d\n",RC.mac[module_idP]->scheduler_mode);
debug_flag=1;
}
// This schedules MIB // This schedules MIB
if ((subframeP == 0) && (frameP & 3) == 0) if ((subframeP == 0) && (frameP & 3) == 0)
schedule_mib(module_idP, frameP, subframeP); schedule_mib(module_idP, frameP, subframeP);
...@@ -809,25 +821,14 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, ...@@ -809,25 +821,14 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
copy_ulreq(module_idP, frameP, subframeP); copy_ulreq(module_idP, frameP, subframeP);
// This schedules SRS in subframeP // This schedules SRS in subframeP
schedule_SRS(module_idP, frameP, subframeP); schedule_SRS(module_idP, frameP, subframeP);
#ifdef UE_EXPANSION
// This schedules ULSCH in subframeP (dci0)
schedule_ulsch_fairRR(module_idP, frameP, subframeP);
#else
// This schedules ULSCH in subframeP (dci0) // This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP, frameP, subframeP); schedule_ulsch_p(module_idP, frameP, subframeP);
#endif
// This schedules UCI_SR in subframeP // This schedules UCI_SR in subframeP
schedule_SR(module_idP, frameP, subframeP); schedule_SR(module_idP, frameP, subframeP);
// This schedules UCI_CSI in subframeP // This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP); schedule_CSI(module_idP, frameP, subframeP);
#ifdef UE_EXPANSION
// This schedules DLSCH in subframeP // This schedules DLSCH in subframeP
schedule_ue_spec_fairRR(module_idP, frameP, subframeP, mbsfn_status); schedule_ue_spec_p(module_idP, frameP, subframeP, mbsfn_status);
#else
// This schedules DLSCH in subframeP
schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
#endif
// Allocate CCEs for good after scheduling is done // Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++){ for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++){
......
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @ f55bd83d
...@@ -64,22 +64,7 @@ ...@@ -64,22 +64,7 @@
#include "SIMULATION/TOOLS/defs.h" // for taus #include "SIMULATION/TOOLS/defs.h" // for taus
#include "T.h" #include "T.h"
#ifdef UE_EXPANSION
enum SCH_UE_PRIORITY {
SCH_PRIORITY_NONE,
SCH_DL_SI,
SCH_DL_PAGING,
SCH_DL_MSG2,
SCH_DL_MSG4,
SCH_UL_PRACH,
SCH_UL_MSG3,
SCH_DL_RETRANS,
SCH_UL_RETRANS,
SCH_DL_FIRST,
SCH_UL_FIRST,
SCH_UL_INACTIVE
};
#endif
extern uint8_t nfapi_mode; extern uint8_t nfapi_mode;
extern int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req); extern int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req);
...@@ -596,9 +581,9 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP, ...@@ -596,9 +581,9 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
TX_req->segments[0].segment_data = TX_req->segments[0].segment_data =
cc[CC_idP].RAR_pdu.payload; cc[CC_idP].RAR_pdu.payload;
mac->TX_req[CC_idP].tx_request_body.number_of_pdus++; mac->TX_req[CC_idP].tx_request_body.number_of_pdus++;
#ifdef UE_EXPANSION if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select(CC_idP, SCH_DL_MSG2, 4, -1, ra->rnti); set_dl_ue_select_msg2(CC_idP, 4, -1, ra->rnti);
#endif }
} }
} }
...@@ -730,9 +715,9 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP, ...@@ -730,9 +715,9 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
TX_req->segments[0].segment_data = TX_req->segments[0].segment_data =
cc[CC_idP].RAR_pdu.payload; cc[CC_idP].RAR_pdu.payload;
mac->TX_req[CC_idP].tx_request_body.number_of_pdus++; mac->TX_req[CC_idP].tx_request_body.number_of_pdus++;
#ifdef UE_EXPANSION if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select(CC_idP, SCH_DL_MSG2, 4, -1, ra->rnti); set_dl_ue_select_msg2(CC_idP, 4, -1, ra->rnti);
#endif }
} // PDCCH CCE allocation is feasible } // PDCCH CCE allocation is feasible
} // Msg2 frame/subframe condition } // Msg2 frame/subframe condition
} // else BL/CE } // else BL/CE
...@@ -1218,9 +1203,9 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP, ...@@ -1218,9 +1203,9 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
UE_id), UE_id),
rrc_sdu_length); rrc_sdu_length);
} }
#ifdef UE_EXPANSION if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select(CC_idP, SCH_DL_MSG4, 4, UE_id, ra->rnti); set_dl_ue_select_msg4(CC_idP, 4, UE_id, ra->rnti);
#endif }
} // Msg4 frame/subframe } // Msg4 frame/subframe
} // msg4_mpdcch_repetition_count } // msg4_mpdcch_repetition_count
} // rach_resource_type > 0 } // rach_resource_type > 0
...@@ -1422,9 +1407,9 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP, ...@@ -1422,9 +1407,9 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
UE_id), UE_id),
rrc_sdu_length); rrc_sdu_length);
} }
#ifdef UE_EXPANSION if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select(CC_idP, SCH_DL_MSG4, 4, UE_id, ra->rnti); set_dl_ue_select_msg4(CC_idP, 4, UE_id, ra->rnti);
#endif }
} // CCE Allocation feasible } // CCE Allocation feasible
} // msg4 frame/subframe } // msg4 frame/subframe
} // else rach_resource_type } // else rach_resource_type
...@@ -1568,9 +1553,9 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP, ...@@ -1568,9 +1553,9 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP,
(cc->p_eNB == 1) ? 1 : 2, // transmission mode (cc->p_eNB == 1) ? 1 : 2, // transmission mode
1, // num_bf_prb_per_subband 1, // num_bf_prb_per_subband
1); // num_bf_vector 1); // num_bf_vector
#ifdef UE_EXPANSION if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select(CC_idP, SCH_DL_MSG4, 4, UE_id, ra->rnti); set_dl_ue_select_msg4(CC_idP, 4, UE_id, ra->rnti);
#endif }
} else } else
LOG_D(MAC, LOG_D(MAC,
"msg4 retransmission for rnti %x (round %d) fsf %d/%d CCE allocation failed!\n", "msg4 retransmission for rnti %x (round %d) fsf %d/%d CCE allocation failed!\n",
......
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
View file @ f55bd83d
...@@ -75,14 +75,20 @@ eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; ...@@ -75,14 +75,20 @@ eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#define DEBUG_HEADER_PARSING 1 #define DEBUG_HEADER_PARSING 1
//#define DEBUG_PACKET_TRACE 1 //#define DEBUG_PACKET_TRACE 1
void set_dl_ue_select(int CC_idP, enum SCH_UE_PRIORITY ue_priority,uint16_t nb_rb, int UE_id, rnti_t rnti) { void set_dl_ue_select_msg2(int CC_idP, uint16_t nb_rb, int UE_id, rnti_t rnti) {
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].ue_priority = ue_priority; dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].ue_priority = SCH_DL_MSG2;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].nb_rb = nb_rb;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].UE_id = UE_id;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].rnti = rnti;
dlsch_ue_select[CC_idP].ue_num++;
}
void set_dl_ue_select_msg4(int CC_idP, uint16_t nb_rb, int UE_id, rnti_t rnti) {
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].ue_priority = SCH_DL_MSG4;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].nb_rb = nb_rb; dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].nb_rb = nb_rb;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].UE_id = UE_id; dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].UE_id = UE_id;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].rnti = rnti; dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].rnti = rnti;
dlsch_ue_select[CC_idP].ue_num++; dlsch_ue_select[CC_idP].ue_num++;
} }
#if defined(PRE_SCD_THREAD) #if defined(PRE_SCD_THREAD)
inline uint16_t search_rbs_required(uint16_t mcs, uint16_t TBS,uint16_t NB_RB, uint16_t step_size){ inline uint16_t search_rbs_required(uint16_t mcs, uint16_t TBS,uint16_t NB_RB, uint16_t step_size){
uint16_t nb_rb,i_TBS,tmp_TBS; uint16_t nb_rb,i_TBS,tmp_TBS;
......
openair2/LAYER2/MAC/eNB_scheduler_fairRR.h
View file @ f55bd83d
...@@ -74,7 +74,8 @@ typedef struct { ...@@ -74,7 +74,8 @@ typedef struct {
} ULSCH_UE_SELECT; } ULSCH_UE_SELECT;
/* proto */ /* proto */
void set_dl_ue_select(int CC_idP, enum SCH_UE_PRIORITY ue_priority,uint16_t nb_rb, int UE_id, rnti_t rnti); void set_dl_ue_select_msg2(int CC_idP, uint16_t nb_rb, int UE_id, rnti_t rnti);
void set_dl_ue_select_msg4(int CC_idP, uint16_t nb_rb, int UE_id, rnti_t rnti);
void dlsch_scheduler_pre_ue_select_fairRR( void dlsch_scheduler_pre_ue_select_fairRR(
module_id_t module_idP, module_id_t module_idP,
......
openair2/LAYER2/MAC/extern.h
View file @ f55bd83d
...@@ -106,4 +106,5 @@ extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; ...@@ -106,4 +106,5 @@ extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif #endif
extern mac_rlc_am_muilist_t rlc_am_mui; extern mac_rlc_am_muilist_t rlc_am_mui;
extern SCHEDULER_MODES global_scheduler_mode;
#endif //DEF_H #endif //DEF_H
openair2/LAYER2/MAC/vars.h
View file @ f55bd83d
...@@ -143,4 +143,5 @@ DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2; ...@@ -143,4 +143,5 @@ DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E; DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
mac_rlc_am_muilist_t rlc_am_mui; mac_rlc_am_muilist_t rlc_am_mui;
SCHEDULER_MODES global_scheduler_mode;
#endif #endif
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