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Commit fc0a60e1 authored by Cedric Roux's avatar Cedric Roux
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Merge remote-tracking branch 'origin/develop_integration_w46' into develop 

Summary of changes:

- minor changes in RA code (functionality not changed, only notation)
- automatic indentation of some files (with indent -kr)
- bugfixes for TDD in RRU (IF4p5) and timing statistics of fronthaul and
  compression
parents 79458ae7 e190c4e2
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Showing with 20738 additions and 17404 deletions
openair1/PHY/LTE_TRANSPORT/if4_tools.c
View file @ fc0a60e1
......@@ -58,7 +58,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
uint16_t db_fulllength, db_halflength;
int slotoffsetF=0, blockoffsetF=0;
uint16_t *data_block=NULL, *i=NULL;
uint16_t *data_block=NULL, *i=NULL, *d=NULL;
IF4p5_header_t *packet_header=NULL;
eth_state_t *eth = (eth_state_t*) (ru->ifdevice.priv);
......@@ -138,23 +138,48 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
if (packet_type == IF4p5_PULFFT) {
uint16_t *rx0 = (uint16_t*) &rxdataF[0][blockoffsetF];
uint16_t *rx1 = (uint16_t*) &rxdataF[0][slotoffsetF];
for (symbol_id=fp->symbols_per_tti-nsym; symbol_id<fp->symbols_per_tti; symbol_id++) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SEND_IF4_SYMBOL, symbol_id );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_COMPR_IF, 1 );
for (element_id=0; element_id<db_halflength; element_id++) {
i = (uint16_t*) &rxdataF[0][blockoffsetF+element_id];
data_block[element_id] = ((uint16_t) lin2alaw_if4p5[*i]) | ((uint16_t)(lin2alaw_if4p5[*(i+1)]<<8));
i = (uint16_t*) &rxdataF[0][slotoffsetF+element_id];
data_block[element_id+db_halflength] = ((uint16_t) lin2alaw_if4p5[*i]) | ((uint16_t)(lin2alaw_if4p5[*(i+1)]<<8));
//if (element_id==0) LOG_I(PHY,"send_if4p5: symbol %d rxdata0 = (%d,%d)\n",symbol_id,*i,*(i+1));
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_COMPR_IF, 0 );
packet_header->frame_status &= ~(0x000f<<26);
packet_header->frame_status |= (symbol_id&0x000f)<<26;
start_meas(&ru->compression);
for (element_id=0; element_id<db_halflength; element_id+=8) {
i = (uint16_t*) &rx0[element_id];
d = (uint16_t*) &data_block[element_id];
d[0] = ((uint16_t) lin2alaw_if4p5[i[0]]) | ((uint16_t)(lin2alaw_if4p5[i[1]]<<8));
d[1] = ((uint16_t) lin2alaw_if4p5[i[2]]) | ((uint16_t)(lin2alaw_if4p5[i[3]]<<8));
d[2] = ((uint16_t) lin2alaw_if4p5[i[4]]) | ((uint16_t)(lin2alaw_if4p5[i[5]]<<8));
d[3] = ((uint16_t) lin2alaw_if4p5[i[6]]) | ((uint16_t)(lin2alaw_if4p5[i[7]]<<8));
d[4] = ((uint16_t) lin2alaw_if4p5[i[8]]) | ((uint16_t)(lin2alaw_if4p5[i[9]]<<8));
d[5] = ((uint16_t) lin2alaw_if4p5[i[10]]) | ((uint16_t)(lin2alaw_if4p5[i[11]]<<8));
d[6] = ((uint16_t) lin2alaw_if4p5[i[12]]) | ((uint16_t)(lin2alaw_if4p5[i[13]]<<8));
d[7] = ((uint16_t) lin2alaw_if4p5[i[14]]) | ((uint16_t)(lin2alaw_if4p5[i[15]]<<8));
i = (uint16_t*) &rx1[element_id];
d = (uint16_t*) &data_block[element_id+db_halflength];
d[0] = ((uint16_t) lin2alaw_if4p5[i[0]]) | ((uint16_t)(lin2alaw_if4p5[i[1]]<<8));
d[1] = ((uint16_t) lin2alaw_if4p5[i[2]]) | ((uint16_t)(lin2alaw_if4p5[i[3]]<<8));
d[2] = ((uint16_t) lin2alaw_if4p5[i[4]]) | ((uint16_t)(lin2alaw_if4p5[i[5]]<<8));
d[3] = ((uint16_t) lin2alaw_if4p5[i[6]]) | ((uint16_t)(lin2alaw_if4p5[i[7]]<<8));
d[4] = ((uint16_t) lin2alaw_if4p5[i[8]]) | ((uint16_t)(lin2alaw_if4p5[i[9]]<<8));
d[5] = ((uint16_t) lin2alaw_if4p5[i[10]]) | ((uint16_t)(lin2alaw_if4p5[i[11]]<<8));
d[6] = ((uint16_t) lin2alaw_if4p5[i[12]]) | ((uint16_t)(lin2alaw_if4p5[i[13]]<<8));
d[7] = ((uint16_t) lin2alaw_if4p5[i[14]]) | ((uint16_t)(lin2alaw_if4p5[i[15]]<<8));
}
stop_meas(&ru->compression);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_COMPR_IF, 0 );
packet_header->frame_status &= ~(0x000f<<26);
packet_header->frame_status |= (symbol_id&0x000f)<<26;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_IF, 1 );
start_meas(&ru->transport);
if ((ru->ifdevice.trx_write_func(&ru->ifdevice,
symbol_id,
&tx_buffer,
......@@ -163,6 +188,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
IF4p5_PULFFT)) < 0) {
perror("ETHERNET write for IF4p5_PULFFT\n");
}
stop_meas(&ru->transport);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_IF, 0 );
slotoffsetF += fp->ofdm_symbol_size;
blockoffsetF += fp->ofdm_symbol_size;
......@@ -181,7 +207,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
} else if (packet_type >= IF4p5_PRACH &&
packet_type <= IF4p5_PRACH+4) {
// FIX: hard coded prach samples length
LOG_D(PHY,"IF4p5_PRACH: frame %d, subframe %d\n",frame,subframe);
LOG_D(PHY,"IF4p5_PRACH: frame %d, subframe %d,packet type %x\n",frame,subframe,packet_type);
db_fulllength = PRACH_NUM_SAMPLES;
if (eth->flags == ETH_RAW_IF4p5_MODE) {
......@@ -222,6 +248,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
packet_type)) < 0) {
perror("ETHERNET write for IF4p5_PRACH\n");
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_IF, 0 );
} else {
AssertFatal(1==0, "send_IF4p5 - Unknown packet_type %x", packet_type);
......@@ -283,7 +310,7 @@ void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint
*subframe = ((packet_header->frame_status)>>22)&0x000f;
*packet_type = packet_header->sub_type;
LOG_D(PHY,"recv_IF4p5: Frame %d, Subframe %d: packet_type %x\n",*frame,*subframe,*packet_type);
if (*packet_type == IF4p5_PDLFFT) {
*symbol_number = ((packet_header->frame_status)>>26)&0x000f;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_RECV_IF4_SYMBOL, *symbol_number );
......@@ -313,7 +340,6 @@ void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint
slotoffsetF = (*symbol_number)*(fp->ofdm_symbol_size);
blockoffsetF = slotoffsetF + fp->ofdm_symbol_size - db_halflength;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_DECOMPR_IF, 1 );
if (ru->idx==0) LOG_D(PHY,"UL_IF4p5: CC_id %d : frame %d, subframe %d, symbol %d\n",ru->idx,*frame,*subframe,*symbol_number);
for (element_id=0; element_id<db_halflength; element_id++) {
i = (uint16_t*) &rxdataF[0][blockoffsetF+element_id];
*i = alaw2lin_if4p5[ (data_block[element_id] & 0xff) ];
......@@ -353,8 +379,8 @@ void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint
PRACH_BLOCK_SIZE_BYTES);
}
//LOG_D(PHY,"PRACH_IF4p5: CC_id %d : frame %d, subframe %d => %d dB\n",ru->idx,*frame,*subframe,
// dB_fixed(signal_energy((int*)&prach_rxsigF[0][0],839)));
LOG_D(PHY,"PRACH_IF4p5: CC_id %d : frame %d, subframe %d => %d dB\n",ru->idx,*frame,*subframe,
dB_fixed(signal_energy((int*)&prach_rxsigF[0][0],839)));
for (idx=0;idx<ru->num_eNB;idx++) ru->wakeup_prach_eNB(ru->eNB_list[idx],ru,*frame,*subframe);
} else if (*packet_type == IF4p5_PULTICK) {
......
openair1/PHY/LTE_TRANSPORT/if4_tools.h
View file @ fc0a60e1
......@@ -39,11 +39,11 @@
#define IF4p5_PULFFT 0x0019
#define IF4p5_PDLFFT 0x0020
#define IF4p5_PRACH 0x0021
#define IF4p5_PRACH_BR_CE0 0x0021
#define IF4p5_PRACH_BR_CE1 0x0022
#define IF4p5_PRACH_BR_CE2 0x0023
#define IF4p5_PRACH_BR_CE3 0x0024
#define IF4p5_PULTICK 0x0025
#define IF4p5_PRACH_BR_CE0 0x0022
#define IF4p5_PRACH_BR_CE1 0x0023
#define IF4p5_PRACH_BR_CE2 0x0024
#define IF4p5_PRACH_BR_CE3 0x0025
#define IF4p5_PULTICK 0x0026
struct IF4p5_header {
/// Type
......
openair1/PHY/defs.h
View file @ fc0a60e1
......@@ -756,6 +756,10 @@ typedef struct RU_t_s{
time_stats_t rx_fhaul;
/// Timing statistics (TX Fronthaul + Compression)
time_stats_t tx_fhaul;
/// Timong statistics (Compression)
time_stats_t compression;
/// Timing statistics (Fronthaul transport)
time_stats_t transport;
/// RX and TX buffers for precoder output
RU_COMMON common;
/// beamforming weight vectors per eNB
......
openair2/LAYER2/MAC/config.c
View file @ fc0a60e1
This diff is collapsed.
openair2/LAYER2/MAC/defs.h
View file @ fc0a60e1
This diff is collapsed.
openair2/LAYER2/MAC/eNB_scheduler.c
View file @ fc0a60e1
This diff is collapsed.
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @ fc0a60e1
This diff is collapsed.
openair2/LAYER2/MAC/eNB_scheduler_bch.c
View file @ fc0a60e1
This diff is collapsed.
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ fc0a60e1
This diff is collapsed.
openair2/LAYER2/MAC/eNB_scheduler_mch.c
View file @ fc0a60e1
This diff is collapsed.
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ fc0a60e1
This diff is collapsed.
openair2/LAYER2/MAC/extern.h
View file @ fc0a60e1
......@@ -35,7 +35,7 @@
#ifdef USER_MODE
//#include "stdio.h"
#endif //USER_MODE
#endif //USER_MODE
#include "PHY/defs.h"
#include "defs.h"
......@@ -56,8 +56,8 @@ extern UE_RRC_INST *UE_rrc_inst;
extern UE_MAC_INST *UE_mac_inst;
extern eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
extern eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
extern eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
extern eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
......@@ -79,28 +79,26 @@ extern uint32_t RRC_CONNECTION_FLAG;
extern uint8_t rb_table[34];
extern DCI0_5MHz_TDD_1_6_t UL_alloc_pdu;
extern DCI0_5MHz_TDD_1_6_t UL_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t RA_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t DLSCH_alloc_pdu1A;
extern DCI1A_5MHz_TDD_1_6_t BCCH_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t RA_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t DLSCH_alloc_pdu1A;
extern DCI1A_5MHz_TDD_1_6_t BCCH_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t CCCH_alloc_pdu;
extern DCI1_5MHz_TDD_t DLSCH_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t CCCH_alloc_pdu;
extern DCI1_5MHz_TDD_t DLSCH_alloc_pdu;
extern DCI0_5MHz_FDD_t UL_alloc_pdu_fdd;
extern DCI0_5MHz_FDD_t UL_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t DLSCH_alloc_pdu1A_fdd;
extern DCI1A_5MHz_FDD_t RA_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t BCCH_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t DLSCH_alloc_pdu1A_fdd;
extern DCI1A_5MHz_FDD_t RA_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t BCCH_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t CCCH_alloc_pdu_fdd;
extern DCI1_5MHz_FDD_t DLSCH_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t CCCH_alloc_pdu_fdd;
extern DCI1_5MHz_FDD_t DLSCH_alloc_pdu_fdd;
extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu1;
extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
extern DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
#endif //DEF_H
#endif //DEF_H
openair2/LAYER2/MAC/flexran_agent_mac_proto.h
View file @ fc0a60e1
......@@ -17,7 +17,7 @@
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
*/
/*! \file flexran_agent_mac_proto.h
* \brief MAC functions for FlexRAN agent
......@@ -39,150 +39,178 @@
/*
* slice specific scheduler
*/
typedef void (*slice_scheduler)(module_id_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
typedef void (*slice_scheduler) (module_id_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* top level flexran scheduler used by the eNB scheduler
*/
void flexran_schedule_ue_spec_default(mid_t mod_id,
uint32_t frame,
void flexran_schedule_ue_spec_default(mid_t mod_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* slice specific scheduler for embb
*/
void
flexran_schedule_ue_spec_embb(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_embb(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* slice specific scheduler for urllc
*/
void
flexran_schedule_ue_spec_urllc(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_urllc(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* slice specific scheduler for mmtc
*/
void
flexran_schedule_ue_spec_mmtc(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_mmtc(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* slice specific scheduler for best effort traffic
*/
void
flexran_schedule_ue_spec_be(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_be(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* common flexran scheduler function
*/
void
flexran_schedule_ue_spec_common(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage,
int total_rbs);
int flexran_slice_member(int UE_id,
int slice_id);
int flexran_slice_maxmcs(int slice_id) ;
void _store_dlsch_buffer (module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframeP);
void _assign_rbs_required (module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframe,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES],
int min_rb_unit[MAX_NUM_CCs]);
void _dlsch_scheduler_pre_processor (module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframeP,
int N_RBG[MAX_NUM_CCs],
int *mbsfn_flag);
void _dlsch_scheduler_pre_processor_reset (int module_idP,
int UE_id,
uint8_t CC_id,
int frameP,
int subframeP,
int N_RBG,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
void _dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
int UE_id,
uint8_t CC_id,
int N_RBG,
int transmission_mode,
int min_rb_unit,
uint8_t N_RB_DL,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
flexran_schedule_ue_spec_common(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
int flexran_slice_member(int UE_id, int slice_id);
int flexran_slice_maxmcs(int slice_id);
void _store_dlsch_buffer(module_id_t Mod_id,
int slice_id,
frame_t frameP, sub_frame_t subframeP);
void _assign_rbs_required(module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframe,
uint16_t
nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_allowed_slice[MAX_NUM_CCs]
[MAX_NUM_SLICES], int min_rb_unit[MAX_NUM_CCs]);
void _dlsch_scheduler_pre_processor(module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframeP,
int N_RBG[MAX_NUM_CCs],
int *mbsfn_flag);
void _dlsch_scheduler_pre_processor_reset(int module_idP,
int UE_id,
uint8_t CC_id,
int frameP,
int subframeP,
int N_RBG,
uint16_t
nb_rbs_required[MAX_NUM_CCs]
[NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_required_remaining
[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_allowed_slice[MAX_NUM_CCs]
[MAX_NUM_SLICES],
unsigned char
rballoc_sub[MAX_NUM_CCs]
[N_RBG_MAX],
unsigned char
MIMO_mode_indicator[MAX_NUM_CCs]
[N_RBG_MAX]);
void _dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
int UE_id,
uint8_t CC_id,
int N_RBG,
int transmission_mode,
int min_rb_unit,
uint8_t N_RB_DL,
uint16_t
nb_rbs_required[MAX_NUM_CCs]
[NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_required_remaining
[MAX_NUM_CCs]
[NUMBER_OF_UE_MAX],
unsigned char
rballoc_sub[MAX_NUM_CCs]
[N_RBG_MAX],
unsigned char
MIMO_mode_indicator
[MAX_NUM_CCs][N_RBG_MAX]);
/*
* Default scheduler used by the eNB agent
*/
void flexran_schedule_ue_spec_default(mid_t mod_id, uint32_t frame, uint32_t subframe,
int *mbsfn_flag, Protocol__FlexranMessage **dl_info);
void flexran_schedule_ue_spec_default(mid_t mod_id, uint32_t frame,
uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* Data plane function for applying the DL decisions of the scheduler
*/
void flexran_apply_dl_scheduling_decisions(mid_t mod_id, uint32_t frame, uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage *dl_scheduling_info);
void flexran_apply_dl_scheduling_decisions(mid_t mod_id, uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage *
dl_scheduling_info);
/*
* Data plane function for applying the UE specific DL decisions of the scheduler
*/
void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id, uint32_t frame, uint32_t subframe, int *mbsfn_flag,
uint32_t n_dl_ue_data, Protocol__FlexDlData **dl_ue_data);
void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
uint32_t n_dl_ue_data,
Protocol__FlexDlData **
dl_ue_data);
/*
* Data plane function for filling the DCI structure
*/
void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti, Protocol__FlexDlDci *dl_dci);
void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
Protocol__FlexDlDci * dl_dci);
#endif
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue_remote.h
View file @ fc0a60e1
......@@ -17,7 +17,7 @@
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
*/
/*! \file flexran_agent_scheduler_dlsch_ue_remote.h
* \brief Local stub for remote scheduler used by the controller
......@@ -46,8 +46,8 @@
#define SCHED_AHEAD_SUBFRAMES 20
typedef struct dl_mac_config_element_s {
Protocol__FlexranMessage *dl_info;
TAILQ_ENTRY(dl_mac_config_element_s) configs;
Protocol__FlexranMessage *dl_info;
TAILQ_ENTRY(dl_mac_config_element_s) configs;
} dl_mac_config_element_t;
TAILQ_HEAD(DlMacConfigHead, dl_mac_config_element_s);
......@@ -55,8 +55,9 @@ TAILQ_HEAD(DlMacConfigHead, dl_mac_config_element_s);
/*
* Default scheduler used by the eNB agent
*/
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subframe,
int *mbsfn_flag, Protocol__FlexranMessage **dl_info);
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame,
uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
// Find the difference in subframes from the given subframe
......
openair2/LAYER2/MAC/l1_helpers.c
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openair2/LAYER2/MAC/lte_transport_init.c
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openair2/LAYER2/MAC/main.c
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openair2/LAYER2/MAC/openair2_proc.c deleted 100644 → 0
View file @ 79458ae7
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openair2/LAYER2/MAC/pre_processor.c
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openair2/LAYER2/MAC/proto.h
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openair2/LAYER2/MAC/ra_procedures.c
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openair2/LAYER2/MAC/rar_tools.c
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openair2/LAYER2/MAC/ue_procedures.c
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openair2/LAYER2/MAC/vars.h
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targets/ARCH/ETHERNET/USERSPACE/LIB/eth_udp.c
View file @ fc0a60e1
......@@ -235,7 +235,8 @@ int trx_eth_write_udp_IF4p5(openair0_device *device, openair0_timestamp timestam
packet_size = UDP_IF4p5_PULFFT_SIZE_BYTES(nblocks);
} else if (flags == IF4p5_PULTICK) {
packet_size = UDP_IF4p5_PULTICK_SIZE_BYTES;
} else if (flags == IF4p5_PRACH) {
} else if ((flags >= IF4p5_PRACH)&&
(flags <= (IF4p5_PRACH+4))) {
packet_size = UDP_IF4p5_PRACH_SIZE_BYTES;
} else {
printf("trx_eth_write_udp_IF4p5: unknown flags %d\n",flags);
......
targets/RT/USER/lte-ru.c
View file @ fc0a60e1
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