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Commit 2194bc85 authored by Wolfgang A. Mozart's avatar Wolfgang A. Mozart
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fixed timing issue for phy-test scheduling UL. UL is broken after first execution of dlsch decoding

parent bf601fce
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Showing with 16 additions and 15 deletions
cmake_targets/CMakeLists.txt
View file @ 2194bc85
......@@ -597,7 +597,7 @@ add_boolean_option(NAS_ADDRESS_FIX False "specific to oaisim: for nasmesh driver
add_boolean_option(NAS_NETLINK False "???? Must be True to compile nasmesh driver without rtai")
add_boolean_option(OAISIM False "specific to oaisim")
add_boolean_option(OAI_NW_DRIVER_USE_NETLINK True "????")
add_boolean_option(EMULATE_RF False "allows to run lte-softmodem without HW")
add_boolean_option(EMULATE_RF True "allows to run lte-softmodem without HW")
add_boolean_option(USE_MME False "this flag is used only one time in lte-softmodem.c")
add_list_string_option(PACKAGE_NAME "NotDefined" "As per attribute name")
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ 2194bc85
......@@ -2507,7 +2507,7 @@ void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame
else ulsch->harq_processes[harq_pid]->round++;
ulsch->rnti = ulsch_pdu->ulsch_pdu_rel8.rnti;
LOG_D(PHY,"Filling ULSCH %x (UE_id %d) (new_ulsch %d) for Frame %d, Subframe %d : harq_pid %d, first_rb %d, nb_rb %d, rvidx %d, Qm %d, TBS %d, round %d \n",
LOG_I(PHY,"Filling ULSCH %x (UE_id %d) (new_ulsch %d) for Frame %d, Subframe %d : harq_pid %d, first_rb %d, nb_rb %d, rvidx %d, Qm %d, TBS %d, round %d \n",
ulsch->rnti,
UE_id,
new_ulsch,
......
openair1/SCHED/fapi_l1.c
View file @ 2194bc85
......@@ -493,7 +493,7 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
if (ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE) {
AssertFatal((UE_id = find_ulsch(ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
"No existing UE ULSCH for rnti %x\n",rel8->rnti);
LOG_D(PHY,"Applying UL config for UE %d, rnti %x for frame %d, subframe %d\n",
LOG_I(PHY,"Applying UL config for UE %d, rnti %x for frame %d, subframe %d\n",
UE_id,rel8->rnti,frame,subframe);
fill_ulsch(eNB,&ul_config_pdu->ulsch_pdu,frame,subframe);
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ 2194bc85
......@@ -1301,8 +1301,8 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
ulsch = eNB->ulsch[i];
ulsch_harq = ulsch->harq_processes[harq_pid];
if (ulsch->rnti>0) LOG_I(PHY,"Frame %d, subframe %d: PUSCH procedures, harq_pid %d, UE %d/%x\n",
frame,subframe,harq_pid,i,ulsch->rnti);
if (ulsch->rnti>0) LOG_I(PHY,"Frame %d, subframe %d: PUSCH procedures, harq_pid %d, UE %d/%x, status %d, harq_frame %d, harq_subframe %d ulsch_handled %d\n",
frame,subframe,harq_pid,i,ulsch->rnti,ulsch_harq->status,ulsch_harq->frame,ulsch_harq->subframe, ulsch_harq->handled);
if ((ulsch) &&
(ulsch->rnti>0) &&
......
openair2/LAYER2/MAC/eNB_scheduler_phytest.c
View file @ 2194bc85
......@@ -210,9 +210,9 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
UE_TEMPLATE *UE_template;
UE_sched_ctrl *UE_sched_ctrl;
int sched_frame=frameP;
int sched_subframeP = (subframeP+4)%10;
int sched_subframe = (subframeP+4)%10;
if (sched_subframeP<subframeP) sched_frame++;
if (sched_subframe<subframeP) sched_frame++;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
......@@ -222,7 +222,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
ul_config_pdu = &ul_req->ul_config_pdu_list[0];
eNB->UL_req[CC_id].sfn_sf = (frameP<<4) + subframeP;
eNB->UL_req[CC_id].sfn_sf = (sched_frame<<4) + sched_subframe;
eNB->HI_DCI0_req[CC_id].sfn_sf = (frameP<<4)+subframeP;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
......@@ -237,8 +237,9 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
UE_template = &UE_list->UE_template[CC_id][UE_id];
UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = subframe2harqpid(&cc[CC_id],sched_frame,sched_subframeP);
harq_pid = subframe2harqpid(&cc[CC_id],sched_frame,sched_subframe);
LOG_I(MAC,"Scheduling for frame %d, subframe %d => harq_pid %d\n",sched_frame,sched_subframe,harq_pid);
RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP] = UE_template->ul_total_buffer;
printf("////////////////////////////////////*************************ul_total_buffer = %d\n",UE_template->ul_total_buffer);
......@@ -295,14 +296,14 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = first_rb[CC_id];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block = N_RB_UL-1;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block = 20;//N_RB_UL-1;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.mcs_1 = mcs;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cyclic_shift_2_for_drms = cshift;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.frequency_hopping_enabled_flag = 0;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.new_data_indication_1 = ndi;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.tpc = tpc;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cqi_csi_request = cqi_req;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframeP];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframe];
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
......@@ -317,7 +318,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
eNB->ul_handle,
rnti,
first_rb[CC_id], // resource_block_start
N_RB_UL-1, // number_of_resource_blocks
20,//N_RB_UL-1, // number_of_resource_blocks
mcs,
cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
......@@ -355,4 +356,4 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
} // loop of CC_id
}
\ No newline at end of file
}
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.50PRB.usrpb210.conf
View file @ 2194bc85
......@@ -151,9 +151,9 @@ eNBs =
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.19/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.19/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
......
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