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Commit 3506e52f authored by Khodr Saaifan's avatar Khodr Saaifan Committed by Thomas Schlichter
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Implementing TM4 DCI format2 scheduling + Fix PUCCH decoding of format1/ format1a (SR/Ack)

parent 0dda7569
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Showing with 326 additions and 107 deletions
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ 3506e52f
......@@ -885,6 +885,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
uint8_t rv=0,rv1=0,rv2=0;
uint8_t rah=0;
uint8_t TPC=0;
uint8_t Nl_layer=1;//sfn
uint8_t TB0_active=0,TB1_active=0;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
......@@ -1553,9 +1554,15 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0=dlsch[0];
dlsch0->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch0_harq->rvidx = rv1;
dlsch0_harq->status = ACTIVE;
/*sfn:
* TBS size, mcs, and Harq status are the same for 4 rounds
*/
if (dlsch0_harq->round == 0) {
dlsch0_harq->status = ACTIVE;
dlsch0_harq->mcs = mcs1;
}
dlsch0_harq->codeword = 0;
dlsch1=NULL;
dlsch1_harq = NULL;
......@@ -1660,7 +1667,12 @@ int generate_eNB_dlsch_params_from_dci(int frame,
}
} else if ((dlsch0 != NULL) && (dlsch1 == NULL)) { // only CW 0 active
dlsch0_harq->dl_power_off = 1;
dlsch0_harq->TBS= TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
if (dlsch0_harq->round == 0) {
// MCS and TBS don't change across HARQ rounds
dlsch0_harq->TBS= TBStable[get_I_TBS(dlsch0_harq->mcs)][(Nl_layer*dlsch0_harq->nb_rb)-1];
}
switch (tpmi) {
case 0 :
dlsch0_harq->mimo_mode = ALAMOUTI;
......
openair1/PHY/LTE_TRANSPORT/pucch.c
View file @ 3506e52f
......@@ -38,6 +38,8 @@
#include "T.h"
//SFN
#include "sudas_tm4.h"
//uint8_t ncs_cell[20][7];
//#define DEBUG_PUCCH_TX
//#define DEBUG_PUCCH_RX
......@@ -1786,7 +1788,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
LTE_eNB_COMMON *common_vars = &eNB->common_vars;
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
// PUCCH_CONFIG_DEDICATED *pucch_config_dedicated = &eNB->pucch_config_dedicated[UE_id];
int8_t sigma2_dB = eNB->measurements[0].n0_subband_power_tot_dB[0]-10;
int8_t sigma2_dB = eNB->measurements[0].n0_subband_power_tot_dB[0];//-10;
uint32_t *Po_PUCCH = &(eNB->UE_stats[UE_id].Po_PUCCH);
int32_t *Po_PUCCH_dBm = &(eNB->UE_stats[UE_id].Po_PUCCH_dBm);
uint32_t *Po_PUCCH1_below = &(eNB->UE_stats[UE_id].Po_PUCCH1_below);
......@@ -1812,7 +1814,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
uint8_t deltaPUCCH_Shift = frame_parms->pucch_config_common.deltaPUCCH_Shift;
uint8_t NRB2 = frame_parms->pucch_config_common.nRB_CQI;
uint8_t Ncs1_div_deltaPUCCH_Shift = frame_parms->pucch_config_common.nCS_AN;
uint8_t Ncs1_div_deltaPUCCH_Shift = (frame_parms->pucch_config_common.nCS_AN)/deltaPUCCH_Shift;
uint32_t u0 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1]) % 30;
uint32_t u1 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)]) % 30;
......@@ -2020,12 +2022,12 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
for (n=0; n<12; n++) {
// this is r_uv^alpha(n)
tmp_re = (int16_t)(((int32_t)alpha_re[alpha_ind] * ul_ref_sigs[u][v][0][n<<1] - (int32_t)alpha_im[alpha_ind] * ul_ref_sigs[u][v][0][1+(n<<1)])>>15);
tmp_im = (int16_t)(((int32_t)alpha_re[alpha_ind] * ul_ref_sigs[u][v][0][1+(n<<1)] + (int32_t)alpha_im[alpha_ind] * ul_ref_sigs[u][v][0][n<<1])>>15);
tmp_re = (int16_t)((((int32_t)(alpha_re[alpha_ind] * ul_ref_sigs[u][v][0][n<<1]) - (int32_t)(alpha_im[alpha_ind] * ul_ref_sigs[u][v][0][1+(n<<1)])))>>15);
tmp_im = (int16_t)((((int32_t)(alpha_re[alpha_ind] * ul_ref_sigs[u][v][0][1+(n<<1)]) + (int32_t)(alpha_im[alpha_ind] * ul_ref_sigs[u][v][0][n<<1])))>>15);
// this is S(ns)*w_noc(m)*r_uv^alpha(n)
zptr[n<<1] = (tmp_re*W_re - tmp_im*W_im)>>15;
zptr[1+(n<<1)] = -(tmp_re*W_im + tmp_im*W_re)>>15;
zptr[n<<1] = (int16_t)(((int32_t)(tmp_re*W_re) - (int32_t)(tmp_im*W_im))>>15);
zptr[1+(n<<1)] = (int16_t)(((int32_t)(-tmp_re*W_im) + (int32_t)(-tmp_im*W_re))>>15);
#ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH subframe %d z(%d,%d) => %d,%d, alpha(%d) => %d,%d\n",subframe,l,n,zptr[n<<1],zptr[(n<<1)+1],
......@@ -2042,10 +2044,15 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
n_oc =n_oc1;
} // ns
rem = ((((deltaPUCCH_Shift*Ncs1_div_deltaPUCCH_Shift)>>3)&7)>0) ? 1 : 0;
rem = ((((deltaPUCCH_Shift*Ncs1_div_deltaPUCCH_Shift))&7)>0) ? 1 : 0;
m = (n1_pucch < thres) ? NRB2 : (((n1_pucch-thres)/(12*c/deltaPUCCH_Shift))+NRB2+((deltaPUCCH_Shift*Ncs1_div_deltaPUCCH_Shift)>>3)+rem);
sudas_LOG_MAC(debug_sudas_LOG_MAC,"format %d DemAllocat PUCCH m %d nprime0 %d nprime1 %d n_oc0 %d n_oc1 %d\n",fmt,m,nprime0,nprime1,n_oc0,n_oc1);
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
#ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH: m %d\n",m);
#endif
......@@ -2077,8 +2084,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
if (re_offset==frame_parms->ofdm_symbol_size)
re_offset = 0;
rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15);
rxcomp[aa][j] = (int16_t)((int32_t)(rxptr[re_offset<<1]*zptr[j])>>15)- (int16_t)((int32_t)(rxptr[1+(re_offset<<1)]*zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((int32_t)(rxptr[re_offset<<1]*zptr[1+j])>>15) + (int16_t)((int32_t)(rxptr[1+(re_offset<<1)]*zptr[j])>>15);
#ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH subframe %d (%d,%d,%d,%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,i,re_offset,m,j,
......@@ -2113,8 +2120,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
cfo = (frame_parms->Ncp==0) ? &cfo_pucch_np[14*phase] : &cfo_pucch_ep[12*phase];
for (l=0; l<(nsymb>>1); l++) {
stat_re += (((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15))/nsymb;
stat_im += (((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15))/nsymb;
stat_re += ((int16_t)((int32_t)(rxcomp[aa][off]*cfo[l<<1])>>15) - (int16_t)((int32_t)(rxcomp[aa][1+off]*cfo[1+(l<<1)])>>15));
stat_im += ((int16_t)((int32_t)(rxcomp[aa][off]*cfo[1+(l<<1)])>>15) + (int16_t)((int32_t)(rxcomp[aa][1+off]*cfo[(l<<1)])>>15));
off+=2;
......@@ -2127,8 +2134,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
}
for (l2=0,l=(nsymb>>1); l<(nsymb-1); l++,l2++) {
stat_re += (((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15))/nsymb;
stat_im += (((rxcomp[aa][off]*(int32_t)cfo[1+(l2<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l2<<1)])>>15))/nsymb;
stat_re += ((int16_t)((int32_t)(rxcomp[aa][off]*cfo[l2<<1])>>15) - (int16_t)((int32_t)(rxcomp[aa][1+off]*cfo[1+(l2<<1)])>>15));
stat_im += ((int16_t)((int32_t)(rxcomp[aa][off]*cfo[1+(l2<<1)])>>15) + (int16_t)((int32_t)(rxcomp[aa][1+off]*cfo[(l2<<1)])>>15));
off+=2;
#ifdef DEBUG_PUCCH_RX
......@@ -2140,7 +2147,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
}
stat += ((stat_re*stat_re) + (stat_im*stat_im));
stat += ((stat_re*stat_re) + (stat_im*stat_im))/nsymb;
} //re
} // aa
......@@ -2155,7 +2162,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
// stat_max *= nsymb; // normalize to energy per symbol
// stat_max /= (frame_parms->N_RB_UL*12); //
stat_max /= (nsymb*12);
stat_max /= (12);
#ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max);
#endif
......@@ -2180,9 +2187,25 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
}
*/
sudas_LOG_MAC(debug_sudas_LOG_MAC,"dB_fixed(stat_max) %d pucch1_thres %d sigma2_dB %d\n",dB_fixed(stat_max),pucch1_thres,sigma2_dB);
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
// This is a moving average of the PUCCH1 statistics conditioned on being above or below the threshold
if (sigma2_dB<(dB_fixed(stat_max)-pucch1_thres)) {
/*SFN:
*
sigma2_dB= eNB->measurements[0].n0_subband_power_tot_dB[0]-10; where
measurements->n0_power_tot += measurements->n0_power[aarx];
is not correct.
n0_power_tot denotes received noise variance for two antennas measured by sounding reference signal.
n0_power_tot=N_aarx*[(N_0*df)*N_FFT]*N_F*Rx_Gain*(2^15)^2 which computed in time domain
In the absence of PUCCH signal, stat_max will hold the received power of noise computed in frequency after DFT
stat_max=N_aarx*[(N_0*df)*N_FFT]*N_F*Rx_Gain*(2^15)^2
In the presence of PUCCH signal
stat_max=H_rx^2*N_FFT*(2^15)^2+N_aarx*[(N_0*df)*N_FFT]*N_F*Rx_Gain*(2^15)^2
*/
if ((dB_fixed(stat_max)-10)>sigma2_dB){//pucch1_thres
*payload = 1;
*Po_PUCCH1_above = ((*Po_PUCCH1_above<<9) + (stat_max<<9)+1024)>>10;
//LOG_I(PHY,"[eNB] PUCCH fmt1: stat_max : %d, sigma2_dB %d (%d, %d), phase_max : %d\n",dB_fixed(stat_max),sigma2_dB,eNB->PHY_measurements_eNB[0].n0_power_tot_dBm,pucch1_thres,phase_max);
......@@ -2296,6 +2319,11 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
dB_fixed(*Po_PUCCH));
*/
// Do detection now
sudas_LOG_MAC(debug_sudas_LOG_MAC,"dB_fixed(stat_max) %d pucch1_thres %d sigma2_dB %d\n",dB_fixed(stat_max),pucch1_thres,sigma2_dB);
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
if (sigma2_dB<(dB_fixed(stat_max)-pucch1_thres)) {//
......@@ -2309,11 +2337,11 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
chest_im=0;
cfo = (frame_parms->Ncp==0) ? &cfo_pucch_np[14*phase_max] : &cfo_pucch_ep[12*phase_max];
// channel estimate for first slot
// channel estimate for first slot select DMRS SCs
for (l=2; l<(nsymb>>1)-2; l++) {
off=(re<<1) + (24*l);
chest_re += (((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15))/chL;
chest_im += (((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15))/chL;
chest_im += (((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15))/chL;
}
#ifdef DEBUG_PUCCH_RX
......
openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c
View file @ 3506e52f
......@@ -1585,12 +1585,12 @@ static int ri_disply_cntr=0;
// printf("before cqi c[%d] = %p\n",0,ulsch_harq->c[0]);
ulsch_harq->cqi_crc_status = 0;
if (Q_CQI>0) {
ri_disply_cntr++;
/*ri_disply_cntr++;
if (ri_disply_cntr>10){
ri_disply_cntr=0;
//show log
LOG_I(PHY,"Qprime_RI %d [SFN CQI reports %d] O_RI %d o_RI[0]%d\n",Qprime_RI,ri_disply_cntr,ulsch_harq->O_RI,ulsch_harq->o_RI[0]);
}
}*/
//sudas_LOG_PHY(debug_sudas_LOG_PHY,"[SFN]ulsch_harq->O_RI %d ulsch_harq->o_RI[0]%d\n",ulsch_harq->O_RI,ulsch_harq->o_RI[0]);
// fflush(debug_sudas_LOG_PHY);
memset((void *)&dummy_w_cc[0],0,3*(ulsch_harq->Or1+8+32));
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ 3506e52f
......@@ -2153,10 +2153,24 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,do_SR);
if ((n1_pucch0==-1) && (n1_pucch1==-1) && (do_SR==0)) { // no TX PDSCH that have to be checked and no SR for this UE_id
sudas_LOG_MAC(debug_sudas_LOG_MAC,"[eNB %d][PDSCH %x] Frame %d, subframe %d No Checking for PUCCH (%d,%d,%d,%d) SR %d\n",
eNB->Mod_id,eNB->dlsch[UE_id][0]->rnti,
frame,subframe,
n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,do_SR);
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
} else {
// otherwise we have some PUCCH detection to do
// Null out PUCCH PRBs for noise measurement
sudas_LOG_MAC(debug_sudas_LOG_MAC,"[eNB %d][PDSCH %x] Frame %d, subframe %d start Checking for PUCCH (%d,%d,%d,%d) SR %d\n",
eNB->Mod_id,eNB->dlsch[UE_id][0]->rnti,
frame,subframe,
n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,do_SR);
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
// Null out PUCCH PRBs for noise measurement
switch(fp->N_RB_UL) {
case 6:
eNB->rb_mask_ul[0] |= (0x1 | (1<<5)); //position 5
......@@ -2206,6 +2220,15 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
subframe,
SR_payload,
eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex);
sudas_LOG_MAC(debug_sudas_LOG_MAC,"Demodulating PUCCH for SR: RNTI %x Frame %d subframe %d Checking SR is %d (SR n1pucch is %d)\n",
eNB->ulsch[UE_id]->rnti,
frame,
subframe,
SR_payload,
eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex);
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
}
#ifdef PHY_ABSTRACTION
else {
......@@ -2221,13 +2244,18 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
#endif
}// do_SR==1
if ((n1_pucch0==-1) && (n1_pucch1==-1)) { // just check for SR
} else if (fp->frame_type==FDD) { // FDD
if ((n1_pucch0==-1) && (n1_pucch1==-1))
{ // just check for SR
}
else if (fp->frame_type==FDD) { // FDD
// if SR was detected, use the n1_pucch from SR, else use n1_pucch0
// n1_pucch0 = (SR_payload==1) ? eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex:n1_pucch0;
LOG_D(PHY,"Demodulating PUCCH for ACK/NAK: n1_pucch0 %d (%d), SR_payload %d\n",n1_pucch0,eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,SR_payload);
sudas_LOG_MAC(debug_sudas_LOG_MAC,"Demodulating PUCCH for ACK/NAK: n1_pucch0 %d (%d), SR_payload %d\n",n1_pucch0,eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,SR_payload);
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
if (eNB->abstraction_flag == 0) {
metric0 = rx_pucch(eNB,
pucch_format1a,
......@@ -2239,6 +2267,10 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
frame,
subframe,
PUCCH1a_THRES);
sudas_LOG_MAC(debug_sudas_LOG_MAC,"Demodulating metric0 %d metric0_SR %d ack %d do_SR %d\n",metric0,metric0_SR,pucch_payload0[0],do_SR);
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
}
#ifdef PHY_ABSTRACTION
else {
......@@ -2252,11 +2284,14 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
#endif
/* cancel SR detection if reception on n1_pucch0 is better than on SR PUCCH resource index */
if (do_SR && metric0 > metric0_SR) SR_payload = 0;
//if (do_SR && (metric0 > metric0_SR)) SR_payload = 0;
if (do_SR && metric0 <= metric0_SR) {
/* when transmitting ACK/NACK on SR PUCCH resource index, SR payload is always 1 */
SR_payload = 1;
/*
if (do_SR && (metric0 <= metric0_SR)) {
// when transmitting ACK/NACK on SR PUCCH resource index, SR payload is always 1
// SR_payload = 1;
sudas_LOG_MAC(debug_sudas_LOG_MAC,"Demodulating pucch_format1a shortneed %d\n",do_srs);
fflush(debug_sudas_LOG_MAC);
if (eNB->abstraction_flag == 0) {
metric0=rx_pucch(eNB,
......@@ -2270,6 +2305,8 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
subframe,
PUCCH1a_THRES);
}
sudas_LOG_MAC(debug_sudas_LOG_MAC,"Demodulating pucch_format1a ACK/NACK %d\n",pucch_payload0[0]);
fflush(debug_sudas_LOG_MAC);
#ifdef PHY_ABSTRACTION
else {
metric0 = rx_pucch_emul(eNB,
......@@ -2289,7 +2326,7 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
frame,subframe,
pucch_payload0[0],metric0);
#endif
*/
process_HARQ_feedback(UE_id,eNB,proc,
0,// pusch_flag
pucch_payload0,
......
openair1/sudas_tm4.h
View file @ 3506e52f
......@@ -20,7 +20,7 @@
//#define FHG_TM4_LOG
#define FHG_TM4_LOG_CQI
#define FHG_LOG
//#define FHG_LOG
......
openair2/LAYER2/MAC/defs.h
View file @ 3506e52f
......@@ -652,7 +652,8 @@ typedef struct {
/// Number of Allocated RBs for DL after scheduling (prior to frequency allocation)
uint16_t nb_rb[8]; // num_max_harq
//TM of allocated RBs
uint16_t Trans_Mode[8][50]; // num_max_harq
/// Number of Allocated RBs for UL after scheduling (prior to frequency allocation)
uint16_t nb_rb_ul[8]; // num_max_harq
......
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ 3506e52f
This diff is collapsed.
openair2/LAYER2/MAC/pre_processor.c
View file @ 3506e52f
......@@ -50,7 +50,7 @@
#include "RRC/LITE/extern.h"
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"
#include "rlc.h"
#include "sudas_tm4.h"
#define DEBUG_eNB_SCHEDULER 1
......@@ -178,6 +178,7 @@ void assign_rbs_required (module_id_t Mod_id,
rnti_t rnti;
uint16_t TBS = 0;
int16_t N_layer=1;
LTE_eNB_UE_stats *eNB_UE_stats[MAX_NUM_CCs];
int UE_id,n,i,j,CC_id,pCCid,tmp;
UE_list_t *UE_list = &eNB_mac_inst[Mod_id].UE_list;
......@@ -207,7 +208,7 @@ void assign_rbs_required (module_id_t Mod_id,
*/
eNB_UE_stats[CC_id]->dlsch_mcs1=cqi_to_mcs[eNB_UE_stats[CC_id]->DL_cqi[0]];
eNB_UE_stats[CC_id]->dlsch_mcs1 = eNB_UE_stats[CC_id]->dlsch_mcs1;//cmin(eNB_UE_stats[CC_id]->dlsch_mcs1,openair_daq_vars.target_ue_dl_mcs);
//eNB_UE_stats[CC_id]->dlsch_mcs1 = eNB_UE_stats[CC_id]->dlsch_mcs1;//cmin(eNB_UE_stats[CC_id]->dlsch_mcs1,openair_daq_vars.target_ue_dl_mcs);
}
......@@ -243,6 +244,26 @@ void assign_rbs_required (module_id_t Mod_id,
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(Mod_id,CC_id);
eNB_UE_stats[CC_id] = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,rnti);
/*sfn:
* TM4
*sudas_LOG_MAC(debug_sudas_LOG_MAC,"TM %d, DL_cqi %d, rank %d;\n",PHY_vars_eNB_g[Mod_id][CC_id]->transmission_mode[UE_id],eNB_UE_stats[CC_id]->DL_cqi[0],eNB_UE_stats[CC_id]->rank);
* fflush(debug_sudas_LOG_MAC);
*sudas_LOG_MAC(debug_sudas_LOG_MAC,"TM
* */
switch(mac_xface->get_transmission_mode(Mod_id,CC_id,rnti)){
case 1:
case 2:
case 7:
N_layer=1;
break;
case 4:
N_layer=1;
break;
default:
N_layer=1;
}
if (eNB_UE_stats[CC_id]->dlsch_mcs1==0) {
nb_rbs_required[CC_id][UE_id] = 4; // don't let the TBS get too small
} else {
......@@ -267,6 +288,7 @@ void assign_rbs_required (module_id_t Mod_id,
TBS = mac_xface->get_TBS_DL(eNB_UE_stats[CC_id]->dlsch_mcs1,nb_rbs_required[CC_id][UE_id]);
} // end of while
nb_rbs_required[CC_id][UE_id]/=N_layer;
LOG_D(MAC,"[eNB %d] Frame %d: UE %d on CC %d: RB unit %d, nb_required RB %d (TBS %d, mcs %d)\n",
Mod_id, frameP,UE_id, CC_id, min_rb_unit[CC_id], nb_rbs_required[CC_id][UE_id], TBS, eNB_UE_stats[CC_id]->dlsch_mcs1);
......@@ -539,6 +561,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
UE_sched_ctrl *ue_sched_ctl;
// int rrc_status = RRC_IDLE;
LTE_eNB_UE_stats *eNB_UE_stats[MAX_NUM_CCs];
#ifdef TM5
int harq_pid1=0,harq_pid2=0;
int round1=0,round2=0;
......@@ -579,6 +602,32 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
rballoc_sub,
MIMO_mode_indicator);
//
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
rnti = UE_RNTI(Mod_id,i);
eNB_UE_stats[CC_id] = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,rnti);
/*
PHY_vars_eNB_g[Mod_id][CC_id]->UE_stats[UE_id].rank = eNB_UE_stats[CC_id]->rank;
if (round==0)
{
//set the mode of the tranmission mode
if (eNB_UE_stats[CC_id]->rank)
{
PHY_vars_eNB_g[Mod_id][CC_id]->transmission_mode[UE_id]=4;
UE_list->UE_template[CC_id][UE_id].Trans_Mode[harq_pid][CC_id]=4;
}else
{
PHY_vars_eNB_g[Mod_id][CC_id]->transmission_mode[UE_id]=2;
UE_list->UE_template[CC_id][UE_id].Trans_Mode[harq_pid][CC_id]=2;
}
}else{
PHY_vars_eNB_g[Mod_id][CC_id]->transmission_mode[UE_id]=UE_list->UE_template[CC_id][UE_id].Trans_Mode[harq_pid][CC_id];;
}
*/
}
}
......
targets/RT/USER/lte-softmodem.c
View file @ 3506e52f
......@@ -1395,9 +1395,10 @@ int main( int argc, char **argv ) {
debug_sudas_LOG_PHY = fopen("debug_sudas_LOG_PHY.txt", "w");
debug_sudas_LOG_MAC = fopen("debug_sudas_LOG_MAC.txt", "w");
sudas_LOG_PHY(debug_sudas_LOG_PHY,"main();\n");
fflush(debug_sudas_LOG_PHY);
sudas_LOG_MAC(debug_sudas_LOG_MAC,"main();\n");
#ifdef FHG_LOG
fflush(debug_sudas_LOG_MAC);
#endif
#if defined (XFORMS)
......
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