Commit 3f5c651c authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/256_QAM_demod' into integration_2020_wk50

parents 0bf5c37c 9ec1bea7
......@@ -70,7 +70,7 @@ extern "C"
#define CONFIG_HLP_ITTIL "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n"
#define CONFIG_HLP_DLMCS "Set the maximum downlink MCS\n"
#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
#define CONFIG_HLP_256QAM "Use the 256 QAM mcs table for PDSCH\n"
//#define CONFIG_HLP_NUMUES "Set the number of UEs for the emulation"
#define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n"
......@@ -109,6 +109,7 @@ extern "C"
#define TIMING_SOURCE softmodem_params.timing_source
#define SEND_DMRSSYNC softmodem_params.send_dmrs_sync
#define USIM_TEST softmodem_params.usim_test
#define USE_256QAM_TABLE softmodem_params.use_256qam_table
#define DEFAULT_RFCONFIG_FILE "/usr/local/etc/syriq/ue.band7.tm1.PRB100.NR40.dat";
......@@ -137,6 +138,7 @@ extern "C"
{"basicsim", CONFIG_HLP_RFSIM, PARAMFLAG_BOOL, uptr:&basicsim, defintval:0, TYPE_INT, 0}, \
{"nokrnmod", CONFIG_HLP_NOKRNMOD, PARAMFLAG_BOOL, uptr:&nokrnmod, defintval:0, TYPE_INT, 0}, \
{"nbiot-disable", CONFIG_HLP_DISABLNBIOT, PARAMFLAG_BOOL, uptr:&nonbiot, defuintval:0, TYPE_INT, 0}, \
{"use-256qam-table", CONFIG_HLP_256QAM, PARAMFLAG_BOOL, iptr:&USE_256QAM_TABLE, defintval:0, TYPE_INT, 0}, \
}
......@@ -222,6 +224,7 @@ typedef struct {
uint32_t timing_source;
int hw_timing_advance;
uint32_t send_dmrs_sync;
int use_256qam_table;
} softmodem_params_t;
extern uint64_t get_softmodem_optmask(void);
......
......@@ -347,13 +347,13 @@ void nr_deinterleaving_ldpc(uint32_t E, uint8_t Qm, int16_t *e,int16_t *f)
}
break;
case 8:
e1=e+(E/6);
e2=e1+(E/6);
e3=e2+(E/6);
e4=e3+(E/6);
e5=e4+(E/6);
e6=e5+(E/6);
e7=e6+(E/6);
e1=e+(E/8);
e2=e1+(E/8);
e3=e2+(E/8);
e4=e3+(E/8);
e5=e4+(E/8);
e6=e5+(E/8);
e7=e6+(E/8);
for (int j = 0,j2=0; j< E/8; j++,j2+=8){
e[j] = f[j2];
e1[j] = f[j2+1];
......
......@@ -393,6 +393,7 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
//pdsch->dl_ch_rho2_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_mag0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->dl_ch_magb0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->dl_ch_magr0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->ptrs_phase_per_slot = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->ptrs_re_per_slot = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->dl_ch_ptrs_estimates_ext = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
......@@ -416,6 +417,7 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
//pdsch->dl_ch_rho2_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_mag0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magb0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magr0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->ptrs_re_per_slot[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * 14);
pdsch->ptrs_phase_per_slot[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * 14 );
pdsch->dl_ch_ptrs_estimates_ext[idx]= (int32_t *)malloc16_clear( sizeof(int32_t) * num);
......
......@@ -546,6 +546,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
pdsch_vars[eNB_id]->dl_ch_magr0,
pdsch_vars[eNB_id]->rxdataF_comp0,
(aatx>1) ? pdsch_vars[eNB_id]->rho : NULL,
frame_parms,
......@@ -860,6 +861,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
int **dl_ch_estimates_ext,
int **dl_ch_mag,
int **dl_ch_magb,
int **dl_ch_magr,
int **rxdataF_comp,
int **rho,
NR_DL_FRAME_PARMS *frame_parms,
......@@ -876,17 +878,23 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
unsigned short rb;
unsigned char aatx,aarx;
__m128i *dl_ch128,*dl_ch128_2,*dl_ch_mag128,*dl_ch_mag128b,*rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b;
__m128i *dl_ch128,*dl_ch128_2,*dl_ch_mag128,*dl_ch_mag128b,*dl_ch_mag128r,*rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128,QAM_amp128b,QAM_amp128r;
QAM_amp128b = _mm_setzero_si128();
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
if (mod_order == 4) {
QAM_amp128 = _mm_set1_epi16(QAM16_n1); // 2/sqrt(10)
QAM_amp128b = _mm_setzero_si128();
QAM_amp128r = _mm_setzero_si128();
} else if (mod_order == 6) {
QAM_amp128 = _mm_set1_epi16(QAM64_n1); //
QAM_amp128b = _mm_set1_epi16(QAM64_n2);
QAM_amp128r = _mm_setzero_si128();
} else if (mod_order == 8) {
QAM_amp128 = _mm_set1_epi16(QAM256_n1);
QAM_amp128b = _mm_set1_epi16(QAM256_n2);
QAM_amp128r = _mm_set1_epi16(QAM256_n3);
}
// printf("comp: rxdataF_comp %p, symbol %d\n",rxdataF_comp[0],symbol);
......@@ -896,6 +904,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*nb_rb*12];
dl_ch_mag128 = (__m128i *)&dl_ch_mag[(aatx<<1)+aarx][symbol*nb_rb*12];
dl_ch_mag128b = (__m128i *)&dl_ch_magb[(aatx<<1)+aarx][symbol*nb_rb*12];
dl_ch_mag128r = (__m128i *)&dl_ch_magr[(aatx<<1)+aarx][symbol*nb_rb*12];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*nb_rb*12];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol*nb_rb*12];
......@@ -916,6 +925,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
dl_ch_mag128[0] = _mm_unpacklo_epi16(mmtmpD0,mmtmpD0);
dl_ch_mag128b[0] = dl_ch_mag128[0];
dl_ch_mag128r[0] = dl_ch_mag128[0];
dl_ch_mag128[0] = _mm_mulhi_epi16(dl_ch_mag128[0],QAM_amp128);
dl_ch_mag128[0] = _mm_slli_epi16(dl_ch_mag128[0],1);
//print_ints("Re(ch):",(int16_t*)&mmtmpD0);
......@@ -923,6 +933,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
//print_shorts("mag:",(int16_t*)&dl_ch_mag128[0]);
dl_ch_mag128[1] = _mm_unpackhi_epi16(mmtmpD0,mmtmpD0);
dl_ch_mag128b[1] = dl_ch_mag128[1];
dl_ch_mag128r[1] = dl_ch_mag128[1];
dl_ch_mag128[1] = _mm_mulhi_epi16(dl_ch_mag128[1],QAM_amp128);
dl_ch_mag128[1] = _mm_slli_epi16(dl_ch_mag128[1],1);
......@@ -933,6 +944,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
dl_ch_mag128[2] = _mm_unpacklo_epi16(mmtmpD1,mmtmpD1);
dl_ch_mag128b[2] = dl_ch_mag128[2];
dl_ch_mag128r[2] = dl_ch_mag128[2];
dl_ch_mag128[2] = _mm_mulhi_epi16(dl_ch_mag128[2],QAM_amp128);
dl_ch_mag128[2] = _mm_slli_epi16(dl_ch_mag128[2],1);
......@@ -945,9 +957,18 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
dl_ch_mag128b[1] = _mm_mulhi_epi16(dl_ch_mag128b[1],QAM_amp128b);
dl_ch_mag128b[1] = _mm_slli_epi16(dl_ch_mag128b[1],1);
dl_ch_mag128r[0] = _mm_mulhi_epi16(dl_ch_mag128r[0],QAM_amp128r);
dl_ch_mag128r[0] = _mm_slli_epi16(dl_ch_mag128r[0],1);
dl_ch_mag128r[1] = _mm_mulhi_epi16(dl_ch_mag128r[1],QAM_amp128r);
dl_ch_mag128r[1] = _mm_slli_epi16(dl_ch_mag128r[1],1);
if (pilots==0) {
dl_ch_mag128b[2] = _mm_mulhi_epi16(dl_ch_mag128b[2],QAM_amp128b);
dl_ch_mag128b[2] = _mm_slli_epi16(dl_ch_mag128b[2],1);
dl_ch_mag128r[2] = _mm_mulhi_epi16(dl_ch_mag128r[2],QAM_amp128r);
dl_ch_mag128r[2] = _mm_slli_epi16(dl_ch_mag128r[2],1);
}
}
......@@ -1015,12 +1036,14 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
dl_ch128+=3;
dl_ch_mag128+=3;
dl_ch_mag128b+=3;
dl_ch_mag128r+=3;
rxdataF128+=3;
rxdataF_comp128+=3;
} else { // we have a smaller PDSCH in symbols with pilots so skip last group of 4 REs and increment less
dl_ch128+=2;
dl_ch_mag128+=2;
dl_ch_mag128b+=2;
dl_ch_mag128r+=2;
rxdataF128+=2;
rxdataF_comp128+=2;
}
......@@ -2620,6 +2643,29 @@ static int nr_dlsch_llr(NR_UE_PDSCH **pdsch_vars,
}
}
break;
case 8:
if ((rx_type==rx_standard) || (codeword_TB1 == -1)) {
nr_dlsch_256qam_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0,
(int16_t*)pllr_symbol_cw0,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
pdsch_vars[eNB_id]->dl_ch_magr0,
symbol,len,first_symbol_flag,nb_rb,
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
} else if (codeword_TB0 == -1){
nr_dlsch_256qam_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0,
pllr_symbol_cw1,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
pdsch_vars[eNB_id]->dl_ch_magr0,
symbol,len,first_symbol_flag,nb_rb,
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
}
break;
default:
LOG_W(PHY,"rx_dlsch.c : Unknown mod_order!!!!\n");
return(-1);
......@@ -2660,6 +2706,19 @@ static int nr_dlsch_llr(NR_UE_PDSCH **pdsch_vars,
beamforming_mode);
}
break;
case 8 :
if (rx_type==rx_standard) {
nr_dlsch_256qam_llr(frame_parms,
pdsch_vars[eNB_id]->rxdataF_comp0,
pllr_symbol_cw0,
pdsch_vars[eNB_id]->dl_ch_mag0,
pdsch_vars[eNB_id]->dl_ch_magb0,
pdsch_vars[eNB_id]->dl_ch_magr0,
symbol,len,first_symbol_flag,nb_rb,
pdsch_vars[eNB_id]->llr_offset[symbol],
beamforming_mode);
}
break;
default:
LOG_W(PHY,"rx_dlsch.c : Unknown mod_order!!!!\n");
return(-1);
......
......@@ -1089,6 +1089,108 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
}
}
//#endif
//----------------------------------------------------------------------------------------------
// 256-QAM
//----------------------------------------------------------------------------------------------
void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
int32_t **dl_ch_magr,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint32_t llr_offset,
uint8_t beamforming_mode)
{
__m128i *rxF = (__m128i*)&rxdataF_comp[0][(symbol*nb_rb*12)];
__m128i *ch_mag,*ch_magb,*ch_magr;
int i,len2;
unsigned char len_mod4;
short *llr;
int16_t *llr2;
int8_t *pllr_symbol;
/*
if (first_symbol_flag==1)
llr = dlsch_llr;
else
llr = *llr_save;
*/
llr = dlsch_llr;
pllr_symbol = (int8_t*)dlsch_llr;
pllr_symbol += llr_offset;
ch_mag = (__m128i*)&dl_ch_mag[0][(symbol*nb_rb*12)];
ch_magb = (__m128i*)&dl_ch_magb[0][(symbol*nb_rb*12)];
ch_magr = (__m128i*)&dl_ch_magr[0][(symbol*nb_rb*12)];
llr2 = llr;
llr += (len*8);
len_mod4 =len&3;
len2=len>>2; // length in quad words (4 REs)
len2+=((len_mod4==0)?0:1);
for (i=0; i<len2; i++) {
xmm1 = _mm_abs_epi16(rxF[i]);
xmm1 = _mm_subs_epi16(ch_mag[i],xmm1);
xmm2 = _mm_abs_epi16(xmm1);
xmm2 = _mm_subs_epi16(ch_magb[i],xmm2);
xmm3 = _mm_abs_epi16(xmm2);
xmm3 = _mm_subs_epi16(ch_magr[i], xmm3);
llr2[0] = ((short *)&rxF[i])[0];
llr2[1] = ((short *)&rxF[i])[1];
llr2[2] = _mm_extract_epi16(xmm1,0);
llr2[3] = _mm_extract_epi16(xmm1,1);//((short *)&xmm1)[j+1];
llr2[4] = _mm_extract_epi16(xmm2,0);//((short *)&xmm2)[j];
llr2[5] = _mm_extract_epi16(xmm2,1);//((short *)&xmm2)[j+1];
llr2[6] = _mm_extract_epi16(xmm3,0);
llr2[7] = _mm_extract_epi16(xmm3,1);
llr2+=8;
llr2[0] = ((short *)&rxF[i])[2];
llr2[1] = ((short *)&rxF[i])[3];
llr2[2] = _mm_extract_epi16(xmm1,2);
llr2[3] = _mm_extract_epi16(xmm1,3);//((short *)&xmm1)[j+1];
llr2[4] = _mm_extract_epi16(xmm2,2);//((short *)&xmm2)[j];
llr2[5] = _mm_extract_epi16(xmm2,3);//((short *)&xmm2)[j+1];
llr2[6] = _mm_extract_epi16(xmm3,2);
llr2[7] = _mm_extract_epi16(xmm3,3);
llr2+=8;
llr2[0] = ((short *)&rxF[i])[4];
llr2[1] = ((short *)&rxF[i])[5];
llr2[2] = _mm_extract_epi16(xmm1,4);
llr2[3] = _mm_extract_epi16(xmm1,5);//((short *)&xmm1)[j+1];
llr2[4] = _mm_extract_epi16(xmm2,4);//((short *)&xmm2)[j];
llr2[5] = _mm_extract_epi16(xmm2,5);//((short *)&xmm2)[j+1];
llr2[6] = _mm_extract_epi16(xmm3,4);
llr2[7] = _mm_extract_epi16(xmm3,5);
llr2+=8;
llr2[0] = ((short *)&rxF[i])[6];
llr2[1] = ((short *)&rxF[i])[7];
llr2[2] = _mm_extract_epi16(xmm1,6);
llr2[3] = _mm_extract_epi16(xmm1,7);//((short *)&xmm1)[j+1];
llr2[4] = _mm_extract_epi16(xmm2,6);//((short *)&xmm2)[j];
llr2[5] = _mm_extract_epi16(xmm2,7);//((short *)&xmm2)[j+1];
llr2[6] = _mm_extract_epi16(xmm3,6);
llr2[7] = _mm_extract_epi16(xmm3,7);
llr2+=8;
}
_mm_empty();
_m_empty();
}
//==============================================================================================
// DUAL-STREAM
//==============================================================================================
......
......@@ -564,6 +564,18 @@ void nr_dlsch_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
uint32_t llr_offset,
uint8_t beamforming_mode);
void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
int32_t **dl_ch_magr,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint32_t llr_offset,
uint8_t beamforming_mode);
/** \fn dlsch_siso(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
......@@ -798,6 +810,7 @@ void nr_dlsch_channel_compensation(int32_t **rxdataF_ext,
int32_t **dl_ch_estimates_ext,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
int32_t **dl_ch_magr,
int32_t **rxdataF_comp,
int32_t **rho,
NR_DL_FRAME_PARMS *frame_parms,
......
......@@ -379,6 +379,8 @@ typedef struct {
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_magb1[8][8];
/// \brief Magnitude of Downlink Channel, first layer (256QAM level).
int32_t **dl_ch_magr0;
/// \brief Cross-correlation of two eNB signals.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: symbol [0..]
......
......@@ -219,6 +219,13 @@
///Third Amplitude for QAM64 (\f$ 2^{15} \times 1/\sqrt{42}\f$)
#define QAM64_n3 5056
///First Amplitude for QAM256 (\f$ 2^{15} \times 8/\sqrt{170}\f$)
#define QAM256_n1 20106
///Second Amplitude for QAM256 (\f$ 2^{15} \times 4/\sqrt{170}\f$)
#define QAM256_n2 10053
///Third Amplitude for QAM256 (\f$ 2^{15} \times 2/\sqrt{170}\f$)
#define QAM256_n3 5026
/// First Amplitude for QAM16 for TM5 (\f$ 2^{15} \times 2/sqrt(20)\f$)
#define QAM16_TM5_n1 14654
/// Second Amplitude for QAM16 for TM5 Receiver (\f$ 2^{15} \times 1/\sqrt{20}\f$)
......@@ -246,7 +253,7 @@
#ifdef BIT8_TX
#define AMP_SHIFT 7
#else
#define AMP_SHIFT 9
#define AMP_SHIFT 10
#endif
#define AMP ((1)<<AMP_SHIFT)
......
......@@ -153,7 +153,7 @@ void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dm
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of
dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */
int g_mcsIndex = -1, g_rbStart = -1, g_rbSize = -1;
int g_mcsIndex = -1, g_mcsTableIdx = 0, g_rbStart = -1, g_rbSize = -1;
void nr_dlsim_preprocessor(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
......@@ -181,10 +181,11 @@ void nr_dlsim_preprocessor(module_id_t module_id,
sched_ctrl->rbSize = g_rbSize;
sched_ctrl->mcs = g_mcsIndex;
sched_ctrl->time_domain_allocation = 2;
sched_ctrl->mcsTableIdx = 0;
sched_ctrl->mcsTableIdx = g_mcsTableIdx;
AssertFatal(sched_ctrl->rbStart >= 0, "invalid rbStart %d\n", sched_ctrl->rbStart);
AssertFatal(sched_ctrl->rbSize > 0, "invalid rbSize %d\n", sched_ctrl->rbSize);
AssertFatal(sched_ctrl->mcs >= 0, "invalid sched_ctrl->mcs %d\n", sched_ctrl->mcs);
AssertFatal(sched_ctrl->mcsTableIdx >= 0 && sched_ctrl->mcsTableIdx <= 2, "invalid sched_ctrl->mcsTableIdx %d\n", sched_ctrl->mcsTableIdx);
sched_ctrl->numDmrsCdmGrpsNoData = 1;
}
......@@ -280,7 +281,7 @@ int main(int argc, char **argv)
FILE *scg_fd=NULL;
while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:m:w:T:U:")) != -1) {
while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:m:w:T:U:q")) != -1) {
switch (c) {
case 'f':
scg_fd = fopen(optarg,"r");
......@@ -452,6 +453,11 @@ int main(int argc, char **argv)
g_mcsIndex = atoi(optarg);
break;
case 'q':
g_mcsTableIdx = 1;
get_softmodem_params()->use_256qam_table = 1;
break;
case 'm':
mu = atoi(optarg);
break;
......@@ -507,6 +513,7 @@ int main(int argc, char **argv)
printf("-c Start symbol for PDSCH (fixed for now)\n");
printf("-j Number of symbols for PDSCH (fixed for now)\n");
printf("-e MSC index\n");
printf("-q Use 2nd MCS table (256 QAM table) for PDSCH\n");
printf("-t Acceptable effective throughput (in percentage)\n");
printf("-T Enable PTRS, arguments list L_PTRS{0,1,2} K_PTRS{2,4}, e.g. -T 2 0 2 \n");
printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2}, e.g. -U 2 0 2 \n");
......
......@@ -3706,6 +3706,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2;
/* VRB_TO_PRB_MAPPING */
dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
/* MCS TABLE INDEX */
dlsch_config_pdu_1_0->mcs_table = (pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0;
/* MCS */
dlsch_config_pdu_1_0->mcs = dci->mcs;
// Basic sanity check for MCS value to check for a false or erroneous DCI
......@@ -4009,7 +4011,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dl_config->number_pdus = dl_config->number_pdus + 1;
/* TODO same calculation for MCS table as done in UL */
dlsch_config_pdu_1_1->mcs_table = 0;
dlsch_config_pdu_1_1->mcs_table = (pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0;
/*PTRS configuration */
if(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) {
valid_ptrs_setup = set_dl_ptrs_values(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup,
......
......@@ -265,7 +265,6 @@ void nr_preprocessor_phytest(module_id_t module_id,
"%s(): expected UE %d to be active\n",
__func__,
UE_id);
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
/* find largest unallocated chunk */
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
......@@ -341,7 +340,14 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_ctrl->rbStart = rbStart;
sched_ctrl->rbSize = rbSize;
sched_ctrl->time_domain_allocation = 2;
sched_ctrl->mcsTableIdx = 0;
if (!UE_info->secondaryCellGroup[UE_id]->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->mcs_Table)
sched_ctrl->mcsTableIdx = 0;
else {
if (*UE_info->secondaryCellGroup[UE_id]->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->mcs_Table == 0)
sched_ctrl->mcsTableIdx = 1;
else
sched_ctrl->mcsTableIdx = 2;
}
sched_ctrl->mcs = 9;
sched_ctrl->numDmrsCdmGrpsNoData = 1;
......
......@@ -518,6 +518,7 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
const int bwp_id = sched_ctrl->active_bwp->bwp_Id;
const int nrOfLayers = 1;
const int mcs = sched_ctrl->mcs;
const int mcs_table_index = sched_ctrl->mcsTableIdx;
bool valid_ptrs_setup = false;
AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1,
......@@ -557,10 +558,10 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
pdsch_pdu_rel15->CyclicPrefix = 0;
pdsch_pdu_rel15->NrOfCodewords = 1;
pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcs,0);
pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcs, mcs_table_index);
pdsch_pdu_rel15->qamModOrder[0] = 2;
pdsch_pdu_rel15->mcsIndex[0] = mcs;
pdsch_pdu_rel15->mcsTable[0] = 0;
pdsch_pdu_rel15->mcsTable[0] = mcs_table_index;
pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[round];
pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
pdsch_pdu_rel15->nrOfLayers = nrOfLayers;
......
......@@ -362,7 +362,12 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rateMatchPatternGroup1=NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rateMatchPatternGroup2=NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rbg_Size=NR_PDSCH_Config__rbg_Size_config1;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->mcs_Table=NULL;
if (!get_softmodem_params()->use_256qam_table) {
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->mcs_Table=NULL;
} else {
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->mcs_Table = calloc(1, sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->mcs_Table));
*secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->mcs_Table = NR_PDSCH_Config__mcs_Table_qam256;
}
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI = calloc(1,sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI));
*secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI = NR_PDSCH_Config__maxNrofCodeWordsScheduledByDCI_n1;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->prb_BundlingType.present = NR_PDSCH_Config__prb_BundlingType_PR_staticBundling;
......@@ -680,7 +685,12 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
bwp->bwp_Dedicated->pdsch_Config->choice.setup->rateMatchPatternGroup1=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->rateMatchPatternGroup2=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->rbg_Size=NR_PDSCH_Config__rbg_Size_config1;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table=NULL;
if (!get_softmodem_params()->use_256qam_table) {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table=NULL;
} else {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table));
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table = NR_PDSCH_Config__mcs_Table_qam256;
}
bwp->bwp_Dedicated->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI));
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI = NR_PDSCH_Config__maxNrofCodeWordsScheduledByDCI_n1;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.present = NR_PDSCH_Config__prb_BundlingType_PR_staticBundling;
......@@ -706,7 +716,12 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
bwp->bwp_Dedicated->pdsch_Config->choice.setup->rateMatchPatternGroup1=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->rateMatchPatternGroup2=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->rbg_Size=NR_PDSCH_Config__rbg_Size_config1;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table=NULL;
if (!get_softmodem_params()->use_256qam_table) {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table=NULL;
} else {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table));
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table = NR_PDSCH_Config__mcs_Table_qam256;
}
bwp->bwp_Dedicated->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI));
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI = NR_PDSCH_Config__maxNrofCodeWordsScheduledByDCI_n1;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.present = NR_PDSCH_Config__prb_BundlingType_PR_staticBundling;
......
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