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OpenXG-RAN
Commit 4352c5b5 authored by kn.raju's avatar kn.raju
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Multi-user RACH

parent 6b8eb372
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Showing with 262 additions and 165 deletions
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h
View file @ 4352c5b5
......@@ -619,8 +619,10 @@ typedef struct {
uint16_t prgSize;
/// Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
uint8_t digBFInterfaces;
// Depends on numPRGs
uint16_t PMIdx[275];
uint16_t *beamIdx[275];
// Depends on digBFInterfaces
uint16_t beamIdx[256];
} nfapi_nr_tx_precoding_and_beamforming_t;
//table 3-37
......
openair2/LAYER2/NR_MAC_gNB/config.c
View file @ 4352c5b5
......@@ -371,10 +371,15 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
UE_info->UE_sched_ctrl[UE_id].active_bwp = bwpList->list.array[bwp_id - 1];
LOG_I(PHY,"Added new UE_id %d/%x with initial secondaryCellGroup\n",UE_id,rnti);
} else if (add_ue == 1 && !get_softmodem_params()->phy_test) {
/* TODO: should check for free RA process */
const int CC_id = 0;
NR_RA_t *ra = &RC.nrmac[Mod_idP]->common_channels[CC_id].ra[0];
ra->state = RA_IDLE;
#if 1
NR_COMMON_channels_t *cc = &RC.nrmac[Mod_idP]->common_channels[CC_id];
uint8_t ra_index = 0;
/* checking for free RA process */
for(; ra_index < NR_NB_RA_PROC_MAX; ra_index++) {
if(cc->ra[ra_index].state == RA_IDLE) break;
}
NR_RA_t *ra = &cc->ra[ra_index];
ra->secondaryCellGroup = secondaryCellGroup;
if (secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated!=NULL) {
if (secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra != NULL) {
......@@ -384,9 +389,15 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
uint8_t num_preamble = cfra.resources.choice.ssb->ssb_ResourceList.list.count;
ra->preambles.num_preambles = num_preamble;
ra->preambles.preamble_list = (uint8_t *) malloc(num_preamble*sizeof(uint8_t));
for (int i = 0; i < num_preamble; i++)
ra->preambles.preamble_list[i] = cfra.resources.choice.ssb->ssb_ResourceList.list.array[i]->ra_PreambleIndex;
}
for(int i=0; i<cc->num_active_ssb; i++) {
for(int j=0; j<num_preamble; j++) {
if(cc->ssb_index[i] == secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list.array[i]->ssb) {
//one dedicated preamble for each beam
ra->preambles.preamble_list[i] = secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra->resources.choice.ssb->ssb_ResourceList.list.array[i]->ra_PreambleIndex;
break;
}
}
}
}
LOG_I(PHY,"Added new RA process for UE RNTI %04x with initial secondaryCellGroup\n", rnti);
} else { // secondaryCellGroup has been updated
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @ 4352c5b5
......@@ -245,7 +245,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
TX_req->PDU_index = nr_mac->pdu_index[CC_id]++;
TX_req->num_TLV = 1;
TX_req->TLVs[0].length = 8;
memcpy((void*)&TX_req->TLVs[0].value.direct[0],(void*)&cc[CC_id].RAR_pdu.payload[0],TX_req->TLVs[0].length);
memcpy((void*)&TX_req->TLVs[0].value.direct[0],(void*)&cc[CC_id].RAR_pdu[0].payload[0],TX_req->TLVs[0].length);
nr_mac->TX_req[CC_id].Number_of_PDUs++;
nr_mac->TX_req[CC_id].SFN=frameP;
nr_mac->TX_req[CC_id].Slot=slotP;
......@@ -530,7 +530,6 @@ void schedule_fapi_ul_pdu(int Mod_idP,
memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t));
LOG_D(MAC, "Scheduling UE specific PUSCH\n");
//UL_tti_req = &nr_mac->UL_tti_req[CC_id];
int dci_formats[2];
int rnti_types[2];
......@@ -797,6 +796,15 @@ void schedule_fapi_ul_pdu(int Mod_idP,
bwp,
aggregation_level,
CCEIndex);
nr_configure_dci(nr_mac,
pdcch_pdu_rel15,
UE_info->rnti[UE_id], ss,
coreset,
scc,
bwp,
UE_info->UE_beam_index[UE_id],
aggregation_level,
CCEIndex);
dci_pdu_rel15_t *dci_pdu_rel15 = calloc(MAX_DCI_CORESET,sizeof(dci_pdu_rel15_t));
config_uldci(ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,time_domain_assignment,UE_info->UE_sched_ctrl[UE_id].tpc0,n_ubwp,bwp_id);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ 4352c5b5
......@@ -128,26 +128,25 @@ static inline uint8_t get_max_cces(uint8_t scs) {
NR_ControlResourceSet_t *get_coreset(NR_BWP_Downlink_t *bwp,
NR_SearchSpace_t *ss,
int ss_type) {
NR_ControlResourceSetId_t coreset_id = *ss->controlResourceSetId;
if (ss_type == 0) { // common search space
AssertFatal(coreset_id != 0, "coreset0 currently not supported\n");
NR_ControlResourceSet_t *coreset = bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet;
AssertFatal(coreset_id == coreset->controlResourceSetId,
"ID of common ss coreset does not correspond to id set in the "
"search space\n");
return coreset;
} else {
const int n = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.count;
for (int i = 0; i < n; i++) {
NR_ControlResourceSet_t *coreset =
bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[i];
if (coreset_id == coreset->controlResourceSetId) {
return coreset;
}
int ss_type) {
NR_ControlResourceSetId_t coreset_id = *ss->controlResourceSetId;
if (ss_type == 0) { // common search space
AssertFatal(coreset_id != 0, "coreset0 currently not supported\n");
NR_ControlResourceSet_t *coreset = bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet;
AssertFatal(coreset_id == coreset->controlResourceSetId,
"ID of common ss coreset does not correspond to id set in the "
"search space\n");
return coreset;
} else {
const int n = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.count;
for (int i = 0; i < n; i++) {
NR_ControlResourceSet_t *coreset = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[i];
if (coreset_id == coreset->controlResourceSetId) {
return coreset;
}
}
AssertFatal(0, "Couldn't find coreset with id %ld\n", coreset_id);
}
AssertFatal(0, "Couldn't find coreset with id %ld\n", coreset_id);
}
}
NR_SearchSpace_t *get_searchspace(
......@@ -175,9 +174,6 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
uint16_t Y,
int m,
int nr_of_candidates) {
// uncomment these when we allocate for common search space
// NR_COMMON_channels_t *cc = nr_mac->common_channels;
// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int coreset_id = coreset->controlResourceSetId;
int *cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id];
......@@ -431,6 +427,42 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
}
void nr_configure_dci(gNB_MAC_INST *nr_mac,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
uint16_t rnti,
NR_SearchSpace_t *ss,
NR_ControlResourceSet_t *coreset,
NR_ServingCellConfigCommon_t *scc,
NR_BWP_Downlink_t *bwp,
uint8_t beam_index,
uint8_t aggregation_level,
int CCEIndex) {
pdcch_pdu->dci_pdu.RNTI[pdcch_pdu->numDlDci]=rnti;
if (coreset->pdcch_DMRS_ScramblingID != NULL &&
ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) {
pdcch_pdu->dci_pdu.ScramblingId[pdcch_pdu->numDlDci] = *coreset->pdcch_DMRS_ScramblingID;
pdcch_pdu->dci_pdu.ScramblingRNTI[pdcch_pdu->numDlDci]=rnti;
}
else {
pdcch_pdu->dci_pdu.ScramblingId[pdcch_pdu->numDlDci] = *scc->physCellId;
pdcch_pdu->dci_pdu.ScramblingRNTI[pdcch_pdu->numDlDci]=0;
}
pdcch_pdu->dci_pdu.AggregationLevel[pdcch_pdu->numDlDci] = aggregation_level;
pdcch_pdu->dci_pdu.CceIndex[pdcch_pdu->numDlDci] = CCEIndex;
if (ss->searchSpaceType->choice.ue_Specific->dci_Formats==NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0)
pdcch_pdu->dci_pdu.beta_PDCCH_1_0[pdcch_pdu->numDlDci]=0;
pdcch_pdu->dci_pdu.powerControlOffsetSS[pdcch_pdu->numDlDci]=1;
pdcch_pdu->dci_pdu.precodingAndBeamforming[pdcch_pdu->numDlDci].numPRGs = 1;
pdcch_pdu->dci_pdu.precodingAndBeamforming[pdcch_pdu->numDlDci].prgSize = 275;
pdcch_pdu->dci_pdu.precodingAndBeamforming[pdcch_pdu->numDlDci].digBFInterfaces = 1;
pdcch_pdu->dci_pdu.precodingAndBeamforming[pdcch_pdu->numDlDci].PMIdx[0] = 0;
pdcch_pdu->dci_pdu.precodingAndBeamforming[pdcch_pdu->numDlDci].beamIdx[0] = beam_index;
pdcch_pdu->numDlDci++;
}
void nr_fill_nfapi_dl_pdu(int Mod_idP,
nfapi_nr_dl_tti_request_body_t *dl_req,
rnti_t rnti,
......@@ -696,27 +728,6 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
//precoderGranularity
pdcch_pdu->precoderGranularity = coreset->precoderGranularity;
pdcch_pdu->dci_pdu.RNTI[pdcch_pdu->numDlDci]=rnti;
if (coreset->pdcch_DMRS_ScramblingID != NULL &&
ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) {
pdcch_pdu->dci_pdu.ScramblingId[pdcch_pdu->numDlDci] = *coreset->pdcch_DMRS_ScramblingID;
pdcch_pdu->dci_pdu.ScramblingRNTI[pdcch_pdu->numDlDci]=rnti;
}
else {
pdcch_pdu->dci_pdu.ScramblingId[pdcch_pdu->numDlDci] = *scc->physCellId;
pdcch_pdu->dci_pdu.ScramblingRNTI[pdcch_pdu->numDlDci]=0;
}
pdcch_pdu->dci_pdu.AggregationLevel[pdcch_pdu->numDlDci] = aggregation_level;
pdcch_pdu->dci_pdu.CceIndex[pdcch_pdu->numDlDci] = CCEIndex;
if (ss->searchSpaceType->choice.ue_Specific->dci_Formats==NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0)
pdcch_pdu->dci_pdu.beta_PDCCH_1_0[pdcch_pdu->numDlDci]=0;
pdcch_pdu->dci_pdu.powerControlOffsetSS[pdcch_pdu->numDlDci]=1;
pdcch_pdu->numDlDci++;
}
else { // this is for InitialBWP
AssertFatal(1==0,"Fill in InitialBWP PDCCH configuration\n");
......
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @ 4352c5b5
......@@ -241,6 +241,17 @@ void find_search_space(int ss_type,
NR_BWP_Downlink_t *bwp,
NR_SearchSpace_t *ss);
void nr_configure_dci(gNB_MAC_INST *nr_mac,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
uint16_t rnti,
NR_SearchSpace_t *ss,
NR_ControlResourceSet_t *coreset,
NR_ServingCellConfigCommon_t *scc,
NR_BWP_Downlink_t *bwp,
uint8_t beam_index,
uint8_t aggregation_level,
int CCEIndex);
void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
uint16_t rnti,
......
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @ 4352c5b5
......@@ -187,7 +187,7 @@ typedef struct {
/// Outgoing PCCH pdu for PHY
PCCH_PDU PCCH_pdu;
/// Outgoing RAR pdu for PHY
RAR_PDU RAR_pdu;
RAR_PDU RAR_pdu[NR_NB_RA_PROC_MAX];
/// Template for RA computations
NR_RA_t ra[NR_NB_RA_PROC_MAX];
/// VRB map for common channels
......
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