Commit 49d27bdf authored by Cedric Roux's avatar Cedric Roux

Merge remote-tracking branch 'origin/NR_RRCConfiguration' into nr-dual-connectivity

parents 51ab31a3 cf51fff7
......@@ -512,7 +512,8 @@ const char* eurecomFunctionsNames[] = {
/*NR softmodem signal*/
"wakeup_txfh",
"gNB_thread_rxtx0",
"gNB_thread_rxtx1"
"gNB_thread_rxtx1",
"ru_thread_tx_wait"
};
struct vcd_module_s vcd_modules[] = {
......
......@@ -505,6 +505,7 @@ typedef enum {
VCD_SIGNAL_DUMPER_FUNCTIONS_WAKEUP_TXFH,
VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX0,
VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX1,
VCD_SIGNAL_DUMPER_FUNCTIONS_RU_TX_WAIT,
VCD_SIGNAL_DUMPER_FUNCTIONS_END
} vcd_signal_dump_functions;
......
......@@ -73,7 +73,7 @@ typedef struct {
} T_cache_t;
/* number of VCD functions (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_FUNCTIONS (245)
#define VCD_NUM_FUNCTIONS (246)
/* number of VCD variables (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_VARIABLES (186)
......
......@@ -3285,3 +3285,8 @@ ID = VCD_FUNCTION_gNB_PROC_RXTX1
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = gNB_thread_rxtx1
ID = VCD_FUNCTION_RU_TX_WAIT
DESC = VCD function RU_TX_WAIT
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = ru_thread_tx_wait
......@@ -423,11 +423,16 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
// note this should depend on the numerology used by the TX L1 thread, set here for 500us slot time
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL,1);
waitret=wait_on_condition(&proc->mutex_RUs_tx,&proc->cond_RUs,&proc->instance_cnt_RUs,"wakeup_txfh");
AssertFatal(release_thread(&proc->mutex_RUs_tx,&proc->instance_cnt_RUs,"wakeup_txfh")==0, "error releaseing gNB lock on RUs\n");
AssertFatal((ret = pthread_mutex_lock(&proc->mutex_RUs_tx))==0,"mutex_lock returns %d\n",ret);
while (proc->instance_cnt_RUs < 0) {
pthread_cond_wait(&proc->cond_RUs,&proc->mutex_RUs_tx); // this unlocks mutex_rxtx while waiting and then locks it again
}
proc->instance_cnt_RUs = -1;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,proc->instance_cnt_RUs);
AssertFatal((ret = pthread_mutex_unlock(&proc->mutex_RUs_tx))==0,"mutex_unlock returns %d\n",ret);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL,0);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,proc->instance_cnt_RUs);
if (waitret == ETIMEDOUT) {
LOG_W(PHY,"Dropping TX slot (%d.%d) because FH is blocked more than 1 slot times (500us)\n",frame_tx,slot_tx);
......@@ -465,6 +470,8 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
return(-1);
}
AssertFatal((ret=pthread_mutex_lock(&ru_proc->mutex_gNBs))==0,"mutex_lock returned %d\n",ret);
ru_proc->instance_cnt_gNBs = 0;
ru_proc->timestamp_tx = timestamp_tx;
ru_proc->tti_tx = slot_tx;
......@@ -794,7 +801,7 @@ void kill_gNB_proc(int inst) {
proc = &gNB->proc;
L1_proc = &proc->L1_proc;
L1_proc_tx = &proc->L1_proc_tx;
LOG_I(PHY, "Killing TX CC_id %d inst %d\n",inst );
LOG_I(PHY, "Killing TX inst %d\n",inst );
if (get_thread_parallel_conf() == PARALLEL_RU_L1_SPLIT || get_thread_parallel_conf() == PARALLEL_RU_L1_TRX_SPLIT) {
pthread_mutex_lock(&L1_proc->mutex);
......@@ -871,7 +878,7 @@ void init_eNB_afterRU(void) {
LOG_I(PHY,"%s() RC.nb_nr_inst:%d\n", __FUNCTION__, RC.nb_nr_inst);
for (inst=0; inst<RC.nb_nr_inst; inst++) {
LOG_I(PHY,"RC.nb_nr_CC[inst:%d]:%p\n", inst, CC_id, RC.gNB[inst]);
LOG_I(PHY,"RC.nb_nr_CC[inst:%d]:%p\n", inst, RC.gNB[inst]);
gNB = RC.gNB[inst];
phy_init_nr_gNB(gNB,0,0);
......
......@@ -721,8 +721,9 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(frame), T_INT(slot),
T_INT(0), T_BUFFER(&ru->common.txdata[0][slot * fp->samples_per_slot], fp->samples_per_slot * 4));
int slot_type = nr_slot_select(cfg,frame,slot%((1<<cfg->ssb_config.scs_common.value)*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME));
int prevslot_type = nr_slot_select(cfg,frame,(slot+(((1<<cfg->ssb_config.scs_common.value)*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)-1))%((1<<cfg->ssb_config.scs_common.value)*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME));
int slot_type = nr_slot_select(cfg,frame,slot%fp->slots_per_frame);
int prevslot_type = nr_slot_select(cfg,frame,(slot+(fp->slots_per_frame-1))%fp->slots_per_frame);
int nextslot_type = nr_slot_select(cfg,frame,(slot+1)%fp->slots_per_frame);
int sf_extension = 0; //sf_extension = ru->sf_extension;
int siglen=fp->samples_per_slot;
int flags=1;
......@@ -747,7 +748,14 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
prevslot_type == NR_UPLINK_SLOT) {
flags = 2; // start of burst
}
if (cfg->cell_config.frame_duplex_type.value == TDD &&
slot_type == NR_DOWNLINK_SLOT &&
nextslot_type == NR_UPLINK_SLOT) {
flags = 3; // end of burst
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot );
for (i=0; i<ru->nb_tx; i++)
......@@ -1098,6 +1106,18 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
} else {
AssertFatal(0==1,"N_RB %d not yet supported for numerology %d\n",N_RB,mu);
}
} else if (mu == NR_MU_3) {
if (N_RB == 66) {
cfg->sample_rate = 122.88e6;
cfg->samples_per_frame = 1228800;
cfg->tx_bw = 100e6;
cfg->rx_bw = 100e6;
} else if(N_RB == 32) {
cfg->sample_rate=61.44e6;
cfg->samples_per_frame = 614400;
cfg->tx_bw = 50e6;
cfg->rx_bw = 50e6;
}
} else {
AssertFatal(0 == 1,"Numerology %d not supported for the moment\n",mu);
}
......@@ -1113,8 +1133,14 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
cfg->rx_num_channels=ru->nb_rx;
for (i=0; i<ru->nb_tx; i++) {
cfg->tx_freq[i] = (double)fp->dl_CarrierFreq;
cfg->rx_freq[i] = (double)fp->ul_CarrierFreq;
if (ru->if_frequency == 0) {
cfg->tx_freq[i] = (double)fp->dl_CarrierFreq;
cfg->rx_freq[i] = (double)fp->ul_CarrierFreq;
}
else {
cfg->tx_freq[i] = (double)ru->if_frequency;
cfg->rx_freq[i] = (double)(ru->if_frequency+fp->ul_CarrierFreq-fp->dl_CarrierFreq);
}
cfg->tx_gain[i] = ru->att_tx;
cfg->rx_gain[i] = ru->max_rxgain-ru->att_rx;
cfg->configFilename = rf_config_file;
......@@ -1244,7 +1270,10 @@ void *ru_thread_tx( void *param ) {
LOG_D(PHY,"ru_thread_tx: Waiting for TX processing\n");
// wait until eNBs are finished subframe RX n and TX n+4
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_RU_TX_WAIT, 1 );
wait_on_condition(&proc->mutex_gNBs,&proc->cond_gNBs,&proc->instance_cnt_gNBs,"ru_thread_tx");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_RU_TX_WAIT, 0 );
ret = pthread_mutex_lock(&proc->mutex_gNBs);
AssertFatal(ret == 0,"mutex_lock return %d\n",ret);
......@@ -1337,14 +1366,14 @@ void *ru_thread_tx( void *param ) {
ret = pthread_mutex_lock(&L1_proc->mutex_RUs_tx);
AssertFatal(ret == 0,"mutex_lock returns %d\n",ret);
// the thread can now be woken up
//if (L1_proc->instance_cnt_RUs == -1) {
if (L1_proc->instance_cnt_RUs == -1) {
L1_proc->instance_cnt_RUs = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,L1_proc->instance_cnt_RUs);
AssertFatal(pthread_cond_signal(&L1_proc->cond_RUs) == 0,
"ERROR pthread_cond_signal for gNB_L1_thread\n");
//} //else AssertFatal(1==0,"gNB TX thread is not ready\n");
} //else AssertFatal(1==0,"gNB TX thread is not ready\n");
ret = pthread_mutex_unlock(&L1_proc->mutex_RUs_tx);
AssertFatal(ret == 0,"mutex_unlock returns %d\n",ret);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,L1_proc->instance_cnt_RUs);
}
}
}
......@@ -1484,11 +1513,11 @@ void *ru_thread( void *param ) {
// do RX front-end processing (frequency-shift, dft) if needed
if (proc->tti_rx == NR_UPLINK_SLOT || fp->frame_type == FDD) {
/*if (proc->tti_rx == NR_UPLINK_SLOT || fp->frame_type == FDD) {
if (ru->feprx) ru->feprx(ru,proc->tti_rx);
}
}*/
LOG_D(PHY,"RU proc: frame_rx = %d, tti_rx = %d\n", proc->frame_rx, proc->tti_rx);
LOG_D(PHY,"Copying rxdataF from RU to gNB\n");
......@@ -2328,6 +2357,7 @@ void RCconfig_RU(void)
RC.ru[j]->nb_rx = *(RUParamList.paramarray[j][RU_NB_RX_IDX].uptr);
RC.ru[j]->att_tx = *(RUParamList.paramarray[j][RU_ATT_TX_IDX].uptr);
RC.ru[j]->att_rx = *(RUParamList.paramarray[j][RU_ATT_RX_IDX].uptr);
RC.ru[j]->if_frequency = *(RUParamList.paramarray[j][RU_IF_FREQUENCY].uptr);
if (config_isparamset(RUParamList.paramarray[j], RU_BF_WEIGHTS_LIST_IDX)) {
RC.ru[j]->nb_bfw = RUParamList.paramarray[j][RU_BF_WEIGHTS_LIST_IDX].numelt;
......
......@@ -127,7 +127,7 @@ extern pthread_mutex_t sync_mutex;
extern int sync_var;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int rx_input_level_dBm;
......
......@@ -114,7 +114,7 @@ int single_thread_flag=1;
static int8_t threequarter_fs=0;
uint32_t downlink_frequency[MAX_NUM_CCs][4];
uint64_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
//Temp fix for inexisting NR upper layer
......@@ -692,7 +692,7 @@ void wait_RUs(void) {
}
void wait_gNBs(void) {
int i,j;
int i;
int waiting=1;
while (waiting==1) {
......@@ -867,7 +867,7 @@ void init_pdcp(void) {
int main( int argc, char **argv )
{
int i, ru_id, CC_id = 0;
int ru_id, CC_id = 0;
start_background_system();
///static configuration for NR at the moment
......
......@@ -26,7 +26,7 @@
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:DEFAULT_DLF, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, u64ptr:&(downlink_frequency[0][0]), defuintval:DEFAULT_DLF, TYPE_UINT64, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
......
......@@ -170,7 +170,6 @@ static void UE_synch(void *arg) {
UE->is_synchronized = 0;
if (UE->UE_scan == 0) {
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu64", UL %"PRIu64" (oai_exit %d, rx_num_channels %d)\n",
UE->frame_parms.dl_CarrierFreq, UE->frame_parms.ul_CarrierFreq,
oai_exit, openair0_cfg[0].rx_num_channels);
......@@ -292,6 +291,12 @@ static void UE_synch(void *arg) {
openair0_cfg[UE->rf_map.card].tx_bw=10.0e6;
// openair0_cfg[0].rx_gain[0] -= 0;
break;
case 66:
openair0_cfg[UE->rf_map.card].sample_rate=122.88e6;
openair0_cfg[UE->rf_map.card].rx_bw=100.e6;
openair0_cfg[UE->rf_map.card].tx_bw=100.e6;
break;
}
if (UE->mode != loop_through_memory) {
......@@ -383,7 +388,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
rvidx = 0;
//------------------------------------------------------------------------------//
scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT;
//scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT;
scheduled_response.ul_config->number_pdus = 1;
scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
......@@ -410,6 +415,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
uint8_t ssb_period = UE->nrUE_config.ssb_table.ssb_period;
//program DCI for slot 1
//TODO: all of this has to be moved to the MAC!!!
......@@ -427,6 +433,13 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
scheduled_response.tx_request = NULL;
scheduled_response.module_id = UE->Mod_id;
scheduled_response.CC_id = 0;
if (!((proc->frame_rx)%(1<<(ssb_period-1)))) {
if(proc->frame_rx > dcireq.dl_config_req.sfn)
UE->frame_gap = proc->frame_rx - dcireq.dl_config_req.sfn;
if(proc->frame_rx < dcireq.dl_config_req.sfn)
UE->frame_gap = dcireq.dl_config_req.sfn - proc->frame_rx;
proc->frame_rx = dcireq.dl_config_req.sfn;
}
scheduled_response.frame = proc->frame_rx;
scheduled_response.slot = proc->nr_tti_rx;
......@@ -602,7 +615,6 @@ void *UE_thread(void *arg) {
openair0_timestamp timestamp;
void *rxp[NB_ANTENNAS_RX], *txp[NB_ANTENNAS_TX];
int start_rx_stream = 0;
const uint16_t table_sf_slot[20] = {0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9};
AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), "");
UE->rfdevice.host_type = RAU_HOST;
AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n");
......@@ -618,7 +630,7 @@ void *UE_thread(void *arg) {
newNotifiedFIFO_elt(sizeof(processingData_t), 0,&nf,UE_processing));
bool syncRunning=false;
const int nb_slot_frame = 10*UE->frame_parms.slots_per_subframe;
const int nb_slot_frame = UE->frame_parms.slots_per_frame;
int absolute_slot=0, decoded_frame_rx=INT_MAX, trashed_frames=0;
while (!oai_exit) {
......@@ -688,11 +700,11 @@ void *UE_thread(void *arg) {
curMsg->UE->current_thread_id[slot_nr] = thread_idx;
curMsg->proc.CC_id = 0;
curMsg->proc.nr_tti_rx= slot_nr;
curMsg->proc.subframe_rx=table_sf_slot[slot_nr];
curMsg->proc.subframe_rx=slot_nr/(nb_slot_frame/10);
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = ( absolute_slot/nb_slot_frame ) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ( (absolute_slot + DURATION_RX_TO_TX) /nb_slot_frame ) % MAX_FRAME_NUMBER;
curMsg->proc.frame_rx = ((absolute_slot/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = (((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
......@@ -735,9 +747,9 @@ void *UE_thread(void *arg) {
readBlockSize,
UE->frame_parms.nb_antennas_rx),"");
if (slot_nr==18)
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
if (slot_nr==18)
AssertFatal(writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
timestamp+
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_slot) -
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0 -
......
......@@ -122,7 +122,7 @@ static double snr_dB=20;
int threequarter_fs=0;
uint32_t downlink_frequency[MAX_NUM_CCs][4];
uint64_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
......@@ -517,8 +517,17 @@ void init_openair0(void) {
for (card=0; card<MAX_CARDS; card++) {
openair0_cfg[card].configFilename = NULL;
openair0_cfg[card].threequarter_fs = frame_parms[0]->threequarter_fs;
numerology = frame_parms[0]->numerology_index;
if(frame_parms[0]->N_RB_DL == 217) {
if(frame_parms[0]->N_RB_DL == 66) {
if (numerology==3) {
openair0_cfg[card].sample_rate=122.88e6;
openair0_cfg[card].samples_per_frame = 1228800;
} else {
LOG_E(PHY,"Unsupported numerology! FR2 supports only 120KHz SCS for now.\n");
exit(-1);
}
}else if(frame_parms[0]->N_RB_DL == 217) {
if (numerology==1) {
if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=92.16e6;
......
......@@ -69,7 +69,7 @@
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT64, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:&do_forms, defintval:0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0}, \
......@@ -79,7 +79,7 @@
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&numerology, defintval:0, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, 0, iptr:&numerology, defintval:0, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
......
......@@ -129,7 +129,8 @@ typedef struct {
///
#define NFAPI_RX_IND_MAX_PDU 100
typedef struct {
uint32_t sfn_slot;
uint16_t sfn;
uint16_t slot;
uint16_t number_pdus;
fapi_nr_rx_indication_body_t rx_indication_body[NFAPI_RX_IND_MAX_PDU];
} fapi_nr_rx_indication_t;
......@@ -148,7 +149,8 @@ typedef struct {
///
typedef struct {
uint32_t sfn_slot;
uint16_t sfn;
uint16_t slot;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_body_t *tx_request_body;
......@@ -304,7 +306,8 @@ typedef struct {
} fapi_nr_ul_config_request_pdu_t;
typedef struct {
uint32_t sfn_slot;
uint16_t sfn;
uint16_t slot;
uint8_t number_pdus;
fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM];
} fapi_nr_ul_config_request_t;
......@@ -383,7 +386,8 @@ typedef struct {
} fapi_nr_dl_config_request_pdu_t;
typedef struct {
uint32_t sfn_slot;
uint16_t sfn;
uint16_t slot;
uint8_t number_pdus;
fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
} fapi_nr_dl_config_request_t;
......
......@@ -97,7 +97,7 @@
#define NR_LDPC_SIZE_BN_PROC_BUF NR_LDPC_NUM_EDGE_BG1*NR_LDPC_ZMAX
/** Maximum number of possible input LLR = NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX */
#define NR_LDPC_MAX_NUM_LLR 26112
#define NR_LDPC_MAX_NUM_LLR 27000
// ==============================================================================
// GLOBAL CONSTANT VARIABLES
......
......@@ -334,7 +334,7 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
uint8_t rvidx,
uint32_t E)
{
uint32_t Ncb,ind,k,Nref,N;
uint32_t Ncb,ind,k=0,Nref,N;
if (C==0) {
printf("nr_rate_matching: invalid parameters (C %d\n",C);
......
......@@ -979,14 +979,14 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config,
config->subframe_config.numerology_index_mu.value =1;
config->subframe_config.duplex_mode.value = 1; //FDD
config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config->rf_config.dl_carrier_bandwidth.value = 106;
config->rf_config.ul_carrier_bandwidth.value = 106;
config->rf_config.dl_carrier_bandwidth.value = 100;
config->rf_config.ul_carrier_bandwidth.value = 100;
config->sch_config.physical_cell_id.value = 0;
frame_parms->frame_type = FDD;
//frame_parms[CC_id]->tdd_config_S = 0;
frame_parms->N_RB_DL = 100;
frame_parms->N_RB_UL = 100;
frame_parms->N_RB_DL = 106;
frame_parms->N_RB_UL = 106;
frame_parms->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms->Nid_cell = 0;
......
......@@ -25,7 +25,9 @@
/// Subcarrier spacings in Hz indexed by numerology index
uint32_t nr_subcarrier_spacing[MAX_NUM_SUBCARRIER_SPACING] = {15e3, 30e3, 60e3, 120e3, 240e3};
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 16, 32};
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 8, 16};
int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp)
{
......@@ -192,6 +194,22 @@ void set_scs_parameters (NR_DL_FRAME_PARMS *fp, int mu)
fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3];
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_3];
fp->ssb_type = nr_ssb_type_D;
switch(fp->N_RB_DL){
case 66:
fp->ofdm_symbol_size = 1024;
fp->first_carrier_offset = 628; //1024 - ( (66*12) / 2 )
fp->nb_prefix_samples0 = 88;
fp->nb_prefix_samples = 72;
break;
case 32:
fp->ofdm_symbol_size = 512;
fp->first_carrier_offset = 320; //1024 - ( (66*12) / 2 )
fp->nb_prefix_samples0 = 44;
fp->nb_prefix_samples = 36;
break;
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", fp->N_RB_DL, mu, fp);
}
break;
case NR_MU_4:
......
......@@ -117,8 +117,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
return(-1);
}*/
if (Ns<0 || Ns>=20) {
printf("slot_fep: Ns must be between 0 and 19\n");
if (Ns<0 || Ns>(frame_parms->slots_per_frame-1)) {
printf("slot_fep: Ns must be between 0 and %d\n",frame_parms->slots_per_frame-1);
return(-1);
}
......
......@@ -226,7 +226,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
uint8_t Lmax,
int sfn,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) {
......@@ -242,13 +241,13 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
///Payload generation
memset((void *)pbch, 0, sizeof(NR_gNB_PBCH));
pbch->pbch_a=0;
uint8_t ssb_index = ssb_pdu->ssb_pdu_rel15.SsbBlockIndex;
uint8_t ssb_index = frame_parms->ssb_index;
uint8_t *pbch_pdu = (uint8_t*)&ssb_pdu->ssb_pdu_rel15.bchPayload;
uint8_t Lmax = frame_parms->Lmax;
for (int i=0; i<NR_PBCH_PDU_BITS; i++)
pbch->pbch_a |= ((pbch_pdu[i>>3]>>(7-(i&7)))&1)<<i;
#ifdef DEBUG_PBCH_ENCODING
for (int i=0; i<3; i++)
printf("pbch_pdu[%d]: 0x%02x\n", i, pbch_pdu[i]);
......
......@@ -32,6 +32,7 @@
#include "PHY/defs_gNB.h"
#include "PHY/NR_TRANSPORT/nr_transport.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto_common.h"
extern uint16_t NCS_unrestricted_delta_f_RA_125[16];
extern uint16_t NCS_restricted_TypeA_delta_f_RA_125[15];
......@@ -381,7 +382,7 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
int16_t **rxsigF = gNB->prach_vars.rxsigF;
uint8_t preamble_index;
uint16_t NCS,NCS2;
uint16_t NCS=99,NCS2;
uint16_t preamble_offset=0,preamble_offset_old;
int16_t preamble_shift=0;
uint32_t preamble_shift2;
......@@ -393,7 +394,6 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
uint16_t u;
int16_t *Xu=0;
uint16_t offset;
int16_t Ncp;
uint16_t first_nonzero_root_idx=0;
uint8_t new_dft=0;
uint8_t aa;
......@@ -454,6 +454,8 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
NCS = NCS_unrestricted_delta_f_RA_15[Ncs_config];
}
AssertFatal(NCS!=99,"NCS has not been set\n");
if (gNB) start_meas(&gNB->rx_prach);
......
......@@ -40,6 +40,8 @@
#include "T.h"
void init_nr_prach_tables(int N_ZC);
void dump_nr_prach_config(NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe) {
FILE *fd;
......
......@@ -23,6 +23,7 @@
#define __NR_TRANSPORT__H__
#include "PHY/defs_gNB.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#define NR_PBCH_PDU_BITS 24
......@@ -91,7 +92,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
uint8_t Lmax,
int sfn,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
......
......@@ -206,3 +206,11 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx);
void rx_nr_prach(PHY_VARS_gNB *gNB,
int frame,
int subframe,
uint16_t *max_preamble,
uint16_t *max_preamble_energy,
uint16_t *max_preamble_delay
);
......@@ -1648,6 +1648,8 @@ uint8_t get_num_prach_tdd(module_id_t Mod_id);
*/
uint8_t get_prach_fmt(uint8_t prach_ConfigIndex,lte_frame_type_t frame_type);
uint16_t get_nr_prach_fmt(int prach_ConfigIndex,lte_frame_type_t frame_type, nr_frequency_range_e fr);
/*!
\brief Helper for MAC, returns frequency index of PRACH resource in TDD for a particular configuration index
@param frame_parms Pointer to NR_DL_FRAME_PARMS structure
......
......@@ -39,6 +39,7 @@
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/CODING/coding_extern.h"
#include "PHY/sse_intrin.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
#include "assertions.h"
#include "T.h"
......@@ -725,52 +726,52 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
s,
log2_maxh,
n_rb); // log2_maxh+I0_shift
if (frame_parms->nb_antennas_rx > 1) {
LOG_DD("we enter pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n",
frame_parms->nb_antennas_rx);
pdcch_detection_mrc(frame_parms, pdcch_vars->rxdataF_comp,s);
}
if (frame_parms->nb_antennas_rx > 1) {
LOG_DD("we enter pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n",
frame_parms->nb_antennas_rx);
pdcch_detection_mrc(frame_parms, pdcch_vars->rxdataF_comp,s);
}
LOG_DD("we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s);
LOG_DD("in nr_pdcch_llr(rxdataF_comp -> llr)\n");
nr_pdcch_llr(frame_parms,
pdcch_vars->rxdataF_comp,
pdcch_vars->llr,
s,
n_rb);
LOG_DD("we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s);
LOG_DD("in nr_pdcch_llr(rxdataF_comp -> llr)\n");
nr_pdcch_llr(frame_parms,
pdcch_vars->rxdataF_comp,
pdcch_vars->llr,
s,
n_rb);
#if T_TRACER
// T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
// T_INT(n_pdcch_symbols),
// T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
// T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
// T_INT(n_pdcch_symbols),
// T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
#endif
#ifdef DEBUG_DCI_DECODING
printf("demapping: slot %d, mi %d\n",slot,get_mi(frame_parms,slot));
printf("demapping: slot %d, mi %d\n",slot,get_mi(frame_parms,slot));
#endif
}
LOG_DD("we enter nr_pdcch_demapping_deinterleaving()\n");
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) pdcch_vars->e_rx,
frame_parms,
rel15->coreset.duration,
n_rb,
rel15->coreset.RegBundleSize,
rel15->coreset.InterleaverSize,
rel15->coreset.ShiftIndex);
nr_pdcch_unscrambling(rel15->rnti,
frame_parms,
slot,
pdcch_vars->e_rx,
rel15->coreset.duration*n_rb*9*2,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15->coreset.pdcch_dmrs_scrambling_id);
LOG_DD("we end nr_pdcch_unscrambling()\n");
LOG_DD("Ending nr_rx_pdcch() function\n");
return (0);
}
LOG_DD("we enter nr_pdcch_demapping_deinterleaving()\n");
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) pdcch_vars->e_rx,
frame_parms,
rel15->coreset.duration,
n_rb,
rel15->coreset.RegBundleSize,
rel15->coreset.InterleaverSize,
rel15->coreset.ShiftIndex);
nr_pdcch_unscrambling(rel15->rnti,
frame_parms,
slot,
pdcch_vars->e_rx,
rel15->coreset.duration*n_rb*9*2,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15->coreset.pdcch_dmrs_scrambling_id);
LOG_DD("we end nr_pdcch_unscrambling()\n");
LOG_DD("Ending nr_rx_pdcch() function\n");
}
return (0);
}
/*
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
......
......@@ -46,7 +46,7 @@
//#define DEBUG_DLSCH_DECODING 1
//#define ENABLE_PHY_PAYLOAD_DEBUG 1
#define OAI_LDPC_MAX_NUM_LLR 27000//26112 // NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX
//#define OAI_LDPC_MAX_NUM_LLR 27000//26112 // NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX
static uint64_t nb_total_decod =0;
static uint64_t nb_error_decod =0;
......@@ -85,13 +85,13 @@ void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr,uint8_t N_RB_DL)
for (r=0; r<a_segments; r++)
if (dlsch->harq_processes[i]->d[r]) {
free16(dlsch->harq_processes[i]->d[r],(3*8448)*sizeof(short));
free16(dlsch->harq_processes[i]->d[r],(5*8448)*sizeof(short));
dlsch->harq_processes[i]->d[r] = NULL;
}
for (r=0; r<a_segments; r++)
if (dlsch->harq_processes[i]->w[r]) {
free16(dlsch->harq_processes[i]->w[r],(3*8448)*sizeof(short));
free16(dlsch->harq_processes[i]->w[r],(5*8448)*sizeof(short));
dlsch->harq_processes[i]->w[r] = NULL;
}
......@@ -122,7 +122,7 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
if (N_RB_DL != 273) {
a_segments = a_segments*N_RB_DL;
a_segments = a_segments/273;
a_segments = (a_segments/273)+1;
}
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
......@@ -161,17 +161,17 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
else
exit_flag=2;
dlsch->harq_processes[i]->d[r] = (short*)malloc16((3*8448)*sizeof(short));
dlsch->harq_processes[i]->d[r] = (short*)malloc16((5*8448)*sizeof(short));
if (dlsch->harq_processes[i]->d[r])
memset(dlsch->harq_processes[i]->d[r],0,(3*8448)*sizeof(short));
memset(dlsch->harq_processes[i]->d[r],0,(5*8448)*sizeof(short));
else
exit_flag=2;
dlsch->harq_processes[i]->w[r] = (short*)malloc16((3*8448)*sizeof(short));
dlsch->harq_processes[i]->w[r] = (short*)malloc16((5*8448)*sizeof(short));
if (dlsch->harq_processes[i]->w[r])
memset(dlsch->harq_processes[i]->w[r],0,(3*8448)*sizeof(short));
memset(dlsch->harq_processes[i]->w[r],0,(5*8448)*sizeof(short));
else
exit_flag=2;
}
......@@ -238,7 +238,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
int32_t no_iteration_ldpc, length_dec;
uint32_t r,r_offset=0,Kr=8424,Kr_bytes,K_bytes_F,err_flag=0;
uint8_t crc_type;
int8_t llrProcBuf[OAI_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
int8_t llrProcBuf[NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
t_nrLDPC_dec_params decParams;
t_nrLDPC_dec_params* p_decParams = &decParams;
t_nrLDPC_time_stats procTime;
......@@ -782,7 +782,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
t_nrLDPC_dec_params* p_decParams = &decParams;
t_nrLDPC_time_stats procTime;
t_nrLDPC_time_stats* p_procTime =&procTime ;
int8_t llrProcBuf[OAI_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
int8_t llrProcBuf[NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
if (!harq_process) {
printf("dlsch_decoding.c: NULL harq_process pointer\n");
return(dlsch->max_ldpc_iterations);
......@@ -1349,7 +1349,7 @@ void *nr_dlsch_decoding_process(void *arg)
t_nrLDPC_dec_params* p_decParams = &decParams;
t_nrLDPC_time_stats procTime;
t_nrLDPC_time_stats* p_procTime =&procTime ;
int8_t llrProcBuf[OAI_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
int8_t llrProcBuf[NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
t_nrLDPC_procBuf* p_nrLDPC_procBuf;
int16_t z [68*384];
int8_t l [68*384];
......
......@@ -234,7 +234,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
start_rb = dlsch0_harq->start_rb;
nb_rb_pdsch = dlsch0_harq->nb_rb;
int lbar;
DevAssert(dlsch0_harq);
round = dlsch0_harq->round;
......
......@@ -588,6 +588,12 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
ue->symbol_offset = nr_get_ssb_start_symbol(frame_parms);
uint8_t frame_number_4lsb = 0;
for (int i=0; i<4; i++)
frame_number_4lsb |= ((nr_ue_pbch_vars->xtra_byte>>i)&1)<<(3-i);
proc->decoded_frame_rx = frame_number_4lsb;
#ifdef DEBUG_PBCH
printf("xtra_byte %x payload %x\n", nr_ue_pbch_vars->xtra_byte, payload);
......@@ -602,7 +608,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
dl_indication.proc=proc; // needed to signal back the frame number -> FIXME
dl_indication.proc=proc;
dl_indication.module_id=0;
dl_indication.cc_id=proc->CC_id;
......
......@@ -42,6 +42,8 @@
#include "UTIL/LISTS/list.h"
#endif
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
//#include "../LTE_TRANSPORT/transport_common.h"
// structures below implement 36-211 and 36-212
......
......@@ -39,7 +39,7 @@
#include "PHY/CODING/nrLDPC_encoder/defs.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr,unsigned char N_RB_UL)
......
......@@ -606,6 +606,8 @@ typedef struct RU_t_s {
int wakeup_L1_sleeptime;
/// maximum number of sleeps
int wakeup_L1_sleep_cnt_max;
/// DL IF frequency in Hz
uint64_t if_frequency;
} RU_t;
......
......@@ -872,6 +872,8 @@ typedef struct {
fapi_nr_config_request_t nrUE_config;
uint16_t frame_gap;
// the following structures are not part of PHY_vars_UE anymore as it is not thread safe. They are now on the stack of the functions that actually need them
//nr_downlink_indication_t dl_indication;
......
......@@ -352,6 +352,7 @@ typedef struct nr_bandentry_s {
uint64_t dl_max;
uint64_t step_size;
uint64_t N_OFFs_DL;
uint8_t deltaf_raster;
} nr_bandentry_t;
typedef struct nr_band_info_s {
......
......@@ -132,7 +132,6 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
PHY_VARS_gNB *gNB;
// copy data from L2 interface into L1 structures
module_id_t Mod_id = Sched_INFO->module_id;
uint8_t CC_id = Sched_INFO->CC_id;
nfapi_nr_dl_tti_request_t *DL_req = Sched_INFO->DL_req;
nfapi_nr_tx_data_request_t *TX_req = Sched_INFO->TX_req;
nfapi_nr_ul_tti_request_t *UL_tti_req = Sched_INFO->UL_tti_req;
......@@ -146,18 +145,16 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
gNB = RC.gNB[Mod_id];
uint8_t number_dl_pdu = DL_req->dl_tti_request_body.nPDUs;
uint8_t number_ul_pdu = 0;
// uint8_t number_ul_pdu = 0;
uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus;
if (UL_tti_req != NULL) number_ul_pdu = UL_tti_req->n_pdus;
// if (UL_tti_req != NULL) number_ul_pdu = UL_tti_req->n_pdus;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d%d DL_req:SFN/SLO:%04d%d:dl_pdu:%d tx_req:SFN/SLOT:%04d%d:pdus:%d;\n",
frame,slot,
DL_req->SFN,DL_req->Slot,number_dl_pdu,
TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs);
int do_oai =0;
int dont_send =0;
int pdcch_received=0;
gNB->num_pdsch_rnti=0;
gNB->pdcch_pdu = NULL;
......@@ -169,7 +166,6 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
gNB->pbch_configured=1;
do_oai=1;
handle_nr_nfapi_ssb_pdu(gNB,frame,slot,
dl_tti_pdu);
......@@ -183,19 +179,17 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
&dl_tti_pdu->pdcch_pdu);
pdcch_received = 1;
do_oai=1;
break;
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
{
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
uint16_t tx_pdus = TX_req->Number_of_PDUs;
AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
pduIndex,TX_req->pdu_list[pduIndex].num_TLV);
uint8_t *sdu = TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
handle_nr_nfapi_pdsch_pdu(gNB,frame,slot,&dl_tti_pdu->pdsch_pdu, sdu);
do_oai=1;
}
}
}
......
......@@ -30,9 +30,9 @@
* \warning
*/
#include "PHY/defs_eNB.h"
#include "PHY/defs_gNB.h"
#include "PHY/phy_extern.h"
#include "SCHED/sched_eNB.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "nfapi_nr_interface_scf.h"
#include "fapi_nr_l1.h"
#include "nfapi_pnf.h"
......@@ -71,12 +71,13 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int subframe) {
for (i=0;i<gNB->num_RU;i++) {
ru=gNB->RU_list[i];
for (ru_aa=0,aa=0;ru_aa<ru->nb_rx;ru_aa++,aa++) {
gNB->prach_vars.rxsigF[0][aa] = gNB->RU_list[i]->prach_rxsigF[ru_aa];
gNB->prach_vars.rxsigF[aa] = gNB->RU_list[i]->prach_rxsigF[ru_aa];
}
}
rx_nr_prach(gNB,
0,
frame,
subframe,
&max_preamble[0],
&max_preamble_energy[0],
&max_preamble_delay[0]
......
......@@ -48,41 +48,9 @@
#include "intertask_interface.h"
#endif
extern uint8_t nfapi_mode;
/*
int return_ssb_type(nfapi_config_request_t *cfg)
{
int mu = cfg->subframe_config.numerology_index_mu.value;
nr_ssb_type_e ssb_type;
switch(mu) {
case NR_MU_0:
ssb_type = nr_ssb_type_A;
break;
case NR_MU_1:
ssb_type = nr_ssb_type_B;
break;
case NR_MU_3:
ssb_type = nr_ssb_type_D;
break;
case NR_MU_4:
ssb_type = nr_ssb_type_E;
break;
default:
AssertFatal(0==1, "Invalid numerology index %d for the synchronization block\n", mu);
}
LOG_D(PHY, "SSB type %d\n", ssb_type);
return ssb_type;
}*/
uint8_t SSB_Table[38]={0,2,4,6,8,10,12,14,254,254,16,18,20,22,24,26,28,30,254,254,32,34,36,38,40,42,44,46,254,254,48,50,52,54,56,58,60,62};
extern uint8_t nfapi_mode;
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp) {
fp->ssb_start_subcarrier = (12 * cfg->ssb_table.ssb_offset_point_a.value + cfg->ssb_table.ssb_subcarrier_offset.value);
......@@ -90,13 +58,14 @@ void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME
}
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF;
uint8_t ssb_index, n_hf;
int ssb_start_symbol, rel_slot;
uint16_t ssb_start_symbol, rel_slot;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = fp->slots_per_frame / 2;
uint16_t slots_per_hf = (fp->slots_per_frame)>>1;
n_hf = fp->half_frame_bit;
......@@ -108,41 +77,42 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
n_hf=1;
}
// to set a effective slot number between 0 to 9 in the half frame where the SSB is supposed to be
// to set a effective slot number in the half frame where the SSB is supposed to be
rel_slot = (n_hf)? (slot-slots_per_hf) : slot;
LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot);
if(rel_slot<10 && rel_slot>=0) {
if(rel_slot<38 && rel_slot>=0) { // there is no SSB beyond slot 37
for (int i=0; i<2; i++) { // max two SSB per frame
ssb_index = i + 2*rel_slot; // computing the ssb_index
if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
gNB->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = ssb_index;
ssb_index = i + SSB_Table[rel_slot]; // computing the ssb_index
if ((ssb_index<64) && ((fp->L_ssb >> ssb_index) & 0x01)) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
fp->ssb_index = ssb_index;
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % fp->symbols_per_slot; // start symbol wrt slot
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
&gNB->ssb_pdu,
gNB->nr_pbch_interleaver,
&gNB->ssb_pdu,
gNB->nr_pbch_interleaver,
&txdataF[0][txdataF_offset],
AMP,
ssb_start_symbol,
n_hf,cfg->carrier_config.num_tx_ant.value,
frame, cfg, fp);
n_hf, frame, cfg, fp);
}
}
}
......@@ -161,7 +131,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
if (cfg->ssb_table.ssb_period.value > 1)
ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ; // 10ms is the frame length
ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ;
if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
(nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT)) return;
......@@ -321,6 +291,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_
case 106: timing_advance_update /= 16; break;
case 217: timing_advance_update /= 32; break;
case 273: timing_advance_update /= 32; break;
case 66: timing_advance_update /= 12; break;
default: abort();
}
......
......@@ -370,7 +370,7 @@ void nr_compute_srs_pos(lte_frame_type_t frameType,uint16_t isrs,uint16_t *psrsP
void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx);
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp, int mib_sfn);
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
/*@}*/
......
......@@ -128,7 +128,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
*/
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
#endif
......@@ -3273,7 +3273,7 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
if (!dlsch1) {
int harq_pid = dlsch0->current_harq_pid;
uint16_t BWPStart = dlsch0->harq_processes[harq_pid]->BWPStart;
uint16_t BWPSize = dlsch0->harq_processes[harq_pid]->BWPSize;
// uint16_t BWPSize = dlsch0->harq_processes[harq_pid]->BWPSize;
uint16_t pdsch_start_rb = dlsch0->harq_processes[harq_pid]->start_rb;
uint16_t pdsch_nb_rb = dlsch0->harq_processes[harq_pid]->nb_rb;
uint16_t s0 = dlsch0->harq_processes[harq_pid]->start_symbol;
......@@ -4027,9 +4027,9 @@ void *UE_thread_slot1_dl_processing(void *arg) {
#endif
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp, int mib_sfn) {
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp) {
int ssb_slot_decoded = (fp->ssb_index)/2;
int ssb_slot_decoded = (fp->ssb_index>>1) + ((fp->ssb_index>>4)<<1); //slot in which the decoded SSB can be found
if (config->ssb_table.ssb_period == 0) {
// check for pbch in corresponding slot each half frame
......@@ -4040,7 +4040,7 @@ int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL
}
else {
// if the current frame is supposed to contain ssb
if (!((frame-(mib_sfn))%(1<<config->ssb_table.ssb_period)))
if (!(frame%(1<<(config->ssb_table.ssb_period-1))))
return(slot == ssb_slot_decoded);
else
return 0;
......@@ -4081,7 +4081,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
if (pdcch_vars->nb_search_space > 0)
get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_tti_rx, fp, proc->decoded_frame_rx);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_tti_rx, fp);
// looking for pbch only in slot where it is supposed to be
if ((ue->decode_MIB == 1) && slot_pbch)
......
......@@ -78,7 +78,7 @@ extern double cpuf;
void Msg1_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id);
void Msg3_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id);
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
void get_dumpparam(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
......
......@@ -92,7 +92,7 @@ int main(int argc, char **argv)
//char input_val_str[50],input_val_str2[50];
//uint16_t NB_RB=25;
SCM_t channel_model = AWGN; //Rayleigh1_anticorr;
uint16_t N_RB_DL = 106, mu = 1;
uint16_t N_RB_DL = 106, mu = 1;
//unsigned char frame_type = 0;
unsigned char pbch_phase = 0;
int frame = 0, slot = 0;
......@@ -628,7 +628,7 @@ int main(int argc, char **argv)
for (i = 0; i < 2; i++) {
printf("gNB %d\n", i);
free_gNB_dlsch(&(gNB->dlsch[0][i]));
free_gNB_dlsch(&(gNB->dlsch[0][i]),N_RB_DL);
printf("UE %d\n", i);
free_nr_ue_dlsch(&(UE->dlsch[0][0][i]),N_RB_DL);
}
......
......@@ -202,7 +202,6 @@ int main(int argc, char **argv)
int N_RB_DL=106,mu=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config;
//unsigned char frame_type = 0;
int frame=0,slot=1;
......@@ -233,7 +232,7 @@ int main(int argc, char **argv)
int mcsIndex_set=0,rbStart_set=0,rbSize_set=0;
int print_perf = 0;
while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:")) != -1) {
while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:m:")) != -1) {
switch (c) {
/*case 'f':
write_output_file=1;
......@@ -381,6 +380,7 @@ int main(int argc, char **argv)
case 'I':
run_initial_sync=1;
target_error_rate=0.1;
slot = 0;
break;
case 'L':
......@@ -408,6 +408,9 @@ int main(int argc, char **argv)
mcsIndex_set=1;
break;
case 'm':
mu = atoi(optarg);
break;
default:
case 'h':
......@@ -546,6 +549,14 @@ int main(int argc, char **argv)
fs = 61.44e6;
bw = 40e6;
}
else if (mu == 3 && N_RB_DL == 66) {
fs = 122.88e6;
bw = 100e6;
}
else if (mu == 3 && N_RB_DL == 32) {
fs = 61.44e6;
bw = 50e6;
}
else AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);
gNB2UE = new_channel_desc_scm(n_tx,
......@@ -619,9 +630,8 @@ int main(int argc, char **argv)
nr_gold_pbch(UE);
nr_gold_pdcch(UE,0,2);
nr_l2_init_ue();
nr_l2_init_ue(NULL);
UE_mac = get_mac_inst(0);
UE->if_inst = nr_ue_if_module_init(0);
......@@ -651,14 +661,13 @@ int main(int argc, char **argv)
if (mcsIndex_set==0) dlsch_config.mcsIndex[0]=9;
if (rbSize_set==0) dlsch_config.rbSize=N_RB_DL;
if (rbStart_set==0) dlsch_config.rbStart=0;
//Configure UE
rrc.carrier.MIB = (uint8_t*) malloc(4);
rrc.carrier.sizeof_MIB = do_MIB_NR(&rrc,0);
nr_rrc_mac_config_req_ue(0,0,0,rrc.carrier.mib.message.choice.mib,scc,secondaryCellGroup->spCellConfig);
nr_rrc_mac_config_req_ue(0,0,0,rrc.carrier.mib.message.choice.mib,secondaryCellGroup->spCellConfig);
nr_dcireq_t dcireq;
......
......@@ -553,7 +553,7 @@ int main(int argc, char **argv)
scheduled_response.ul_config = &ul_config;
scheduled_response.dl_config = NULL;
ul_config.sfn_slot = slot;
ul_config.slot = slot;
ul_config.number_pdus = 1;
ul_config.ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config.ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
......
......@@ -94,6 +94,7 @@ typedef enum {
#define CONFIG_STRING_RU_END_OF_BURST_DELAY "end_of_burst_delay"
#define CONFIG_STRING_RU_OTA_SYNC_ENABLE "ota_sync_enabled"
#define CONFIG_STRING_RU_BF_WEIGHTS_LIST "bf_weights"
#define CONFIG_STRING_RU_IF_FREQUENCY "if_freq"
#define RU_LOCAL_IF_NAME_IDX 0
#define RU_LOCAL_ADDRESS_IDX 1
......@@ -120,6 +121,7 @@ typedef enum {
#define RU_END_OF_BURST_DELAY_IDX 22
#define RU_OTA_SYNC_ENABLE_IDX 23
#define RU_BF_WEIGHTS_LIST_IDX 24
#define RU_IF_FREQUENCY 25
/*-----------------------------------------------------------------------------------------------------------------------------------------*/
/* RU configuration parameters */
......@@ -151,6 +153,7 @@ typedef enum {
{CONFIG_STRING_RU_END_OF_BURST_DELAY, NULL, 0, uptr:NULL, defuintval:400, TYPE_UINT, 0}, \
{CONFIG_STRING_RU_OTA_SYNC_ENABLE, NULL, 0, strptr:NULL, defstrval:"no", TYPE_STRING, 0}, \
{CONFIG_STRING_RU_BF_WEIGHTS_LIST, NULL, 0, iptr:NULL, defintarrayval:DEFBFW, TYPE_INTARRAY, 0}, \
{CONFIG_STRING_RU_IF_FREQUENCY, NULL, 0, uptr:NULL, defuintval:0, TYPE_UINT64, 0}, \
}
/*---------------------------------------------------------------------------------------------------------------------------------------*/
......
......@@ -366,14 +366,14 @@
{GNB_CONFIG_STRING_HOPPINGID, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId,defint64val:40,TYPE_INT64,0},\
{GNB_CONFIG_STRING_P0NOMINAL, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal,defint64val:1,TYPE_INT64,0},\
{GNB_CONFIG_STRING_SSBPOSITIONSINBURSTPR,NULL,0,uptr:&scc->ssb_PositionsInBurst->present,defuintval:NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap,TYPE_UINT,0/*139*/}, \
{GNB_CONFIG_STRING_SSBPOSITIONSINBURST,NULL,0,iptr:&ssb_bitmap,defintval:0xff,TYPE_INT,0}, \
{GNB_CONFIG_STRING_SSBPOSITIONSINBURST,NULL,0,u64ptr:&ssb_bitmap,defintval:0xff,TYPE_UINT64,0}, \
{GNB_CONFIG_STRING_REFERENCESUBCARRIERSPACING,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing,defint64val:NR_SubcarrierSpacing_kHz30,TYPE_INT64,0},\
{GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity,defint64val:NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms0p5,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFDOWNLINKSLOTS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,defint64val:7,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFDOWNLINKSYMBOLS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,defint64val:6,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFUPLINKSLOTS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,defint64val:2,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFUPLINKSYMBOLS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols,defint64val:4,TYPE_INT64,0},\
{GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY2,NULL,0,iptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity,defintval:-1,TYPE_INT,0},\
{GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity,defintval:-1,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFDOWNLINKSLOTS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots,defint64val:-1,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFDOWNLINKSYMBOLS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols,defint64val:-1,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFUPLINKSLOTS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots,defint64val:-1,TYPE_INT64,0},\
......
......@@ -79,7 +79,7 @@
extern uint16_t sf_ahead;
extern int config_check_band_frequencies(int ind, int16_t band, uint32_t downlink_frequency,
extern int config_check_band_frequencies(int ind, int16_t band, uint64_t downlink_frequency,
int32_t uplink_frequency_offset, uint32_t frame_type);
void prepare_scc(NR_ServingCellConfigCommon_t *scc) {
......@@ -213,8 +213,7 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) {
}
void fix_scc(NR_ServingCellConfigCommon_t *scc,int ssbmap) {
void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) {
int ssbmaplen = (int)scc->ssb_PositionsInBurst->present;
AssertFatal(ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap || ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap || ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap, "illegal ssbmaplen %d\n",ssbmaplen);
......@@ -232,14 +231,8 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,int ssbmap) {
scc->ssb_PositionsInBurst->choice.longBitmap.size = 8;
scc->ssb_PositionsInBurst->choice.longBitmap.bits_unused = 0;
scc->ssb_PositionsInBurst->choice.longBitmap.buf = CALLOC(1,8);
scc->ssb_PositionsInBurst->choice.longBitmap.buf[0] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[1] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[2] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[3] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[4] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[5] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[6] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[7] = 0xff;
for (int i=0; i<8; i++)
scc->ssb_PositionsInBurst->choice.longBitmap.buf[i] = (ssbmap>>(i<<3))&(0xff);
}
// fix UL absolute frequency
......@@ -520,7 +513,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
NR_ServingCellConfigCommon_t *scc = calloc(1,sizeof(NR_ServingCellConfigCommon_t));
int ssb_SubcarrierOffset = 0;
int pdsch_AntennaPorts = 1;
int ssb_bitmap=0xff;
uint64_t ssb_bitmap=0xff;
memset((void*)scc,0,sizeof(NR_ServingCellConfigCommon_t));
prepare_scc(scc);
paramdef_t SCCsParams[] = SCCPARAMS_DESC(scc);
......@@ -646,7 +639,6 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
// Parse optional physical parameters
sprintf(gnbpath,"%s.[%i]",GNB_CONFIG_STRING_GNB_LIST,k),
printf("SSB SCO %d\n",ssb_SubcarrierOffset);
NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = ssb_SubcarrierOffset;
printf("pdsch_AntennaPorts %d\n",pdsch_AntennaPorts);
......
......@@ -163,6 +163,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]);
cfg->carrier_config.dl_frequency = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],
*scc->ssbSubcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
for (i=0; i<5; i++) {
......@@ -187,6 +188,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA;
cfg->carrier_config.uplink_frequency = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],
*scc->ssbSubcarrierSpacing,
UL_pointA)/1000; // freq in kHz
......
......@@ -49,7 +49,6 @@
\param pdu_length length of pdu
\param cell_id cell id */
int8_t nr_ue_decode_mib(
UE_nr_rxtx_proc_t *proc,
module_id_t module_id,
int cc_id,
uint8_t gNB_index,
......@@ -139,12 +138,12 @@ void nr_ue_send_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_f
void ue_dci_configuration(NR_UE_MAC_INST_t *mac,fapi_nr_dl_config_request_t *dl_config,int frame,int slot);
int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int dci_format,
uint8_t dci_length,
uint16_t rnti,
uint64_t *dci_pdu,
nr_dci_pdu_rel15_t *nr_pdci_info_extracted);
void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int dci_format,
uint8_t dci_length,
uint16_t rnti,
uint64_t *dci_pdu,
nr_dci_pdu_rel15_t *nr_pdci_info_extracted);
int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int mu,
......
......@@ -44,17 +44,18 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst)
//init mac here
nr_ue_mac_inst = (NR_UE_MAC_INST_t *)malloc(sizeof(NR_UE_MAC_INST_t)*NB_NR_UE_MAC_INST);
nr_rrc_mac_config_req_ue(0,0,0,NULL,rrc_inst->cell_group_config->spCellConfig);
if (IS_SOFTMODEM_NOS1){
if (rrc_inst) {
nr_rrc_mac_config_req_ue(0,0,0,NULL,rrc_inst->cell_group_config->spCellConfig);
if (IS_SOFTMODEM_NOS1){
if (rlc_module_init(0) != 0) {
LOG_I(RLC, "Problem at RLC initiation \n");
LOG_I(RLC, "Problem at RLC initiation \n");
}
pdcp_layer_init();
nr_ip_over_LTE_DRB_preconfiguration();
}
}
else LOG_I(MAC,"Running without RRC instance\n");
return (nr_ue_mac_inst);
}
......
......@@ -223,8 +223,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
return 0;
}
int8_t nr_ue_decode_mib(UE_nr_rxtx_proc_t *proc,
module_id_t module_id,
int8_t nr_ue_decode_mib(module_id_t module_id,
int cc_id,
uint8_t gNB_index,
uint8_t extra_bits, // 8bits 38.212 c7.1.1
......@@ -247,7 +246,6 @@ int8_t nr_ue_decode_mib(UE_nr_rxtx_proc_t *proc,
frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i);
uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4]
uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5]
uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset;
//uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64
......@@ -609,7 +607,9 @@ int8_t nr_ue_decode_mib(UE_nr_rxtx_proc_t *proc,
mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_id;
proc->decoded_frame_rx=frame;
mac->dl_config_request.sfn = frame;
mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS
//}
return 0;
......@@ -1651,16 +1651,12 @@ uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = {
{2,0,1,2,3,6,7,8,0,2},
{2,0,1,2,3,6,7,8,9,2}
};
int8_t nr_ue_process_dci_freq_dom_resource_assignment(
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
int8_t nr_ue_process_dci_freq_dom_resource_assignment(fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t riv
){
uint16_t l_RB;
uint16_t start_RB;
uint16_t tmp_RIV;
/*
* TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink)
......@@ -3039,12 +3035,12 @@ nr_ue_send_sdu(module_id_t module_idP,
}
int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int dci_format,
uint8_t dci_size,
uint16_t rnti,
uint64_t *dci_pdu,
nr_dci_pdu_rel15_t *dci_pdu_rel15) {
void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int dci_format,
uint8_t dci_size,
uint16_t rnti,
uint64_t *dci_pdu,
nr_dci_pdu_rel15_t *dci_pdu_rel15) {
int rnti_type=-1;
if (rnti == mac->ra_rnti) rnti_type = NR_RNTI_RA;
......
......@@ -68,6 +68,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.dl_bandwidth.value);
cfg->carrier_config.dl_frequency.value = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],
*scc->ssbSubcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
cfg->carrier_config.dl_frequency.tl.tag = NFAPI_NR_CONFIG_DL_FREQUENCY_TAG;
cfg->num_tlv++;
......@@ -101,6 +102,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA;
cfg->carrier_config.uplink_frequency.value = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],
*scc->ssbSubcarrierSpacing,
UL_pointA)/1000; // freq in kHz
cfg->carrier_config.uplink_frequency.tl.tag = NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG;
cfg->num_tlv++;
......@@ -232,6 +234,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
default:
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present);
}
cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->num_tlv++;
......@@ -316,7 +319,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
){
if (scc != NULL ) {
AssertFatal(scc->ssb_PositionsInBurst->present == NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap, "SSB Bitmap is not 8-bits!\n");
AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present);
LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n");
......
......@@ -323,13 +323,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels;
//nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config = NULL;
start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
// Check if there are downlink symbols in the slot, if not return, no scheduling opportunities
if (is_nr_DL_slot(cc->ServingCellConfigCommon,slot_txP)==0) return;
start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
RC.nrmac[module_idP]->frame = frame_rxP;
RC.nrmac[module_idP]->slot = slot_rxP;
......
......@@ -42,6 +42,7 @@ void config_common(int Mod_idP,
int pdsch_AntennaPorts,
NR_ServingCellConfigCommon_t *scc
);
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int ssb_SubcarrierOffset,
int pdsch_AntennaPorts,
......
......@@ -33,38 +33,50 @@
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
nr_bandentry_t nr_bandtable[] = {
{1, 1920000, 1980000, 2110000, 2170000, 20, 422000},
{2, 1850000, 1910000, 1930000, 1990000, 20, 386000},
{3, 1710000, 1785000, 1805000, 1880000, 20, 361000},
{5, 824000, 849000, 869000, 894000, 20, 173800},
{7, 2500000, 2570000, 2620000, 2690000, 20, 524000},
{8, 880000, 915000, 925000, 960000, 20, 185000},
{12, 698000, 716000, 728000, 746000, 20, 145800},
{20, 832000, 862000, 791000, 821000, 20, 158200},
{25, 1850000, 1915000, 1930000, 1995000, 20, 386000},
{28, 703000, 758000, 758000, 813000, 20, 151600},
{34, 2010000, 2025000, 2010000, 2025000, 20, 402000},
{38, 2570000, 2620000, 2570000, 2630000, 20, 514000},
{39, 1880000, 1920000, 1880000, 1920000, 20, 376000},
{40, 2300000, 2400000, 2300000, 2400000, 20, 460000},
{41, 2496000, 2690000, 2496000, 2690000, 3, 499200},
{50, 1432000, 1517000, 1432000, 1517000, 20, 286400},
{51, 1427000, 1432000, 1427000, 1432000, 20, 285400},
{66, 1710000, 1780000, 2110000, 2200000, 20, 422000},
{70, 1695000, 1710000, 1995000, 2020000, 20, 399000},
{71, 663000, 698000, 617000, 652000, 20, 123400},
{74, 1427000, 1470000, 1475000, 1518000, 20, 295000},
{75, 000, 000, 1432000, 1517000, 20, 286400},
{76, 000, 000, 1427000, 1432000, 20, 285400},
{77, 3300000, 4200000, 3300000, 4200000, 1, 620000},
{78, 3300000, 3800000, 3300000, 3800000, 1, 620000},
{79, 4400000, 5000000, 4400000, 5000000, 2, 693334},
{80, 1710000, 1785000, 000, 000, 20, 342000},
{81, 860000, 915000, 000, 000, 20, 176000},
{82, 832000, 862000, 000, 000, 20, 166400},
{83, 703000, 748000, 000, 000, 20, 140600},
{84, 1920000, 1980000, 000, 000, 20, 384000},
{86, 1710000, 1785000, 000, 000, 20, 342000}
{1, 1920000, 1980000, 2110000, 2170000, 20, 422000, 100},
{2, 1850000, 1910000, 1930000, 1990000, 20, 386000, 100},
{3, 1710000, 1785000, 1805000, 1880000, 20, 361000, 100},
{5, 824000, 849000, 869000, 894000, 20, 173800, 100},
{7, 2500000, 2570000, 2620000, 2690000, 20, 524000, 100},
{8, 880000, 915000, 925000, 960000, 20, 185000, 100},
{12, 698000, 716000, 728000, 746000, 20, 145800, 100},
{20, 832000, 862000, 791000, 821000, 20, 158200, 100},
{25, 1850000, 1915000, 1930000, 1995000, 20, 386000, 100},
{28, 703000, 758000, 758000, 813000, 20, 151600, 100},
{34, 2010000, 2025000, 2010000, 2025000, 20, 402000, 100},
{38, 2570000, 2620000, 2570000, 2630000, 20, 514000, 100},
{39, 1880000, 1920000, 1880000, 1920000, 20, 376000, 100},
{40, 2300000, 2400000, 2300000, 2400000, 20, 460000, 100},
{41, 2496000, 2690000, 2496000, 2690000, 3, 499200, 15},
{41, 2496000, 2690000, 2496000, 2690000, 6, 499200, 30},
{50, 1432000, 1517000, 1432000, 1517000, 20, 286400, 100},
{51, 1427000, 1432000, 1427000, 1432000, 20, 285400, 100},
{66, 1710000, 1780000, 2110000, 2200000, 20, 422000, 100},
{70, 1695000, 1710000, 1995000, 2020000, 20, 399000, 100},
{71, 663000, 698000, 617000, 652000, 20, 123400, 100},
{74, 1427000, 1470000, 1475000, 1518000, 20, 295000, 100},
{75, 000, 000, 1432000, 1517000, 20, 286400, 100},
{76, 000, 000, 1427000, 1432000, 20, 285400, 100},
{77, 3300000, 4200000, 3300000, 4200000, 1, 620000, 15},
{77, 3300000, 4200000, 3300000, 4200000, 2, 620000, 30},
{78, 3300000, 3800000, 3300000, 3800000, 1, 620000, 15},
{78, 3300000, 3800000, 3300000, 3800000, 2, 620000, 30},
{79, 4400000, 5000000, 4400000, 5000000, 1, 693334, 15},
{79, 4400000, 5000000, 4400000, 5000000, 2, 693334, 30},
{80, 1710000, 1785000, 000, 000, 20, 342000, 100},
{81, 860000, 915000, 000, 000, 20, 176000, 100},
{82, 832000, 862000, 000, 000, 20, 166400, 100},
{83, 703000, 748000, 000, 000, 20, 140600, 100},
{84, 1920000, 1980000, 000, 000, 20, 384000, 100},
{86, 1710000, 1785000, 000, 000, 20, 342000, 100},
{257,26500000,29500000,26500000,29500000, 1,2054166, 60},
{257,26500000,29500000,26500000,29500000, 2,2054167, 120},
{258,24250000,27500000,24250000,27500000, 1,2016667, 60},
{258,24250000,27500000,24250000,27500000, 2,2016667, 120},
{260,37000000,40000000,37000000,40000000, 1,2229166, 60},
{260,37000000,40000000,37000000,40000000, 2,2229167, 120},
{261,27500000,28350000,27500000,28350000, 1,2070833, 60},
{261,27500000,28350000,27500000,28350000, 2,2070833, 120}
};
#define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t))
......@@ -226,16 +238,22 @@ uint16_t config_bandwidth(int mu, int nb_rb, int nr_band)
uint32_t to_nrarfcn(int nr_bandP,
uint64_t dl_CarrierFreq,
uint8_t scs_index,
uint32_t bw)
{
uint64_t dl_CarrierFreq_by_1k = dl_CarrierFreq / 1000;
int bw_kHz = bw / 1000;
int scs_khz = 15<<scs_index;
int i;
uint32_t nrarfcn, delta_arfcn;
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(nr_bandP < 86, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 30 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(nr_bandP < 261, "nr_band %d > 260\n", nr_bandP);
for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
// selection of correct Deltaf raster according to SCS
if ( (nr_bandtable[i].deltaf_raster != 100) && (nr_bandtable[i].deltaf_raster != scs_khz))
i++;
AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
......@@ -246,37 +264,57 @@ uint32_t to_nrarfcn(int nr_bandP,
nr_bandP, (long long unsigned int)dl_CarrierFreq,bw, (long long unsigned int)dl_CarrierFreq_by_1k,
(long long unsigned int)(nr_bandtable[i].dl_max - bw_kHz));
int deltaFglobal;
int deltaFglobal = 60;
if (dl_CarrierFreq < 3e9) deltaFglobal = 5;
else deltaFglobal = 15;
if (dl_CarrierFreq < 3e9) deltaFglobal = 15;
if (dl_CarrierFreq < 24.25e9) deltaFglobal = 5;
// This is equation before Table 5.4.2.1-1 in 38101-1-f30
// F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs)
return (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal) +
nr_bandtable[i].N_OFFs_DL);
nrarfcn = (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal)+nr_bandtable[i].N_OFFs_DL);
delta_arfcn = nrarfcn - nr_bandtable[i].N_OFFs_DL;
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
AssertFatal(1==0,"dl_CarrierFreq %lu corresponds to %u which is not on the raster for step size %lu",
dl_CarrierFreq,nrarfcn,nr_bandtable[i].step_size);
return nrarfcn;
}
uint64_t from_nrarfcn(int nr_bandP,
uint8_t scs_index,
uint32_t dl_nrarfcn)
{
int i;
int deltaFglobal;
if (nr_bandP < 77 || nr_bandP > 79) deltaFglobal = 5;
else deltaFglobal = 15;
int deltaFglobal = 5;
int scs_khz = 15<<scs_index;
uint32_t delta_arfcn;
if (dl_nrarfcn > 599999 && dl_nrarfcn < 2016667)
deltaFglobal = 15;
if (dl_nrarfcn > 2016666 && dl_nrarfcn < 3279166)
deltaFglobal = 60;
AssertFatal(nr_bandP < 87, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 31 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(nr_bandP < 261, "nr_band %d > 260\n", nr_bandP);
for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
// selection of correct Deltaf raster according to SCS
if ( (nr_bandtable[i].deltaf_raster != 100) && (nr_bandtable[i].deltaf_raster != scs_khz))
i++;
delta_arfcn = dl_nrarfcn - nr_bandtable[i].N_OFFs_DL;
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
AssertFatal(1==0,"dl_nrarfcn %u is not on the raster for step size %lu",dl_nrarfcn,nr_bandtable[i].step_size);
LOG_I(PHY,"Computing dl_frequency (pointA %llu => %llu (dlmin %llu, nr_bandtable[%d].N_OFFs_DL %llu))\n",
(unsigned long long)dl_nrarfcn,
(unsigned long long)(1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal)),
(unsigned long long)nr_bandtable[i].dl_min,
i,
(unsigned long long)nr_bandtable[i].N_OFFs_DL);
return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal);
}
......@@ -694,9 +732,9 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
AssertFatal(NrOfSymbols>3,"Illegal NrOfSymbols %d for len2 DMRS\n",NrOfSymbols);
if (NrOfSymbols < 10) return(1<<l0);
if (NrOfSymbols < 13 && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (NrOfSymbols < 13 && *dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0 || 1<<8);
if (NrOfSymbols < 13 && *dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0 | 1<<8);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1) return(1<<l0 || 1<<10);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1) return(1<<l0 | 1<<10);
}
}
else if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB &&
......
......@@ -34,9 +34,9 @@
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn);
uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols);
......
......@@ -44,17 +44,16 @@
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
// L2 Abstraction Layer
int handle_bcch_bch(UE_nr_rxtx_proc_t *proc, module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
return nr_ue_decode_mib( proc,
module_id,
cc_id,
gNB_index,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
pduP,
cell_id);
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
return nr_ue_decode_mib(module_id,
cc_id,
gNB_index,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
pduP,
cell_id);
}
......@@ -156,8 +155,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
LOG_D(MAC,">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis);
// fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
ret_mask |= (handle_dci(
dl_info->module_id,
ret_mask |= (handle_dci(dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dl_info->dci_ind->dci_list+i)<< FAPI_NR_DCI_IND);
......@@ -218,16 +216,14 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->proc,
dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
LOG_D(MAC,"[L2][IF MODULE][DL INDICATION][RX_IND], MIB case Number of PDUs: %d \n", dl_info->rx_ind->number_pdus);
/*ret_mask |= (handle_bcch_bch( dl_info->proc,
dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
/*ret_mask |= (handle_bcch_bch( dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
dl_info->rx_ind->rx_indication_body[i].mib_pdu.pdu,
dl_info->rx_ind->rx_indication_body[i].mib_pdu.additional_bits,
dl_info->rx_ind->rx_indication_body[i].mib_pdu.ssb_index,
......@@ -306,11 +302,10 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
fapi_nr_dl_config_request_t *dl_config=&dcireq->dl_config_req;
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
dl_config->sfn=UE_mac->dl_config_request.sfn;
dl_config->slot=UE_mac->dl_config_request.slot;
dl_config->number_pdus=0;
ue_dci_configuration(UE_mac,dl_config,dcireq->frame,dcireq->slot);
ue_dci_configuration(UE_mac,dl_config,dcireq->frame,dcireq->slot);
return 0;
}
......@@ -215,7 +215,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq);
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
\param ssb_length corresponding to L1 parameter L_ssb
\param cell_id cell id */
int handle_bcch_bch(UE_nr_rxtx_proc_t *proc, module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
// TODO check
/**\brief handle BCCH-DL-SCH message from dl_indication
......
......@@ -259,7 +259,6 @@ static void init_NR_SI(gNB_RRC_INST *rrc) {
char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigurationReq *configuration) {
protocol_ctxt_t ctxt;
int CC_id;
gNB_RRC_INST *rrc=RC.nrrrc[gnb_mod_idP];
......@@ -284,7 +283,7 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu
rrc->carrier.Srb0.Active = 0;
uid_linear_allocator_init(&rrc->uid_allocator);
nr_uid_linear_allocator_init(&rrc->uid_allocator);
RB_INIT(&rrc->rrc_ue_head);
rrc->initial_id2_s1ap_ids = hashtable_create (NUMBER_OF_UE_MAX * 2, NULL, NULL);
rrc->s1ap_id2_s1ap_ids = hashtable_create (NUMBER_OF_UE_MAX * 2, NULL, NULL);
......
......@@ -169,13 +169,13 @@ rrc_gNB_get_ue_context(
}
}
rrc_gNB_free_mem_UE_context(
void rrc_gNB_free_mem_UE_context(
const protocol_ctxt_t *const ctxt_pP,
struct rrc_gNB_ue_context_s *const ue_context_pP
)
//-----------------------------------------------------------------------------
{
int i;
LOG_T(RRC,
PROTOCOL_RRC_CTXT_UE_FMT" Clearing UE context 0x%p (free internal structs)\n",
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP),
......
......@@ -53,7 +53,7 @@ int parse_CG_ConfigInfo(gNB_RRC_INST *rrc, NR_CG_ConfigInfo_t *CG_ConfigInfo) {
cg_ConfigInfo->ue_CapabilityInfo->buf,
cg_ConfigInfo->ue_CapabilityInfo->size, 0, 0);
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
AssertFatal(1==0,"[InterNode] Failed to decode NR_UE_CapabilityRAT_ContainerList (%zu bits), size of OCTET_STRING %d\n",
AssertFatal(1==0,"[InterNode] Failed to decode NR_UE_CapabilityRAT_ContainerList (%zu bits), size of OCTET_STRING %lu\n",
dec_rval.consumed, cg_ConfigInfo->ue_CapabilityInfo->size);
}
rrc_parse_ue_capabilities(rrc,UE_CapabilityRAT_ContainerList);
......
......@@ -148,7 +148,7 @@ gNBs =
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 15;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
......
......@@ -264,7 +264,7 @@ extern pthread_cond_t sync_cond;
extern pthread_mutex_t sync_mutex;
extern int sync_var;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int rx_input_level_dBm;
......
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