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Commit 5316fbe8 authored by Theoni Magounaki's avatar Theoni Magounaki
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Merge branch 'feature-247-tm89' of... 

Merge branch 'feature-247-tm89' of https://gitlab.eurecom.fr/oai/openairinterface5g into feature-247-tm89
parents 2aaca349 92606dae
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Showing with 152 additions and 20 deletions
openair1/PHY/INIT/lte_init.c
View file @ 5316fbe8
......@@ -692,6 +692,11 @@ void phy_config_dedicated_eNB(uint8_t Mod_id,
eNB->do_precoding = 1;
eNB->transmission_mode[UE_id] = 7;
break;
case AntennaInfoDedicated__transmissionMode_tm8_v920:
lte_gold_ue_spec(eNB->lte_gold_uespec_table,eNB->frame_parms.Nid_cell,NULL);
eNB->do_precoding = 1;
eNB->transmission_mode[UE_id] = 8;
break;
default:
LOG_E(PHY,"Unknown transmission mode!\n");
break;
......@@ -1411,7 +1416,7 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
if (eNB->node_function != NGFI_RRU_IF5) {
for (i=0; i<NB_ANTENNA_PORTS_ENB; i++) {
if (i<fp->nb_antenna_ports_eNB || i==5) {
if (i<fp->nb_antenna_ports_eNB || i==5 || i==7 || i==8) {
common_vars->txdataF[eNB_id][i] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*fp->symbols_per_tti*10*sizeof(int32_t) );
#ifdef DEBUG_PHY
printf("[openair][LTE_PHY][INIT] common_vars->txdataF[%d][%d] = %p (%lu bytes)\n",
......@@ -1436,7 +1441,7 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
}
for (i=0; i<NB_ANTENNA_PORTS_ENB; i++) {
if (i<fp->nb_antenna_ports_eNB || i==5) {
if (i<fp->nb_antenna_ports_eNB || i==5 || i==7 || i==8) {
common_vars->beam_weights[eNB_id][i] = (int32_t **)malloc16_clear(fp->nb_antennas_tx*sizeof(int32_t*));
for (j=0; j<fp->nb_antennas_tx; j++) {
common_vars->beam_weights[eNB_id][i][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
......
openair1/PHY/LTE_REFSIG/defs.h
View file @ 5316fbe8
......@@ -45,7 +45,7 @@ unsigned int lte_gold_generic(unsigned int *x1, unsigned int *x2, unsigned char
void lte_gold(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_table[20][2][14],uint16_t Nid_cell);
/*! \brief This function generates the LTE Gold sequence for DL UE-specific pilots for antenna ports 7,...,14 (transmission modes 8/9) */
void lte_gold_ue_spec(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_uespec_table[2][20][2][21],uint16_t Nid_cell, uint16_t *n_idDMRS);
void lte_gold_ue_spec(uint32_t lte_gold_uespec_table[2][20][2][21],uint16_t Nid_cell, uint16_t *n_idDMRS);
/*! \brief This function generates the LTE Gold sequence for DL UE-specific pilots for antenna port 5 (transmission mode 7) */
void lte_gold_ue_spec_port5(uint32_t lte_gold_uespec_port5_table[20][38],uint16_t Nid_cell, uint16_t n_rnti);
......
openair1/PHY/LTE_REFSIG/lte_gold.c
View file @ 5316fbe8
......@@ -81,7 +81,7 @@ void lte_gold(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_table[20][2][14]
}
}
void lte_gold_ue_spec(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_uespec_table[2][20][2][21],uint16_t Nid_cell, uint16_t *n_idDMRS)
void lte_gold_ue_spec(uint32_t lte_gold_uespec_table[2][20][2][21],uint16_t Nid_cell, uint16_t *n_idDMRS)
{
unsigned char ns,l;
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ 5316fbe8
......@@ -2288,6 +2288,8 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq->dl_power_off = 1;
dlsch1_harq->dl_power_off = 1;
dlsch0_harq->mimo_mode = TM8; //this DCI can only be used in TM8
break;
case format2C:
......
openair1/PHY/LTE_TRANSPORT/defs.h
View file @ 5316fbe8
......@@ -162,7 +162,7 @@ typedef struct {
uint8_t Nl;
/// Number of layers for this PDSCH transmission (TM8-10)
uint8_t Nlayers;
/// First layer for this PSCH transmission
/// First layer for this PDSCH transmission
uint8_t first_layer;
/// codeword this transport block is mapped to
uint8_t codeword;
......
openair1/PHY/LTE_TRANSPORT/dlsch_modulation.c
View file @ 5316fbe8
......@@ -2311,17 +2311,32 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
lprime=-1;
}
/*NOTE: the antenna port 7 and 8 should be replaced with 7+dlsch0_harq_first_layer and dlsch1_harq->first_layer below*/
if (dlsch0 != NULL) {
for (aa=0;aa<frame_parms->nb_antennas_tx;aa++){
for (i=0;i<frame_parms->N_RB_DL*12/2;i++){
(phy_vars_eNB->common_vars.beam_weights[0][7][aa])[i+1] = (dlsch0->ue_spec_bf_weights[0][aa])[i+frame_parms->N_RB_DL*12/2] ;
}
}
for (aa=0;aa<frame_parms->nb_antennas_tx;aa++){
for (i=0;i<frame_parms->N_RB_DL*12/2;i++){
(phy_vars_eNB->common_vars.beam_weights[0][7][aa])[i+1] = (phy_vars_eNB->dlsch[0][0]->ue_spec_bf_weights[0][aa])[i+frame_parms->N_RB_DL*12/2] ;
(phy_vars_eNB->common_vars.beam_weights[0][7][aa])[i+frame_parms->first_carrier_offset] = (dlsch0->ue_spec_bf_weights[0][aa])[i] ;
}
}
}
if (dlsch1 != NULL) {
for (aa=0;aa<frame_parms->nb_antennas_tx;aa++){
for (i=0;i<frame_parms->N_RB_DL*12/2;i++){
(phy_vars_eNB->common_vars.beam_weights[0][7][aa])[i+frame_parms->first_carrier_offset] = (phy_vars_eNB->dlsch[0][0]->ue_spec_bf_weights[0][aa])[i] ;
(phy_vars_eNB->common_vars.beam_weights[0][8][aa])[i+1] = (dlsch1->ue_spec_bf_weights[0][aa])[i+frame_parms->N_RB_DL*12/2] ;
}
}
for (aa=0;aa<frame_parms->nb_antennas_tx;aa++){
for (i=0;i<frame_parms->N_RB_DL*12/2;i++){
(phy_vars_eNB->common_vars.beam_weights[0][8][aa])[i+frame_parms->first_carrier_offset] = (dlsch1->ue_spec_bf_weights[0][aa])[i] ;
}
}
}
}
Ns = 2*subframe_offset+(l>=(nsymb>>1));
......
openair1/PHY/impl_defs_top.h
View file @ 5316fbe8
......@@ -177,7 +177,7 @@
#define DMA_BLKS_PER_SLOT (SLOT_LENGTH_BYTES/2048) // Number of DMA blocks per slot
#define SLOT_TIME_NS (SLOT_LENGTH_SAMPLES*(1e3)/7.68) // slot time in ns
#define NB_ANTENNA_PORTS_ENB 6 // total number of eNB antenna ports
#define NB_ANTENNA_PORTS_ENB 9 // total number of eNB antenna ports
#ifdef EXMIMO
#define TARGET_RX_POWER 55 // Target digital power for the AGC
......
openair1/SIMULATION/LTE_PHY/dlsim.c
View file @ 5316fbe8
......@@ -51,7 +51,6 @@
#include "unitary_defs.h"
#include "PHY/TOOLS/lte_phy_scope.h"
PHY_VARS_eNB *eNB;
......@@ -1207,6 +1206,117 @@ void fill_DCI(PHY_VARS_eNB *eNB,
break;
case 8:
if (common_flag == 0) {
if (eNB->frame_parms.frame_type == TDD) {
switch (eNB->frame_parms.N_RB_DL) {
case 6:
dci_length = sizeof_DCI2B_1_5MHz_TDD_t;
dci_length_bytes = sizeof(DCI2B_1_5MHz_TDD_t);
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rballoc = DLSCH_RB_ALLOC;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->scrambling_id = 0;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->TPC = 0;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->dai = 0;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->harq_pid = 0;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->mcs1 = mcs1;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->ndi1 = ndi;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rv1 = rv;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->mcs2 = mcs2;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->ndi2 = ndi;
((DCI2B_1_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rv2 = rv;
break;
case 25:
dci_length = sizeof_DCI2B_5MHz_TDD_t;
dci_length_bytes = sizeof(DCI2B_5MHz_TDD_t);
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rah = 0;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->scrambling_id = 0;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rballoc = DLSCH_RB_ALLOC;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->TPC = 0;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->dai = 0;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->harq_pid = 0;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->mcs1 = mcs1;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->ndi1 = ndi;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rv1 = rv;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->mcs2 = mcs2;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->ndi2 = ndi;
((DCI2B_5MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rv2 = rv;
break;
case 50:
dci_length = sizeof_DCI2B_10MHz_TDD_t;
dci_length_bytes = sizeof(DCI2B_10MHz_TDD_t);
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rah = 0;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->scrambling_id = 0;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rballoc = DLSCH_RB_ALLOC;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->TPC = 0;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->dai = 0;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->harq_pid = 0;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->mcs1 = mcs1;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->ndi1 = ndi;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rv1 = rv;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->mcs2 = mcs2;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->ndi2 = ndi;
((DCI2B_10MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rv2 = rv;
break;
case 100:
dci_length = sizeof_DCI2B_20MHz_TDD_t;
dci_length_bytes = sizeof(DCI2B_20MHz_TDD_t);
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rah = 0;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->scrambling_id = 0;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rballoc = DLSCH_RB_ALLOC;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->TPC = 0;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->dai = 0;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->harq_pid = 0;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->mcs1 = mcs1;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->ndi1 = ndi;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rv1 = rv;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->mcs2 = mcs2;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->ndi2 = ndi;
((DCI2B_20MHz_TDD_t *)&DLSCH_alloc_pdu_1[k])->rv2 = rv;
break;
}
}
else {
printf("FDD DCI alloc todo!\n");
exit(-1);
}
memcpy(&dci_alloc[*num_dci].dci_pdu[0],&DLSCH_alloc_pdu_1[k],dci_length_bytes);
dci_alloc[*num_dci].dci_length = dci_length;
dci_alloc[*num_dci].L = 1;
dci_alloc[*num_dci].rnti = n_rnti+k;
dci_alloc[*num_dci].format = format2B;
dump_dci(&eNB->frame_parms,&dci_alloc[*num_dci]);
//printf("Generating dlsch params for user %d / format 2A (%d)\n",k,format2A);
generate_eNB_dlsch_params_from_dci(0,
subframe,
&DLSCH_alloc_pdu_1[0],
n_rnti+k,
format2B,
eNB->dlsch[0],
&eNB->frame_parms,
eNB->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
eNB->UE_stats[0].DL_pmi_single,
transmission_mode>=7?transmission_mode:0);
*num_dci = *num_dci + 1;
*num_ue_spec_dci = *num_ue_spec_dci + 1;
}
else {
printf("DCI format 2B does not support common RNTIs\n");
}
printf("Generated DCI format 2B (Transmission Mode 8)\n");
break;
default:
printf("Unsupported Transmission Mode!!!");
exit(-1);
......@@ -1395,9 +1505,19 @@ int main(int argc, char **argv)
int two_thread_flag=0;
int DLSCH_RB_ALLOC = 0;
int log_level = LOG_ERR;
int log_level = LOG_DEBUG;
int dci_received;
logInit();
// enable these lines if you need debug info
set_comp_log(PHY,LOG_DEBUG,LOG_HIGH,1);
set_glog(log_level,LOG_HIGH);
// moreover you need to init itti with the following line
// however itti will catch all signals, so ctrl-c won't work anymore
// alternatively you can disable ITTI completely in CMakeLists.txt
//itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, NULL);
#if defined(__arm__)
FILE *proc_fd = NULL;
char buf[64];
......@@ -1766,16 +1886,6 @@ int main(int argc, char **argv)
}
}
logInit();
// enable these lines if you need debug info
set_comp_log(PHY,LOG_DEBUG,LOG_HIGH,1);
set_glog(log_level,LOG_HIGH);
// moreover you need to init itti with the following line
// however itti will catch all signals, so ctrl-c won't work anymore
// alternatively you can disable ITTI completely in CMakeLists.txt
//itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, NULL);
if (common_flag == 0) {
switch (N_RB_DL) {
case 6:
......
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