Commit 762a2244 authored by kn.raju's avatar kn.raju

Checking free consecutive 6RBs in vrb_map

parent 36089653
......@@ -378,7 +378,10 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
for(; ra_index < NR_NB_RA_PROC_MAX; ra_index++) {
if(cc->ra[ra_index].state == RA_IDLE) break;
}
if (ra_index == NR_NB_RA_PROC_MAX) LOG_E(MAC, "%s() %s:%d RA processes are not available for CFRA RNTI :%x\n", __FUNCTION__, __FILE__, __LINE__, rnti);
if (ra_index == NR_NB_RA_PROC_MAX) {
LOG_E(MAC, "%s() %s:%d RA processes are not available for CFRA RNTI :%x\n", __FUNCTION__, __FILE__, __LINE__, rnti);
return -1;
}
NR_RA_t *ra = &cc->ra[ra_index];
ra->secondaryCellGroup = secondaryCellGroup;
if (secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated!=NULL) {
......
......@@ -817,9 +817,15 @@ void nr_generate_Msg2(module_id_t module_idP,
}
int bwpStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
uint16_t *vrb_map = cc[CC_id].vrb_map;
int rbStart = 0;
int rbStart = 0,rbSize = 6;
while (((bwpStart+rbStart)< (bwpStart+dci10_bw)) && vrb_map[rbStart]) rbStart++;
if((rbStart + bwpStart) >= (bwpStart+dci10_bw)) {
for (int i=0;i < rbSize ; i++) {
if(vrb_map[rbStart + i]) {
rbStart += i;
i = 0;
}
}
if(((rbStart + bwpStart) >= (bwpStart+dci10_bw)) || ((rbStart + bwpStart + rbSize - 1) > (bwpStart+dci10_bw))) {
LOG_E(MAC, "%s(): cannot find free vrb_map for RA RNTI %04x!\n", __func__, ra->RA_rnti);
return;
}
......@@ -879,7 +885,7 @@ void nr_generate_Msg2(module_id_t module_idP,
pdsch_pdu_rel15->dmrsPorts = 1;
pdsch_pdu_rel15->resourceAlloc = 1;
pdsch_pdu_rel15->rbStart = rbStart;
pdsch_pdu_rel15->rbSize = 6;
pdsch_pdu_rel15->rbSize = rbSize;
pdsch_pdu_rel15->VRBtoPRBMapping = 0; // non interleaved
for (int i=0; i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i++) {
......@@ -974,8 +980,8 @@ void nr_generate_Msg2(module_id_t module_idP,
T_INT(RA_rnti), T_INT(frameP), T_INT(slotP), T_INT(0) /* harq pid, meaningful? */,
T_BUFFER(&tx_req->TLVs[0].value.direct[0], tx_req->TLVs[0].length));
/* mark the corresponding RBs as used */
for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++)
vrb_map[rb + pdsch_pdu_rel15->rbStart] = 1;
for (int rb = 0; rb < rbSize; rb++)
vrb_map[rb + rbStart] = 1;
dci_pdu_index+=1;
dl_req->nPDUs+=1; //Adding PDSCH pdu count
......
......@@ -245,7 +245,6 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
TX_req->PDU_index = nr_mac->pdu_index[CC_id]++;
TX_req->num_TLV = 1;
TX_req->TLVs[0].length = 8;
memcpy((void*)&TX_req->TLVs[0].value.direct[0],(void*)&cc[CC_id].RAR_pdu[0].payload[0],TX_req->TLVs[0].length);
nr_mac->TX_req[CC_id].Number_of_PDUs++;
nr_mac->TX_req[CC_id].SFN=frameP;
nr_mac->TX_req[CC_id].Slot=slotP;
......
......@@ -186,8 +186,6 @@ typedef struct {
uint32_t PCCH_alloc_pdu;
/// Outgoing PCCH pdu for PHY
PCCH_PDU PCCH_pdu;
/// Outgoing RAR pdu for PHY
RAR_PDU RAR_pdu[NR_NB_RA_PROC_MAX];
/// Template for RA computations
NR_RA_t ra[NR_NB_RA_PROC_MAX];
/// VRB map for common channels
......
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