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canghaiwuhen
OpenXG-RAN
Commits
7e8dd7ae
Commit
7e8dd7ae
authored
Aug 23, 2019
by
Florian Kaltenberger
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enabling UE_DLSCH_PARALLELIZATION + fix compiler warnings
parent
367ec43a
Changes
3
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3 changed files
with
12 additions
and
10 deletions
+12
-10
executables/nr-ue.c
executables/nr-ue.c
+2
-0
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+9
-9
openair1/SCHED_NR_UE/defs.h
openair1/SCHED_NR_UE/defs.h
+1
-1
No files found.
executables/nr-ue.c
View file @
7e8dd7ae
...
...
@@ -680,6 +680,7 @@ void *UE_thread(void *arg) {
rxp
,
readBlockSize
,
UE
->
frame_parms
.
nb_antennas_rx
),
""
);
/*
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
timestamp+
...
...
@@ -690,6 +691,7 @@ void *UE_thread(void *arg) {
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
1),"");
*/
if
(
slot_nr
==
(
nb_slot_frame
-
1
))
{
// read in first symbol of next frame and adjust for timing drift
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @
7e8dd7ae
...
...
@@ -241,9 +241,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint16_t
nb_rb
=
30
;
double
Coderate
=
0
.
0
;
//nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
//uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t
nb_re_dmrs
=
6
;
//(dmrs_type==NFAPI_NR_DMRS_TYPE
1)?6:4;
uint16_t
length_dmrs
=
1
;
//cfg->pdsch_config.dmrs_max_length.value
;
pdsch_dmrs_type_t
dmrs_type
=
phy_vars_ue
->
dmrs_DownlinkConfig
.
pdsch_dmrs_type
;
//check if this is configured properly
uint8_t
nb_re_dmrs
=
(
dmrs_type
==
pdsch_dmrs_type
1
)
?
6
:
4
;
uint16_t
length_dmrs
=
(
uint16_t
)
phy_vars_ue
->
dmrs_DownlinkConfig
.
pdsch_maxLength
;
uint32_t
i
,
j
;
...
...
@@ -715,10 +715,10 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t
Tbslbrm
=
950984
;
uint16_t
nb_rb
=
30
;
double
Coderate
=
0
.
0
;
n
fapi_nr_config_request_t
*
cfg
=
&
phy_vars_ue
->
nrUE_config
;
uint8_t
dmrs_type
=
cfg
->
pdsch_config
.
dmrs_type
.
value
;
uint8_t
nb_re_dmrs
=
(
dmrs_type
==
NFAPI_NR_DMRS_TYPE
1
)
?
6
:
4
;
uint16_t
length_dmrs
=
1
;
//cfg->pdsch_config.dmrs_max_length.value
;
//
fapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
pdsch_dmrs_type_t
dmrs_type
=
phy_vars_ue
->
dmrs_DownlinkConfig
.
pdsch_dmrs_type
;
//check if this is configured properly
uint8_t
nb_re_dmrs
=
(
dmrs_type
==
pdsch_dmrs_type
1
)
?
6
:
4
;
uint16_t
length_dmrs
=
(
uint16_t
)
phy_vars_ue
->
dmrs_DownlinkConfig
.
pdsch_maxLength
;
uint32_t
i
,
j
;
...
...
@@ -1240,7 +1240,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
#endif
#ifdef UE_DLSCH_PARALLELISATION
void
*
nr_dlsch_decoding_process
(
void
*
arg
)
void
nr_dlsch_decoding_process
(
void
*
arg
)
{
nr_rxtx_thread_data_t
*
rxtxD
=
(
nr_rxtx_thread_data_t
*
)
arg
;
UE_nr_rxtx_proc_t
*
proc
=
&
rxtxD
->
proc
;
...
...
@@ -1258,7 +1258,7 @@ void *nr_dlsch_decoding_process(void *arg)
int8_t
l
[
68
*
384
];
//__m128i l;
int16_t
inv_d
[
68
*
384
];
int16_t
*
p_invd
=
&
inv_d
;
int16_t
*
p_invd
=
inv_d
;
uint8_t
kb
,
kc
;
uint8_t
Ilbrm
=
0
;
uint32_t
Tbslbrm
=
950984
;
...
...
openair1/SCHED_NR_UE/defs.h
View file @
7e8dd7ae
...
...
@@ -44,7 +44,7 @@
#define OPENAIR_THREAD_STACK_SIZE PTHREAD_STACK_MIN //4096 //RTL_PTHREAD_STACK_MIN*6
//#define DLC_THREAD_STACK_SIZE 4096 //DLC stack size
//#define UE_SLOT_PARALLELISATION
//
#define UE_DLSCH_PARALLELISATION
#define UE_DLSCH_PARALLELISATION
/*enum openair_SCHED_STATUS {
openair_SCHED_STOPPED=1,
...
...
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