Commit 8f2d7970 authored by Robert Schmidt's avatar Robert Schmidt

MAC: change all slice_id_t to slice index variables

parent 87b8b6e8
This diff is collapsed.
...@@ -1962,8 +1962,8 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP, int harq_pidP ...@@ -1962,8 +1962,8 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP, int harq_pidP
UE_list->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0; UE_list->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0;
/* default slice in case there was something different */ /* default slice in case there was something different */
UE_list->assoc_dl_slice[UE_id] = 0; UE_list->assoc_dl_slice_idx[UE_id] = 0;
UE_list->assoc_ul_slice[UE_id] = 0; UE_list->assoc_ul_slice_idx[UE_id] = 0;
UE_list->UE_sched_ctrl[UE_id].ta_update = 31; UE_list->UE_sched_ctrl[UE_id].ta_update = 31;
...@@ -4542,24 +4542,26 @@ uint16_t nb_rbs_allowed_slice(float rb_percentage, int total_rbs) ...@@ -4542,24 +4542,26 @@ uint16_t nb_rbs_allowed_slice(float rb_percentage, int total_rbs)
return (uint16_t) floor(rb_percentage * total_rbs); return (uint16_t) floor(rb_percentage * total_rbs);
} }
int ue_dl_slice_membership(module_id_t mod_id, int UE_id, slice_id_t slice_id) int ue_dl_slice_membership(module_id_t mod_id, int UE_id, int slice_idx)
{ {
if ((slice_id < 0) if ((slice_idx < 0)
|| (slice_id >= RC.mac[mod_id]->slice_info.n_dl)) { || (slice_idx >= RC.mac[mod_id]->slice_info.n_dl)) {
LOG_W(MAC, "out of range slice id %d\n", slice_id); LOG_W(MAC, "out of range slice index %d (slice ID %d)\n",
slice_idx, RC.mac[mod_id]->slice_info.dl[slice_idx].id);
return 0; return 0;
} }
return RC.mac[mod_id]->UE_list.active[UE_id] == TRUE return RC.mac[mod_id]->UE_list.active[UE_id] == TRUE
&& RC.mac[mod_id]->UE_list.assoc_dl_slice[UE_id] == slice_id; && RC.mac[mod_id]->UE_list.assoc_dl_slice_idx[UE_id] == slice_idx;
} }
int ue_ul_slice_membership(module_id_t mod_id, int UE_id, slice_id_t slice_id) int ue_ul_slice_membership(module_id_t mod_id, int UE_id, int slice_idx)
{ {
if ((slice_id < 0) if ((slice_idx < 0)
|| (slice_id >= RC.mac[mod_id]->slice_info.n_ul)) { || (slice_idx >= RC.mac[mod_id]->slice_info.n_ul)) {
LOG_W(MAC, "out of range slice id %d\n", slice_id); LOG_W(MAC, "out of range slice index %d (slice ID %d)\n",
slice_idx, RC.mac[mod_id]->slice_info.dl[slice_idx].id);
return 0; return 0;
} }
return RC.mac[mod_id]->UE_list.active[UE_id] == TRUE return RC.mac[mod_id]->UE_list.active[UE_id] == TRUE
&& RC.mac[mod_id]->UE_list.assoc_ul_slice[UE_id] == slice_id; && RC.mac[mod_id]->UE_list.assoc_ul_slice_idx[UE_id] == slice_idx;
} }
...@@ -1049,8 +1049,9 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -1049,8 +1049,9 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
} }
for (i = 0; i < sli->n_ul; i++) { for (i = 0; i < sli->n_ul; i++) {
if (sli->ul[i].pct < 0 ){ if (sli->ul[i].pct < 0 ){
LOG_W(MAC, "[eNB %d] frame %d subframe %d:invalid slice %d percentage %f. resetting to zero", LOG_W(MAC,
module_idP, frameP, subframeP, i, sli->ul[i].pct); "[eNB %d][SLICE %d][UL] frame %d subframe %d: invalid percentage %f. resetting to zero",
module_idP, sli->ul[i].id, frameP, subframeP, sli->ul[i].pct);
sli->ul[i].pct = 0; sli->ul[i].pct = 0;
} }
sli->tot_pct_ul += sli->ul[i].pct; sli->tot_pct_ul += sli->ul[i].pct;
...@@ -1088,7 +1089,7 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -1088,7 +1089,7 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
// check if the slice rb share has changed, and log the console // check if the slice rb share has changed, and log the console
if (sli->ul[i].pct_current != sli->ul[i].pct){ if (sli->ul[i].pct_current != sli->ul[i].pct){
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: total percentage %f-->%f, slice RB percentage has changed: %f-->%f\n", LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: total percentage %f-->%f, slice RB percentage has changed: %f-->%f\n",
module_idP, i, frameP, subframeP, sli->tot_pct_ul_current, module_idP, sli->ul[i].id, frameP, subframeP, sli->tot_pct_ul_current,
sli->tot_pct_ul, sli->ul[i].pct_current, sli->ul[i].pct); sli->tot_pct_ul, sli->ul[i].pct_current, sli->ul[i].pct);
sli->tot_pct_ul_current = sli->tot_pct_ul; sli->tot_pct_ul_current = sli->tot_pct_ul;
sli->ul[i].pct_current = sli->ul[i].pct; sli->ul[i].pct_current = sli->ul[i].pct;
...@@ -1098,11 +1099,12 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -1098,11 +1099,12 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
if (sli->ul[i].maxmcs_current != sli->ul[i].maxmcs){ if (sli->ul[i].maxmcs_current != sli->ul[i].maxmcs){
if ((sli->ul[i].maxmcs >= 0) && (sli->ul[i].maxmcs <= 16)){ if ((sli->ul[i].maxmcs >= 0) && (sli->ul[i].maxmcs <= 16)){
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: slice MAX MCS has changed: %d-->%d\n", LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: slice MAX MCS has changed: %d-->%d\n",
module_idP, i, frameP, subframeP, sli->ul[i].maxmcs_current, sli->ul[i].maxmcs); module_idP, sli->ul[i].id, frameP, subframeP,
sli->ul[i].maxmcs_current, sli->ul[i].maxmcs);
sli->ul[i].maxmcs_current = sli->ul[i].maxmcs; sli->ul[i].maxmcs_current = sli->ul[i].maxmcs;
} else { } else {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid slice max mcs %d, revert the previous value %d\n", LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid slice max mcs %d, revert the previous value %d\n",
module_idP, i, sli->ul[i].maxmcs, sli->ul[i].maxmcs_current); module_idP, sli->ul[i].id, sli->ul[i].maxmcs, sli->ul[i].maxmcs_current);
sli->ul[i].maxmcs = sli->ul[i].maxmcs_current; sli->ul[i].maxmcs = sli->ul[i].maxmcs_current;
} }
} }
...@@ -1110,11 +1112,13 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -1110,11 +1112,13 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
if (sli->ul[i].first_rb_current != sli->ul[i].first_rb){ if (sli->ul[i].first_rb_current != sli->ul[i].first_rb){
if (sli->ul[i].first_rb >= 0){ // FIXME: Max limit is checked in the scheduler if (sli->ul[i].first_rb >= 0){ // FIXME: Max limit is checked in the scheduler
LOG_N(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: slice first rb has changed: %d-->%d\n", LOG_N(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: slice first rb has changed: %d-->%d\n",
module_idP, i, frameP, subframeP, sli->ul[i].first_rb_current, sli->ul[i].first_rb); module_idP, sli->ul[i].id, frameP, subframeP,
sli->ul[i].first_rb_current, sli->ul[i].first_rb);
sli->ul[i].first_rb_current = sli->ul[i].first_rb; sli->ul[i].first_rb_current = sli->ul[i].first_rb;
} else { } else {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid slice first rb %d, revert the previous value %d\n", LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid slice first rb %d, revert the previous value %d\n",
module_idP, i, sli->ul[i].first_rb, sli->ul[i].first_rb_current); module_idP, sli->ul[i].id, sli->ul[i].first_rb,
sli->ul[i].first_rb_current);
sli->ul[i].first_rb = sli->ul[i].first_rb_current; sli->ul[i].first_rb = sli->ul[i].first_rb_current;
} }
} }
...@@ -1122,13 +1126,13 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -1122,13 +1126,13 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
// check if a new scheduler, and log the console // check if a new scheduler, and log the console
if (sli->ul[i].update_sched_current != sli->ul[i].update_sched) { if (sli->ul[i].update_sched_current != sli->ul[i].update_sched) {
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: UL scheduler for this slice is updated: %s \n", LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: UL scheduler for this slice is updated: %s \n",
module_idP, i, frameP, subframeP, sli->ul[i].sched_name); module_idP, sli->ul[i].id, frameP, subframeP, sli->ul[i].sched_name);
sli->ul[i].update_sched_current = sli->ul[i].update_sched; sli->ul[i].update_sched_current = sli->ul[i].update_sched;
} }
} else { } else {
if (sli->n_ul == sli->n_ul_current) { if (sli->n_ul == sli->n_ul_current) {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid total RB share (%f->%f), reduce proportionally the RB share by 0.1\n", LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid total RB share (%f->%f), reduce proportionally the RB share by 0.1\n",
module_idP, i, sli->tot_pct_ul_current, sli->tot_pct_ul); module_idP, sli->ul[i].id, sli->tot_pct_ul_current, sli->tot_pct_ul);
if (sli->ul[i].pct > sli->avg_pct_ul) { if (sli->ul[i].pct > sli->avg_pct_ul) {
sli->ul[i].pct -= 0.1; sli->ul[i].pct -= 0.1;
sli->tot_pct_ul -= 0.1; sli->tot_pct_ul -= 0.1;
...@@ -1136,9 +1140,8 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -1136,9 +1140,8 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
} else { } else {
// here we can correct the values, e.g. reduce proportionally // here we can correct the values, e.g. reduce proportionally
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid total RB share (%f->%f), revert the number of slice to its previous value (%d->%d)\n", LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid total RB share (%f->%f), revert the number of slice to its previous value (%d->%d)\n",
module_idP, i, sli->tot_pct_ul_current, module_idP, sli->ul[i].id, sli->tot_pct_ul_current,
sli->tot_pct_ul, sli->n_ul, sli->tot_pct_ul, sli->n_ul, sli->n_ul_current);
sli->n_ul_current);
sli->n_ul = sli->n_ul_current; sli->n_ul = sli->n_ul_current;
sli->ul[i].pct = sli->ul[i].pct_current; sli->ul[i].pct = sli->ul[i].pct_current;
} }
...@@ -1153,7 +1156,7 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -1153,7 +1156,7 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
void void
schedule_ulsch_rnti(module_id_t module_idP, schedule_ulsch_rnti(module_id_t module_idP,
slice_id_t slice_id, int slice_idx,
frame_t frameP, frame_t frameP,
sub_frame_t subframeP, sub_frame_t subframeP,
unsigned char sched_subframeP, uint16_t * first_rb) unsigned char sched_subframeP, uint16_t * first_rb)
...@@ -1197,14 +1200,14 @@ schedule_ulsch_rnti(module_id_t module_idP, ...@@ -1197,14 +1200,14 @@ schedule_ulsch_rnti(module_id_t module_idP,
for (CC_id = 0; CC_id < NFAPI_CC_MAX; ++CC_id) { for (CC_id = 0; CC_id < NFAPI_CC_MAX; ++CC_id) {
N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth); N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth);
UE_list->first_rb_offset[CC_id][slice_id] = cmin(N_RB_UL, sli->ul[slice_id].first_rb); UE_list->first_rb_offset[CC_id][slice_idx] = cmin(N_RB_UL, sli->ul[slice_idx].first_rb);
} }
//LOG_D(MAC, "entering ulsch preprocesor\n"); //LOG_D(MAC, "entering ulsch preprocesor\n");
ulsch_scheduler_pre_processor(module_idP, slice_id, frameP, subframeP, sched_subframeP, first_rb); ulsch_scheduler_pre_processor(module_idP, slice_idx, frameP, subframeP, sched_subframeP, first_rb);
for (CC_id = 0; CC_id < NFAPI_CC_MAX; ++CC_id) { for (CC_id = 0; CC_id < NFAPI_CC_MAX; ++CC_id) {
first_rb_slice[CC_id] = first_rb[CC_id] + UE_list->first_rb_offset[CC_id][slice_id]; first_rb_slice[CC_id] = first_rb[CC_id] + UE_list->first_rb_offset[CC_id][slice_idx];
} }
//LOG_D(MAC, "exiting ulsch preprocesor\n"); //LOG_D(MAC, "exiting ulsch preprocesor\n");
...@@ -1214,7 +1217,7 @@ schedule_ulsch_rnti(module_id_t module_idP, ...@@ -1214,7 +1217,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
for (UE_id = UE_list->head_ul; UE_id >= 0; for (UE_id = UE_list->head_ul; UE_id >= 0;
UE_id = UE_list->next_ul[UE_id]) { UE_id = UE_list->next_ul[UE_id]) {
if (!ue_ul_slice_membership(module_idP, UE_id, slice_id)) if (!ue_ul_slice_membership(module_idP, UE_id, slice_idx))
continue; continue;
// don't schedule if Msg4 is not received yet // don't schedule if Msg4 is not received yet
...@@ -1402,7 +1405,7 @@ schedule_ulsch_rnti(module_id_t module_idP, ...@@ -1402,7 +1405,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
UE_template->oldNDI_UL[harq_pid] = ndi; UE_template->oldNDI_UL[harq_pid] = ndi;
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power = normalized_rx_power; UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power = normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power = target_rx_power; UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power = target_rx_power;
UE_template->mcs_UL[harq_pid] = cmin(UE_template->pre_assigned_mcs_ul, sli->ul[slice_id].maxmcs); UE_template->mcs_UL[harq_pid] = cmin(UE_template->pre_assigned_mcs_ul, sli->ul[slice_idx].maxmcs);
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1= UE_template->mcs_UL[harq_pid]; UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1= UE_template->mcs_UL[harq_pid];
//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS //cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
if (UE_template->pre_allocated_rb_table_index_ul >= 0) { if (UE_template->pre_allocated_rb_table_index_ul >= 0) {
......
...@@ -1104,8 +1104,8 @@ typedef struct { ...@@ -1104,8 +1104,8 @@ typedef struct {
uint16_t sorting_criteria[MAX_NUM_SLICES][CR_NUM]; uint16_t sorting_criteria[MAX_NUM_SLICES][CR_NUM];
uint16_t first_rb_offset[NFAPI_CC_MAX][MAX_NUM_SLICES]; uint16_t first_rb_offset[NFAPI_CC_MAX][MAX_NUM_SLICES];
slice_id_t assoc_dl_slice[MAX_MOBILES_PER_ENB]; int assoc_dl_slice_idx[MAX_MOBILES_PER_ENB];
slice_id_t assoc_ul_slice[MAX_MOBILES_PER_ENB]; int assoc_ul_slice_idx[MAX_MOBILES_PER_ENB];
} UE_list_t; } UE_list_t;
...@@ -1144,12 +1144,14 @@ typedef struct { ...@@ -1144,12 +1144,14 @@ typedef struct {
* slice specific scheduler for the DL * slice specific scheduler for the DL
*/ */
typedef void (*slice_scheduler_dl)(module_id_t mod_id, typedef void (*slice_scheduler_dl)(module_id_t mod_id,
slice_id_t slice_id, int slice_idx,
frame_t frame, frame_t frame,
sub_frame_t subframe, sub_frame_t subframe,
int *mbsfn_flag); int *mbsfn_flag);
typedef struct { typedef struct {
slice_id_t id;
/// RB share for each slice for past and current time /// RB share for each slice for past and current time
float pct; float pct;
float pct_current; float pct_current;
...@@ -1192,13 +1194,15 @@ typedef struct { ...@@ -1192,13 +1194,15 @@ typedef struct {
} slice_sched_conf_dl_t; } slice_sched_conf_dl_t;
typedef void (*slice_scheduler_ul)(module_id_t mod_id, typedef void (*slice_scheduler_ul)(module_id_t mod_id,
slice_id_t slice_id, int slice_idx,
frame_t frame, frame_t frame,
sub_frame_t subframe, sub_frame_t subframe,
unsigned char sched_subframe, unsigned char sched_subframe,
uint16_t *first_rb); uint16_t *first_rb);
typedef struct { typedef struct {
slice_id_t id;
/// RB share for each slice for past and current time /// RB share for each slice for past and current time
float pct; float pct;
float pct_current; float pct_current;
......
...@@ -103,12 +103,12 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -103,12 +103,12 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP,
/** \brief ULSCH Scheduling per RNTI /** \brief ULSCH Scheduling per RNTI
@param Mod_id Instance ID of eNB @param Mod_id Instance ID of eNB
@param slice_id Instance slice for this eNB @param slice_idx Slice instance index for this eNB
@param frame Frame index @param frame Frame index
@param subframe Subframe number on which to act @param subframe Subframe number on which to act
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup) @param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
*/ */
void schedule_ulsch_rnti(module_id_t module_idP, slice_id_t slice_idP, frame_t frameP, void schedule_ulsch_rnti(module_id_t module_idP, int slice_idx, frame_t frameP,
sub_frame_t subframe, sub_frame_t subframe,
unsigned char sched_subframe, unsigned char sched_subframe,
uint16_t * first_rb); uint16_t * first_rb);
...@@ -131,7 +131,7 @@ void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,i ...@@ -131,7 +131,7 @@ void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,i
void schedule_dlsch(module_id_t module_idP, frame_t frameP, void schedule_dlsch(module_id_t module_idP, frame_t frameP,
sub_frame_t subframe, int *mbsfn_flag); sub_frame_t subframe, int *mbsfn_flag);
void schedule_ue_spec(module_id_t module_idP, slice_id_t slice_idP, void schedule_ue_spec(module_id_t module_idP, int slice_idxP,
frame_t frameP,sub_frame_t subframe, int *mbsfn_flag); frame_t frameP,sub_frame_t subframe, int *mbsfn_flag);
void schedule_ue_spec_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag); void schedule_ue_spec_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
...@@ -192,6 +192,7 @@ void clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP, ...@@ -192,6 +192,7 @@ void clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP,
// eNB functions // eNB functions
/* \brief This function assigns pre-available RBS to each UE in specified sub-bands before scheduling is done /* \brief This function assigns pre-available RBS to each UE in specified sub-bands before scheduling is done
@param Mod_id Instance ID of eNB @param Mod_id Instance ID of eNB
@param slice_idxP Slice instance index for the slice in which scheduling happens
@param frame Index of frame @param frame Index of frame
@param subframe Index of current subframe @param subframe Index of current subframe
@param N_RBS Number of resource block groups @param N_RBS Number of resource block groups
...@@ -199,13 +200,13 @@ void clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP, ...@@ -199,13 +200,13 @@ void clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP,
void dlsch_scheduler_pre_processor(module_id_t module_idP, void dlsch_scheduler_pre_processor(module_id_t module_idP,
slice_id_t slice_idP, int slice_idxP,
frame_t frameP, frame_t frameP,
sub_frame_t subframe, sub_frame_t subframe,
int *mbsfn_flag); int *mbsfn_flag);
void dlsch_scheduler_pre_processor_reset(module_id_t module_idP, void dlsch_scheduler_pre_processor_reset(module_id_t module_idP,
slice_id_t slice_id, int slice_idx,
frame_t frameP, frame_t frameP,
sub_frame_t subframeP, sub_frame_t subframeP,
int min_rb_unit[NFAPI_CC_MAX], int min_rb_unit[NFAPI_CC_MAX],
...@@ -215,11 +216,11 @@ void dlsch_scheduler_pre_processor_reset(module_id_t module_idP, ...@@ -215,11 +216,11 @@ void dlsch_scheduler_pre_processor_reset(module_id_t module_idP,
int *mbsfn_flag); int *mbsfn_flag);
void dlsch_scheduler_pre_processor_partitioning(module_id_t Mod_id, void dlsch_scheduler_pre_processor_partitioning(module_id_t Mod_id,
slice_id_t slice_id, int slice_idx,
const uint8_t rbs_retx[NFAPI_CC_MAX]); const uint8_t rbs_retx[NFAPI_CC_MAX]);
void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
slice_id_t slice_id, int slice_idx,
frame_t frameP, frame_t frameP,
sub_frame_t subframeP, sub_frame_t subframeP,
int min_rb_unit[NFAPI_CC_MAX], int min_rb_unit[NFAPI_CC_MAX],
...@@ -227,7 +228,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id, ...@@ -227,7 +228,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB]); uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB]);
void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
slice_id_t slice_id, int slice_idx,
int min_rb_unit[NFAPI_CC_MAX], int min_rb_unit[NFAPI_CC_MAX],
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
...@@ -236,7 +237,7 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id, ...@@ -236,7 +237,7 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]); uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX]);
void dlsch_scheduler_pre_processor_intraslice_sharing(module_id_t Mod_id, void dlsch_scheduler_pre_processor_intraslice_sharing(module_id_t Mod_id,
slice_id_t slice_id, int slice_idx,
int min_rb_unit[NFAPI_CC_MAX], int min_rb_unit[NFAPI_CC_MAX],
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB], uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB],
...@@ -713,20 +714,20 @@ void set_ul_DAI(int module_idP, ...@@ -713,20 +714,20 @@ void set_ul_DAI(int module_idP,
int frameP, int frameP,
int subframeP); int subframeP);
void ulsch_scheduler_pre_processor(module_id_t module_idP, slice_id_t slice_id, int frameP, void ulsch_scheduler_pre_processor(module_id_t module_idP, int slice_idx, int frameP,
sub_frame_t subframeP, sub_frame_t subframeP,
unsigned char sched_subframeP, unsigned char sched_subframeP,
uint16_t * first_rb); uint16_t * first_rb);
void store_ulsch_buffer(module_id_t module_idP, int frameP, void store_ulsch_buffer(module_id_t module_idP, int frameP,
sub_frame_t subframeP); sub_frame_t subframeP);
void sort_ue_ul(module_id_t module_idP, int frameP, sub_frame_t subframeP); void sort_ue_ul(module_id_t module_idP, int frameP, sub_frame_t subframeP);
void assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP, void assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
sub_frame_t subframeP, uint16_t * first_rb); sub_frame_t subframeP, uint16_t * first_rb);
void adjust_bsr_info(int buffer_occupancy, uint16_t TBS, void adjust_bsr_info(int buffer_occupancy, uint16_t TBS,
UE_TEMPLATE * UE_template); UE_TEMPLATE * UE_template);
int phy_stats_exist(module_id_t Mod_id, int rnti); int phy_stats_exist(module_id_t Mod_id, int rnti);
void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t subframeP); void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subframeP);
/*! \fn UE_L2_state_t ue_scheduler(const module_id_t module_idP,const frame_t frameP, const sub_frame_t subframe, const lte_subframe_t direction,const uint8_t eNB_index) /*! \fn UE_L2_state_t ue_scheduler(const module_id_t module_idP,const frame_t frameP, const sub_frame_t subframe, const lte_subframe_t direction,const uint8_t eNB_index)
\brief UE scheduler where all the ue background tasks are done. This function performs the following: 1) Trigger PDCP every 5ms 2) Call RRC for link status return to PHY3) Perform SR/BSR procedures for scheduling feedback 4) Perform PHR procedures. \brief UE scheduler where all the ue background tasks are done. This function performs the following: 1) Trigger PDCP every 5ms 2) Call RRC for link status return to PHY3) Perform SR/BSR procedures for scheduling feedback 4) Perform PHR procedures.
...@@ -1262,8 +1263,8 @@ void pre_scd_nb_rbs_required( module_id_t module_idP, ...@@ -1262,8 +1263,8 @@ void pre_scd_nb_rbs_required( module_id_t module_idP,
/*Slice related functions */ /*Slice related functions */
uint16_t nb_rbs_allowed_slice(float rb_percentage, int total_rbs); uint16_t nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
int ue_dl_slice_membership(module_id_t mod_id, int UE_id, slice_id_t slice_id); int ue_dl_slice_membership(module_id_t mod_id, int UE_id, int slice_idx);
int ue_ul_slice_membership(module_id_t mod_id, int UE_id, slice_id_t slice_id); int ue_ul_slice_membership(module_id_t mod_id, int UE_id, int slice_idx);
/* from here: prototypes to get rid of compilation warnings: doc to be written by function author */ /* from here: prototypes to get rid of compilation warnings: doc to be written by function author */
uint8_t ul_subframe2_k_phich(COMMON_channels_t * cc, sub_frame_t ul_subframe); uint8_t ul_subframe2_k_phich(COMMON_channels_t * cc, sub_frame_t ul_subframe);
......
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment