Commit 991e5ad4 authored by kn.raju's avatar kn.raju Committed by Anes Rose Rigiel Antony

Scheduling and handling of SSB-RO

parent f7dc17ec
...@@ -203,11 +203,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t ...@@ -203,11 +203,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
// TODO: check if this is correct for PARALLEL_RU_L1_TRX_SPLIT // TODO: check if this is correct for PARALLEL_RU_L1_TRX_SPLIT
// Do PRACH RU processing // Do PRACH RU processing
int prach_id=find_nr_prach(gNB,frame_rx,slot_rx,0,SEARCH_EXIST); L1_nr_prach_procedures(gNB,frame_rx,slot_rx);
if (prach_id>=0) {
L1_nr_prach_procedures(gNB,frame_rx,slot_rx,&gNB->prach_vars.list[prach_id].pdu);
gNB->prach_vars.list[prach_id].frame=-1;
}
phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx); phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx);
} }
......
...@@ -1582,6 +1582,8 @@ void *ru_thread( void *param ) { ...@@ -1582,6 +1582,8 @@ void *ru_thread( void *param ) {
(void*)ru->common.rxdataF[aa], fp->symbols_per_slot*fp->ofdm_symbol_size*sizeof(int32_t)); (void*)ru->common.rxdataF[aa], fp->symbols_per_slot*fp->ofdm_symbol_size*sizeof(int32_t));
// Do PRACH RU processing // Do PRACH RU processing
for(i = 0;i < NUMBER_OF_NR_RU_PRACH_MAX; i++) {
int prach_id=find_nr_prach_ru(ru,proc->frame_rx,proc->tti_rx,SEARCH_EXIST); int prach_id=find_nr_prach_ru(ru,proc->frame_rx,proc->tti_rx,SEARCH_EXIST);
if (prach_id>=0) { if (prach_id>=0) {
rx_nr_prach_ru(ru, rx_nr_prach_ru(ru,
...@@ -1592,6 +1594,7 @@ void *ru_thread( void *param ) { ...@@ -1592,6 +1594,7 @@ void *ru_thread( void *param ) {
free_nr_ru_prach_entry(ru,prach_id); free_nr_ru_prach_entry(ru,prach_id);
} }
} }
}
// At this point, all information for subframe has been received on FH interface // At this point, all information for subframe has been received on FH interface
......
...@@ -385,7 +385,6 @@ typedef struct ...@@ -385,7 +385,6 @@ typedef struct
typedef struct typedef struct
{ {
uint8_t num_prach_fd_occasions;
nfapi_uint16_tlv_t prach_root_sequence_index;//Starting logical root sequence index, 𝑖, equivalent to higher layer parameter prach-RootSequenceIndex [38.211, sec 6.3.3.1] Value: 0 -> 837 nfapi_uint16_tlv_t prach_root_sequence_index;//Starting logical root sequence index, 𝑖, equivalent to higher layer parameter prach-RootSequenceIndex [38.211, sec 6.3.3.1] Value: 0 -> 837
nfapi_uint8_tlv_t num_root_sequences;//Number of root sequences for a particular FD occasion that are required to generate the necessary number of preambles nfapi_uint8_tlv_t num_root_sequences;//Number of root sequences for a particular FD occasion that are required to generate the necessary number of preambles
nfapi_uint16_tlv_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272 nfapi_uint16_tlv_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272
......
...@@ -487,12 +487,14 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) { ...@@ -487,12 +487,14 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config) {
fd_occasion = 0; fd_occasion = 0;
nfapi_nr_prach_config_t *prach_config = &gNB_config->prach_config; nfapi_nr_prach_config_t *prach_config = &gNB_config->prach_config;
short_sequence = prach_config->prach_sequence_length.value; short_sequence = prach_config->prach_sequence_length.value;
// for(fd_occasion = 0; fd_occasion <= prach_config->num_prach_fd_occasions.value ; fd_occasion) { // TODO Need to handle for msg1-fdm > 1
num_sequences = prach_config->num_prach_fd_occasions_list[fd_occasion].num_root_sequences.value; num_sequences = prach_config->num_prach_fd_occasions_list[fd_occasion].num_root_sequences.value;
rootSequenceIndex = prach_config->num_prach_fd_occasions_list[fd_occasion].prach_root_sequence_index.value; rootSequenceIndex = prach_config->num_prach_fd_occasions_list[fd_occasion].prach_root_sequence_index.value;
compute_nr_prach_seq(short_sequence, num_sequences, rootSequenceIndex, RC.gNB[Mod_id]->X_u); compute_nr_prach_seq(short_sequence, num_sequences, rootSequenceIndex, RC.gNB[Mod_id]->X_u);
// }
RC.gNB[Mod_id]->configured = 1; RC.gNB[Mod_id]->configured = 1;
find_SSB_and_RO_available(Mod_id);
LOG_I(PHY,"gNB %d configured\n",Mod_id); LOG_I(PHY,"gNB %d configured\n",Mod_id);
} }
......
...@@ -46,18 +46,17 @@ void init_prach_list(PHY_VARS_gNB *gNB) { ...@@ -46,18 +46,17 @@ void init_prach_list(PHY_VARS_gNB *gNB) {
for (int i=0; i<NUMBER_OF_NR_PRACH_MAX; i++) gNB->prach_vars.list[i].frame=-1; for (int i=0; i<NUMBER_OF_NR_PRACH_MAX; i++) gNB->prach_vars.list[i].frame=-1;
} }
int16_t find_nr_prach(PHY_VARS_gNB *gNB,int frame,int slot, int numRA, find_type_t type) { int16_t find_nr_prach(PHY_VARS_gNB *gNB,int frame, int slot, find_type_t type) {
uint16_t i; uint16_t i;
int16_t first_free_index=-1; int16_t first_free_index=-1;
AssertFatal(gNB!=NULL,"gNB is null\n"); AssertFatal(gNB!=NULL,"gNB is null\n");
for (i=0; i<NUMBER_OF_NR_PRACH_MAX; i++) { for (i=0; i<NUMBER_OF_NR_PRACH_MAX; i++) {
LOG_D(PHY,"searching for PRACH in %d.%d with numRA %d: prach_index %d=> %d.%d numRA %d\n", frame,slot,numRA,i, LOG_D(PHY,"searching for PRACH in %d.%d prach_index %d=> %d.%d\n", frame,slot,i,
gNB->prach_vars.list[i].frame,gNB->prach_vars.list[i].slot,gNB->prach_vars.list[i].pdu.num_ra); gNB->prach_vars.list[i].frame,gNB->prach_vars.list[i].slot);
if ((gNB->prach_vars.list[i].frame == frame) && if ((gNB->prach_vars.list[i].frame == frame) &&
(gNB->prach_vars.list[i].slot == slot) && (gNB->prach_vars.list[i].slot == slot)) return i;
(gNB->prach_vars.list[i].pdu.num_ra == numRA)) return i;
else if ((gNB->prach_vars.list[i].frame == -1) && (first_free_index==-1)) first_free_index=i; else if ((gNB->prach_vars.list[i].frame == -1) && (first_free_index==-1)) first_free_index=i;
} }
if (type == SEARCH_EXIST) return -1; if (type == SEARCH_EXIST) return -1;
...@@ -70,7 +69,7 @@ void nr_fill_prach(PHY_VARS_gNB *gNB, ...@@ -70,7 +69,7 @@ void nr_fill_prach(PHY_VARS_gNB *gNB,
int Slot, int Slot,
nfapi_nr_prach_pdu_t *prach_pdu) { nfapi_nr_prach_pdu_t *prach_pdu) {
int prach_id = find_nr_prach(gNB,SFN,Slot,prach_pdu->num_ra,SEARCH_EXIST_OR_FREE); int prach_id = find_nr_prach(gNB,SFN,Slot,SEARCH_EXIST_OR_FREE);
AssertFatal( (prach_id>=0) && (prach_id<NUMBER_OF_NR_PRACH_MAX), AssertFatal( (prach_id>=0) && (prach_id<NUMBER_OF_NR_PRACH_MAX),
"illegal or no prach_id found!!! numRA %d prach_id %d\n",prach_pdu->num_ra,prach_id); "illegal or no prach_id found!!! numRA %d prach_id %d\n",prach_pdu->num_ra,prach_id);
...@@ -571,13 +570,11 @@ void rx_nr_prach(PHY_VARS_gNB *gNB, ...@@ -571,13 +570,11 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
fp = &gNB->frame_parms; fp = &gNB->frame_parms;
nb_rx = gNB->gNB_config.carrier_config.num_rx_ant.value; nb_rx = gNB->gNB_config.carrier_config.num_rx_ant.value;
rootSequenceIndex = cfg->num_prach_fd_occasions_list[prach_pdu->num_ra].prach_root_sequence_index.value;
rootSequenceIndex = cfg->num_prach_fd_occasions_list[0].prach_root_sequence_index.value; numrootSequenceIndex = cfg->num_prach_fd_occasions_list[prach_pdu->num_ra].num_root_sequences.value;
numrootSequenceIndex = cfg->num_prach_fd_occasions_list[0].num_root_sequences.value;
NCS = prach_pdu->num_cs;//cfg->num_prach_fd_occasions_list[0].prach_zero_corr_conf.value; NCS = prach_pdu->num_cs;//cfg->num_prach_fd_occasions_list[0].prach_zero_corr_conf.value;
int prach_sequence_length = cfg->prach_sequence_length.value; int prach_sequence_length = cfg->prach_sequence_length.value;
int msg1_frequencystart = cfg->num_prach_fd_occasions_list[prach_pdu->num_ra].k1.value;
int msg1_frequencystart = cfg->num_prach_fd_occasions_list[0].k1.value;
// int num_unused_root_sequences = cfg->num_prach_fd_occasions_list[0].num_unused_root_sequences.value; // int num_unused_root_sequences = cfg->num_prach_fd_occasions_list[0].num_unused_root_sequences.value;
// cfg->num_prach_fd_occasions_list[0].unused_root_sequences_list // cfg->num_prach_fd_occasions_list[0].unused_root_sequences_list
......
...@@ -306,7 +306,7 @@ void nr_fill_prach_ru(RU_t *ru, ...@@ -306,7 +306,7 @@ void nr_fill_prach_ru(RU_t *ru,
int Slot, int Slot,
nfapi_nr_prach_pdu_t *prach_pdu); nfapi_nr_prach_pdu_t *prach_pdu);
int16_t find_nr_prach(PHY_VARS_gNB *gNB,int frame,int slot, int numRA, find_type_t type); int16_t find_nr_prach(PHY_VARS_gNB *gNB,int frame,int slot, find_type_t type);
int16_t find_nr_prach_ru(RU_t *ru,int frame,int slot, find_type_t type); int16_t find_nr_prach_ru(RU_t *ru,int frame,int slot, find_type_t type);
NR_gNB_PUCCH_t *new_gNB_pucch(void); NR_gNB_PUCCH_t *new_gNB_pucch(void);
......
...@@ -52,11 +52,9 @@ extern uint8_t nfapi_mode; ...@@ -52,11 +52,9 @@ extern uint8_t nfapi_mode;
extern int oai_nfapi_nr_rach_ind(nfapi_rach_indication_t *rach_ind); extern int oai_nfapi_nr_rach_ind(nfapi_rach_indication_t *rach_ind);
void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot, void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot) {
nfapi_nr_prach_pdu_t *prach_pdu) {
uint16_t max_preamble[4]={0},max_preamble_energy[4]={0},max_preamble_delay[4]={0}; uint16_t max_preamble[4]={0},max_preamble_energy[4]={0},max_preamble_delay[4]={0};
uint16_t i;
gNB->UL_INFO.rach_ind.number_of_pdus=0; gNB->UL_INFO.rach_ind.number_of_pdus=0;
...@@ -70,13 +68,19 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot, ...@@ -70,13 +68,19 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot,
for (i=0;i<gNB->num_RU;i++) { for (int i=0;i<gNB->num_RU;i++) {
ru=gNB->RU_list[i]; ru=gNB->RU_list[i];
for (ru_aa=0,aa=0;ru_aa<ru->nb_rx;ru_aa++,aa++) { for (ru_aa=0,aa=0;ru_aa<ru->nb_rx;ru_aa++,aa++) {
gNB->prach_vars.rxsigF[aa] = gNB->RU_list[i]->prach_rxsigF[ru_aa]; gNB->prach_vars.rxsigF[aa] = gNB->RU_list[i]->prach_rxsigF[ru_aa];
} }
} }
nfapi_nr_prach_pdu_t *prach_pdu;
for(int i = 0; i < NUMBER_OF_NR_PRACH_MAX; i++) {
int prach_id=find_nr_prach(gNB,frame,slot,SEARCH_EXIST);
if (prach_id>=0) {
prach_pdu = &gNB->prach_vars.list[prach_id].pdu;
rx_nr_prach(gNB, rx_nr_prach(gNB,
prach_pdu, prach_pdu,
frame, frame,
...@@ -86,6 +90,7 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot, ...@@ -86,6 +90,7 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot,
&max_preamble_delay[0] &max_preamble_delay[0]
); );
gNB->prach_vars.list[prach_id].frame=-1;
LOG_D(PHY,"[RAPROC] Frame %d, slot %d : Most likely preamble %d, energy %d dB delay %d (prach_energy counter %d)\n", LOG_D(PHY,"[RAPROC] Frame %d, slot %d : Most likely preamble %d, energy %d dB delay %d (prach_energy counter %d)\n",
frame,slot, frame,slot,
max_preamble[0], max_preamble[0],
...@@ -109,30 +114,30 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot, ...@@ -109,30 +114,30 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot,
T_INT(max_preamble[0]), T_INT(max_preamble_energy[0]), T_INT(max_preamble_delay[0])); T_INT(max_preamble[0]), T_INT(max_preamble_energy[0]), T_INT(max_preamble_delay[0]));
gNB->UL_INFO.rach_ind.number_of_pdus = 1; gNB->UL_INFO.rach_ind.number_of_pdus += 1;
gNB->UL_INFO.rach_ind.pdu_list = &gNB->prach_pdu_indication_list[0]; gNB->UL_INFO.rach_ind.sfn = frame;
gNB->UL_INFO.rach_ind.sfn = frame;
gNB->UL_INFO.rach_ind.slot = slot; gNB->UL_INFO.rach_ind.slot = slot;
gNB->UL_INFO.rach_ind.pdu_list = &gNB->prach_pdu_indication_list[i];
gNB->prach_pdu_indication_list[0].phy_cell_id = gNB->gNB_config.cell_config.phy_cell_id.value; gNB->prach_pdu_indication_list[i].phy_cell_id = gNB->gNB_config.cell_config.phy_cell_id.value;
gNB->prach_pdu_indication_list[0].symbol_index = prach_pdu->prach_start_symbol; // FIXME to be changed for multi-ssb (this is only the start symbol of first occasion) gNB->prach_pdu_indication_list[i].symbol_index = prach_pdu->prach_start_symbol; // FIXME to be changed for multi-ssb (this is only the start symbol of first occasion)
gNB->prach_pdu_indication_list[0].slot_index = slot; gNB->prach_pdu_indication_list[i].slot_index = slot;
gNB->prach_pdu_indication_list[0].freq_index = prach_pdu->num_ra; gNB->prach_pdu_indication_list[i].freq_index = prach_pdu->num_ra;
gNB->prach_pdu_indication_list[0].avg_rssi = (max_preamble_energy[0]<631) ? (128+(max_preamble_energy[0]/5)) : 254; gNB->prach_pdu_indication_list[i].avg_rssi = (max_preamble_energy[0]<631) ? (128+(max_preamble_energy[0]/5)) : 254;
gNB->prach_pdu_indication_list[0].avg_snr = 0xff; // invalid for now gNB->prach_pdu_indication_list[i].avg_snr = 0xff; // invalid for now
gNB->prach_pdu_indication_list[0].num_preamble = 1; gNB->prach_pdu_indication_list[i].num_preamble = 1;
gNB->prach_pdu_indication_list[0].preamble_list = gNB->preamble_list; gNB->prach_pdu_indication_list[i].preamble_list = gNB->preamble_list;
gNB->prach_pdu_indication_list[0].preamble_list[0].preamble_index = max_preamble[0]; gNB->prach_pdu_indication_list[i].preamble_list[0].preamble_index = max_preamble[0];
gNB->prach_pdu_indication_list[0].preamble_list[0].timing_advance = max_preamble_delay[0]; gNB->prach_pdu_indication_list[i].preamble_list[0].timing_advance = max_preamble_delay[0];
gNB->prach_pdu_indication_list[0].preamble_list[0].preamble_pwr = 0xffffffff; gNB->prach_pdu_indication_list[i].preamble_list[0].preamble_pwr = 0xffffffff;
} }
gNB->measurements.prach_I0 = ((gNB->measurements.prach_I0*900)>>10) + ((max_preamble_energy[0]*124)>>10); gNB->measurements.prach_I0 = ((gNB->measurements.prach_I0*900)>>10) + ((max_preamble_energy[0]*124)>>10);
if (frame==0) LOG_I(PHY,"prach_I0 = %d.%d dB\n",gNB->measurements.prach_I0/10,gNB->measurements.prach_I0%10); if (frame==0) LOG_I(PHY,"prach_I0 = %d.%d dB\n",gNB->measurements.prach_I0/10,gNB->measurements.prach_I0%10);
if (gNB->prach_energy_counter < 100) gNB->prach_energy_counter++; if (gNB->prach_energy_counter < 100) gNB->prach_energy_counter++;
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX,0);
} }
...@@ -39,7 +39,7 @@ void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME ...@@ -39,7 +39,7 @@ void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, int frame_tx, int slot_tx, int do_meas); void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, int frame_tx, int slot_tx, int do_meas);
void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx); void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx); void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_prach_pdu_t *prach_pdu); void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot);
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot); void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot);
void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx); void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx);
void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx); void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx);
......
...@@ -98,7 +98,21 @@ int get_nr_prach_info_from_index(uint8_t index, ...@@ -98,7 +98,21 @@ int get_nr_prach_info_from_index(uint8_t index,
uint16_t *format, uint16_t *format,
uint8_t *start_symbol, uint8_t *start_symbol,
uint8_t *N_t_slot, uint8_t *N_t_slot,
uint8_t *N_dur); uint8_t *N_dur,
uint16_t *RA_sfn_index,
uint8_t *N_RA_slot);
int get_nr_prach_occasion_info_from_index(uint8_t index,
uint32_t pointa,
uint8_t mu,
uint8_t unpaired,
uint16_t *format,
uint8_t *start_symbol,
uint8_t *N_t_slot,
uint8_t *N_dur,
uint8_t *N_RA_slot,
uint16_t *N_RA_sfn,
uint8_t *max_association_period);
uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config, uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
uint8_t nb_preambles, uint8_t nb_preambles,
...@@ -117,4 +131,5 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr ...@@ -117,4 +131,5 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr
uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table); uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB); uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH);
#endif #endif
...@@ -147,6 +147,10 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -147,6 +147,10 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
cfg->ssb_config.ss_pbch_power.tl.tag = NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG; cfg->ssb_config.ss_pbch_power.tl.tag = NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->ssb_config.bch_payload.value = 1;
cfg->ssb_config.bch_payload.tl.tag = NFAPI_NR_CONFIG_BCH_PAYLOAD_TAG;
cfg->num_tlv++;
cfg->ssb_config.scs_common.value = *scc->ssbSubcarrierSpacing; cfg->ssb_config.scs_common.value = *scc->ssbSubcarrierSpacing;
cfg->ssb_config.scs_common.tl.tag = NFAPI_NR_CONFIG_SCS_COMMON_TAG; cfg->ssb_config.scs_common.tl.tag = NFAPI_NR_CONFIG_SCS_COMMON_TAG;
cfg->num_tlv++; cfg->num_tlv++;
...@@ -192,24 +196,24 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -192,24 +196,24 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
cfg->prach_config.num_prach_fd_occasions_list = (nfapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions.value*sizeof(nfapi_nr_num_prach_fd_occasions_t)); cfg->prach_config.num_prach_fd_occasions_list = (nfapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions.value*sizeof(nfapi_nr_num_prach_fd_occasions_t));
for (i=0; i<cfg->prach_config.num_prach_fd_occasions.value; i++) { for (i=0; i<cfg->prach_config.num_prach_fd_occasions.value; i++) {
cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i; // cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i;
if (cfg->prach_config.prach_sequence_length.value) if (cfg->prach_config.prach_sequence_length.value)
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139; cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
else else
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839; cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.tl.tag = NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG; cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.tl.tag = NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].k1.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart; cfg->prach_config.num_prach_fd_occasions_list[i].k1.value = (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart + get_N_RA_RB( *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing, scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
//k1=12(start index BWP) + 12(position within BWP) + 12 (no. of FDM)(RB for PRACH occasion) - 12(no.of RB belongs to BW)/2 + ko(u);
cfg->prach_config.num_prach_fd_occasions_list[i].k1.tl.tag = NFAPI_NR_CONFIG_K1_TAG; cfg->prach_config.num_prach_fd_occasions_list[i].k1.tl.tag = NFAPI_NR_CONFIG_K1_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig; cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.tl.tag = NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG; cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.tl.tag = NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.value = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup, cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.value = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup,nb_preambles, frame_type);
nb_preambles, frame_type);
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.tl.tag = NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG; cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.tl.tag = NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG;
cfg->num_tlv++; cfg->num_tlv++;
//cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences.value = ??? cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences.value = 1;
} }
cfg->prach_config.ssb_per_rach.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1; cfg->prach_config.ssb_per_rach.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
......
...@@ -442,9 +442,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -442,9 +442,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
*/ */
// This schedules MIB // This schedules MIB
if((slot_txP == 0) && (frame_txP & 7) == 0){
schedule_nr_mib(module_idP, frame_txP, slot_txP); schedule_nr_mib(module_idP, frame_txP, slot_txP);
}
if (get_softmodem_params()->phy_test == 0) if (get_softmodem_params()->phy_test == 0)
nr_schedule_RA(module_idP, frame_txP, slot_txP); nr_schedule_RA(module_idP, frame_txP, slot_txP);
......
...@@ -54,6 +54,7 @@ ...@@ -54,6 +54,7 @@
#include "common/ran_context.h" #include "common/ran_context.h"
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
extern uint8_t SSB_Table[38];
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
...@@ -66,15 +67,24 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ ...@@ -66,15 +67,24 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
int mib_sdu_length; int mib_sdu_length;
int CC_id; int CC_id;
// AssertFatal(slotP == 0, "Subframe must be 0\n");
AssertFatal(slotP == 0, "Subframe must be 0\n"); // AssertFatal((frameP & 7) == 0, "Frame must be a multiple of 8\n");
AssertFatal((frameP & 7) == 0, "Frame must be a multiple of 8\n");
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0];
dl_tti_request = &gNB->DL_req[CC_id]; dl_tti_request = &gNB->DL_req[CC_id];
dl_req = &dl_tti_request->dl_tti_request_body; dl_req = &dl_tti_request->dl_tti_request_body;
cc = &gNB->common_channels[CC_id]; cc = &gNB->common_channels[CC_id];
//SSB is transmitted based on SSB periodicity
if((frameP % cfg->ssb_table.ssb_period.value) == 0) {
uint64_t L_ssb = (((uint64_t) cfg->ssb_table.ssb_mask_list[0].ssb_mask.value)<<32) | cfg->ssb_table.ssb_mask_list[1].ssb_mask.value ;
uint32_t ssb_index = -1;
for (int i=0; i<2; i++) { // max two SSB per slot
ssb_index = i + SSB_Table[slotP]; // computing the ssb_index
if ((ssb_index<64) && ((L_ssb >> (63-ssb_index)) & 0x01)) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
mib_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, MIBCH, 1, &cc->MIB_pdu.payload[0]); // not used in this case mib_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, MIBCH, 1, &cc->MIB_pdu.payload[0]); // not used in this case
...@@ -96,7 +106,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ ...@@ -96,7 +106,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
AssertFatal(cc->ServingCellConfigCommon->physCellId!=NULL,"cc->ServingCellConfigCommon->physCellId is null\n"); AssertFatal(cc->ServingCellConfigCommon->physCellId!=NULL,"cc->ServingCellConfigCommon->physCellId is null\n");
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.PhysCellId = *cc->ServingCellConfigCommon->physCellId; dl_config_pdu->ssb_pdu.ssb_pdu_rel15.PhysCellId = *cc->ServingCellConfigCommon->physCellId;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.BetaPss = 0; dl_config_pdu->ssb_pdu.ssb_pdu_rel15.BetaPss = 0;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = 0; dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = ssb_index ;//SSB index for each SSB
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon!=NULL,"scc->downlinkConfigCommonL is null\n"); AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon!=NULL,"scc->downlinkConfigCommonL is null\n");
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL is null\n"); AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL is null\n");
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB is null\n"); AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB is null\n");
...@@ -132,13 +142,16 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ ...@@ -132,13 +142,16 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
default: default:
AssertFatal(1==0,"SCS %ld not allowed for SSB \n", *cc->ServingCellConfigCommon->ssbSubcarrierSpacing); AssertFatal(1==0,"SCS %ld not allowed for SSB \n", *cc->ServingCellConfigCommon->ssbSubcarrierSpacing);
} }
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset = 0; //kSSB dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset = cfg->ssb_table.ssb_subcarrier_offset.value; //kSSB
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA = ssb_offset0/(ratio*12) - 10; // absoluteFrequencySSB is the center of SSB dl_config_pdu->ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA = /*cfg->ssb_table.ssb_offset_point_a.value;*/ssb_offset0/(ratio*12) - 10; // absoluteFrequencySSB is the center of SSB
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag = 1; dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag = 1;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1); dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1);
dl_req->nPDUs++; dl_req->nPDUs++;
}
} }
}
} }
}
} }
...@@ -317,4 +317,13 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -317,4 +317,13 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
const uint16_t sdu_lenP, const uint16_t sdu_lenP,
const uint16_t timing_advance, const uint8_t ul_cqi); const uint16_t timing_advance, const uint8_t ul_cqi);
int16_t ssb_index_from_prach(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
uint16_t preamble_index,
uint8_t freq_index,
uint8_t symbol);
void find_SSB_and_RO_available(module_id_t module_idP);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/ #endif /*__LAYER2_NR_MAC_PROTO_H__*/
...@@ -141,6 +141,8 @@ typedef struct { ...@@ -141,6 +141,8 @@ typedef struct {
int msg4_mcs; int msg4_mcs;
/// RA search space /// RA search space
NR_SearchSpace_t *ra_ss; NR_SearchSpace_t *ra_ss;
// SSB id
uint8_t ssb_id;
} NR_RA_t; } NR_RA_t;
/*! \brief gNB common channels */ /*! \brief gNB common channels */
...@@ -177,6 +179,10 @@ typedef struct { ...@@ -177,6 +179,10 @@ typedef struct {
uint8_t vrb_map_UL[100]; uint8_t vrb_map_UL[100];
/// number of subframe allocation pattern available for MBSFN sync area /// number of subframe allocation pattern available for MBSFN sync area
uint8_t num_sf_allocation_pattern; uint8_t num_sf_allocation_pattern;
///Number of active SSBs
uint8_t num_active_ssb;
//Total available prach occasions
uint32_t total_prach_occasions;
} NR_COMMON_channels_t; } NR_COMMON_channels_t;
...@@ -295,8 +301,23 @@ typedef struct { ...@@ -295,8 +301,23 @@ typedef struct {
rnti_t tc_rnti[MAX_MOBILES_PER_GNB]; rnti_t tc_rnti[MAX_MOBILES_PER_GNB];
NR_preamble_ue preambles[MAX_MOBILES_PER_GNB]; NR_preamble_ue preambles[MAX_MOBILES_PER_GNB];
NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB]; NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB];
uint8_t UE_ssb_index[MAX_MOBILES_PER_GNB];
} NR_UE_list_t; } NR_UE_list_t;
typedef struct {
rnti_t rnti;
rnti_t tc_rnti;
boolean_t active;
} NR_SSB_UE_list_t;
#define MAX_NUM_OF_SSB 64
typedef struct {
uint8_t ssb_index;
int num_UEs;
NR_SSB_UE_list_t SSB_UE_list[MAX_MOBILES_PER_GNB];
} NR_SSB_list_t;
/*! \brief top level eNB MAC structure */ /*! \brief top level eNB MAC structure */
typedef struct gNB_MAC_INST_s { typedef struct gNB_MAC_INST_s {
/// Ethernet parameters for northbound midhaul interface /// Ethernet parameters for northbound midhaul interface
...@@ -335,6 +356,7 @@ typedef struct gNB_MAC_INST_s { ...@@ -335,6 +356,7 @@ typedef struct gNB_MAC_INST_s {
NR_UE_list_t UE_list; NR_UE_list_t UE_list;
NR_SSB_list_t SSB_list[MAX_NUM_OF_SSB];
/// UL handle /// UL handle
uint32_t ul_handle; uint32_t ul_handle;
......
...@@ -56,23 +56,21 @@ extern uint16_t sl_ahead; ...@@ -56,23 +56,21 @@ extern uint16_t sl_ahead;
void handle_nr_rach(NR_UL_IND_t *UL_info) { void handle_nr_rach(NR_UL_IND_t *UL_info) {
if (UL_info->rach_ind.number_of_pdus>0) { if (UL_info->rach_ind.number_of_pdus>0) {
AssertFatal(UL_info->rach_ind.number_of_pdus==1,"More than 1 RACH pdu not supported\n");
UL_info->rach_ind.number_of_pdus=0;
LOG_D(MAC,"UL_info[Frame %d, Slot %d] Calling initiate_ra_proc RACH:SFN/SLOT:%d/%d\n",UL_info->frame,UL_info->slot, UL_info->rach_ind.sfn,UL_info->rach_ind.slot); LOG_D(MAC,"UL_info[Frame %d, Slot %d] Calling initiate_ra_proc RACH:SFN/SLOT:%d/%d\n",UL_info->frame,UL_info->slot, UL_info->rach_ind.sfn,UL_info->rach_ind.slot);
for(int i = 0; i < UL_info->rach_ind.number_of_pdus; i++) {
if (UL_info->rach_ind.pdu_list[0].num_preamble>0) if (UL_info->rach_ind.pdu_list[i].num_preamble>0)
AssertFatal(UL_info->rach_ind.pdu_list[0].num_preamble==1, AssertFatal(UL_info->rach_ind.pdu_list[i].num_preamble==1,
"More than 1 preamble not supported\n"); "More than 1 preamble not supported\n");
nr_initiate_ra_proc(UL_info->module_id, nr_initiate_ra_proc(UL_info->module_id,
UL_info->CC_id, UL_info->CC_id,
UL_info->rach_ind.sfn, UL_info->rach_ind.sfn,
UL_info->rach_ind.slot, UL_info->rach_ind.slot,
UL_info->rach_ind.pdu_list[0].preamble_list[0].preamble_index, UL_info->rach_ind.pdu_list[i].preamble_list[0].preamble_index,
UL_info->rach_ind.pdu_list[0].freq_index, UL_info->rach_ind.pdu_list[i].freq_index,
UL_info->rach_ind.pdu_list[0].symbol_index, UL_info->rach_ind.pdu_list[i].symbol_index,
UL_info->rach_ind.pdu_list[0].preamble_list[0].timing_advance); UL_info->rach_ind.pdu_list[i].preamble_list[0].timing_advance);
}
} }
} }
......
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