Skip to content

O
OpenXG-RAN
Commit b232be94 authored by Raymond Knopp's avatar Raymond Knopp
Browse files
Options

dlsim/ulsim updated to generate configuration without need for external pre-generated file.

parent a3f9a720
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 275 additions and 171 deletions
cmake_targets/autotests/test_case_list.xml
View file @ b232be94
......@@ -1097,18 +1097,18 @@
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_dlsim.Rel15</main_exec>
<main_exec_args>-n100 -R106 -b106 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R217 -b217 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R273 -b273 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R106 -o12 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R217 -o48 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R106 -a25 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R106 -a51 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R217 -b100 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R217 -a80 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -R217 -a110 -s5 -b100 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -e28 -s20 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -e16 -s10 -s5 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
<main_exec_args>-n100 -R106 -b106 -s5
-n100 -R217 -b217 -s5
-n100 -R273 -b273 -s5
-n100 -R106 -o12 -s5
-n100 -R217 -o48 -s5
-n100 -R106 -a25 -s5
-n100 -R106 -a51 -s5
-n100 -R217 -b100 -s5
-n100 -R217 -a80 -s5
-n100 -R217 -a110 -s5 -b100
-n100 -e287 -s20
-n100 -e16 -s10
</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12</tags>
<search_expr_true>PDSCH test OK</search_expr_true>
......@@ -1252,11 +1252,11 @@
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_ulsim.Rel15</main_exec>
<main_exec_args>-n100 -m9 -r106 -s0 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -m16 -s10 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -m28 -s20 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -m9 -R217 -r217 -s0 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw
-n100 -m9 -R273 -r273 -s0 -f $OPENAIR_DIR/ci-scripts/rrc-files/reconfig.raw</main_exec_args>
<main_exec_args>-n100 -m9 -r106 -s0
-n100 -m16 -s10
-n100 -m28 -s20
-n100 -m9 -R217 -r217 -s0
-n100 -m9 -R273 -r273 -s0
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......
common/utils/nr/nr_common.c
View file @ b232be94
......@@ -37,7 +37,8 @@ int NRRIV2BW(int locationAndBandwidth,int N_RB) {
int tmp = locationAndBandwidth/N_RB;
int tmp2 = locationAndBandwidth%N_RB;
if (tmp <= ((N_RB>>1)-tmp2+1)) return(tmp+1);
if (tmp <= ((N_RB>>1)+1) && (tmp+tmp2)<N_RB) return(tmp+1);
else return(N_RB+1-tmp);
}
......@@ -45,13 +46,15 @@ int NRRIV2BW(int locationAndBandwidth,int N_RB) {
int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB) {
int tmp = locationAndBandwidth/N_RB;
int tmp2 = locationAndBandwidth%N_RB;
if (tmp <= ((N_RB>>1)-tmp2+1)) return(tmp2);
if (tmp <= ((N_RB>>1)+1) && (tmp+tmp2)<N_RB) return(tmp2);
else return(N_RB-1-tmp2);
}
int PRBalloc_to_locationandbandwidth0(int NPRB,int RBstart,int BWPsize) {
AssertFatal(NPRB>0 && (NPRB + RBstart <= BWPsize),"Illegal NPRB/RBstart Configuration (%d,%d)\n",NPRB,RBstart);
AssertFatal(NPRB>0 && (NPRB + RBstart <= BWPsize),"Illegal NPRB/RBstart Configuration (%d,%d) for BWPsize %d\n",NPRB,RBstart,BWPsize);
if (NPRB <= 1+(BWPsize>>1)) return(BWPsize*(NPRB-1)+RBstart);
else return(BWPsize*(BWPsize+1-NPRB) + (BWPsize-1-RBstart));
}
......
openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
View file @ b232be94
......@@ -487,10 +487,10 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
macro_segment = 8*macro_num;
// macro_segment_end = (n_segments > 8*(macro_num+1)) ? 8*(macro_num+1) : n_segments;
macro_segment_end = macro_segment + (n_segments > 8 ? 8 : n_segments);
///printf("macro_segment: %d\n", macro_segment);
///printf("macro_segment_end: %d\n", macro_segment_end );
macro_segment_end = (n_segments > 8*(macro_num+1)) ? 8*(macro_num+1) : n_segments;
//macro_segment_end = macro_segment + (n_segments > 8 ? 8 : n_segments);
//printf("macro_segment: %d\n", macro_segment);
//printf("macro_segment_end: %d\n", macro_segment_end );
#ifdef __AVX2__
__m256i shufmask = _mm256_set_epi64x(0x0303030303030303, 0x0202020202020202,0x0101010101010101, 0x0000000000000000);
......@@ -564,7 +564,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
for (i=0; i<block_length>>5; i++) {
c256 = _mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[macro_segment])[i]), shufmask),andmask),zero256),masks[0]);
//for (j=1; j<n_segments; j++) {
for (j=macro_segment+1; j < macro_segment_end; j++) {
for (j=macro_segment+1; j < macro_segment_end; j++) {
c256 = _mm256_or_si256(_mm256_and_si256(_mm256_cmpeq_epi8(_mm256_andnot_si256(_mm256_shuffle_epi8(_mm256_set1_epi32(((uint32_t*)test_input[j])[i]), shufmask),andmask),zero256),masks[j-macro_segment]),c256);
}
((__m256i *)c)[i] = c256;
......
openair1/PHY/NR_TRANSPORT/nr_tbs_tools.c
View file @ b232be94
......@@ -46,7 +46,7 @@ uint32_t nr_get_E(uint32_t G, uint8_t C, uint8_t Qm, uint8_t Nl, uint8_t r) {
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
LOG_D(PHY,"nr_get_E : (G %d, C %d, Qm %d, Nl %d, r %d)\n",G, C, Qm, Nl, r);
if (r <= Cprime - ((G/(Nl*Qm))%Cprime) - 1)
E = Nl*Qm*(G/(Nl*Qm*Cprime));
else
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @ b232be94
......@@ -456,9 +456,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
start_meas(dlsch_rate_unmatching_stats);
#endif
#ifdef DEBUG_DLSCH_DECODING
LOG_D(PHY,"HARQ_PID %d Rate Matching Segment %d (coded bits %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d, rv %d, round %d)...\n",
harq_pid,r, G,
LOG_D(PHY,"HARQ_PID %d Rate Matching Segment %d (coded bits %d,E %d, F %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d, rv %d, round %d)...\n",
harq_pid,r, G,E,harq_process->F,
Kr*3,
harq_process->TBS,
harq_process->Qm,
......@@ -466,7 +465,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->Nl,
harq_process->rvidx,
harq_process->round);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_RATE_MATCHING, VCD_FUNCTION_IN);
......@@ -673,7 +672,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return((1 + dlsch->max_ldpc_iterations));
} else {
//#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
//#endif
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
View file @ b232be94
......@@ -375,24 +375,24 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
len = (pilots==1)? (nb_rb*6):(nb_rb*12);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
#endif
n_tx = frame_parms->nb_antenna_ports_gNB;
n_rx = frame_parms->nb_antennas_rx;
nr_dlsch_scale_channel(pdsch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
dlsch,
......@@ -416,11 +416,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
if (beamforming_mode==0){
if (dlsch0_harq->mimo_mode<NR_DUALSTREAM) {
nr_dlsch_channel_level(pdsch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
avg,
symbol,
len,
nb_rb);
frame_parms,
avg,
symbol,
len,
nb_rb);
avgs = 0;
for (aatx=0;aatx<frame_parms->nb_antenna_ports_gNB;aatx++)
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++)
......@@ -449,14 +449,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
}
#ifdef UE_DEBUG_TRACE
LOG_I(PHY,"[DLSCH] AbsSubframe %d.%d log2_maxh = %d [log2_maxh0 %d log2_maxh1 %d] (%d,%d)\n",
frame%1024,nr_tti_rx, pdsch_vars[eNB_id]->log2_maxh,
pdsch_vars[eNB_id]->log2_maxh0,
pdsch_vars[eNB_id]->log2_maxh1,
avg[0],avgs);
//#ifdef UE_DEBUG_TRACE
LOG_D(PHY,"[DLSCH] AbsSubframe %d.%d log2_maxh = %d [log2_maxh0 %d log2_maxh1 %d] (%d,%d)\n",
frame%1024,nr_tti_rx, pdsch_vars[eNB_id]->log2_maxh,
pdsch_vars[eNB_id]->log2_maxh0,
pdsch_vars[eNB_id]->log2_maxh1,
avg[0],avgs);
//LOG_D(PHY,"[DLSCH] mimo_mode = %d\n", dlsch0_harq->mimo_mode);
#endif
//#endif
//wait until pdcch is decoded
//proc->channel_level = 1;
......@@ -1849,11 +1849,11 @@ void nr_dlsch_scale_channel(int **dl_ch_estimates_ext,
//compute average channel_level on each (TX,RX) antenna pair
void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
uint8_t symbol,
uint32_t len,
unsigned short nb_rb)
NR_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
uint8_t symbol,
uint32_t len,
unsigned short nb_rb)
{
#if defined(__x86_64__)||defined(__i386__)
......@@ -1864,8 +1864,9 @@ void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
//nb_rb*nre = y * 2^x
int16_t x = factor2(len);
//x = (x>4) ? 4 : x;
int16_t y = (len)>>x;
//printf("nb_rb*nre = %d = %d * 2^(%d)\n",nb_rb*nre,y,x);
//printf("len = %d = %d * 2^(%d)\n",len,y,x);
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
......@@ -1876,29 +1877,10 @@ void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*nb_rb*12];
for (rb=0;rb<nb_rb;rb++) {
// printf("rb %d : ",rb);
// print_shorts("ch",&dl_ch128[0]);
avg128D = _mm_add_epi32(avg128D,_mm_srai_epi16(_mm_madd_epi16(dl_ch128[0],dl_ch128[0]),x));
avg128D = _mm_add_epi32(avg128D,_mm_srai_epi16(_mm_madd_epi16(dl_ch128[1],dl_ch128[1]),x));
//avg128D = _mm_add_epi32(avg128D,_mm_madd_epi16(dl_ch128[0],_mm_srai_epi16(_mm_mulhi_epi16(dl_ch128[0], coeff128),15)));
//avg128D = _mm_add_epi32(avg128D,_mm_madd_epi16(dl_ch128[1],_mm_srai_epi16(_mm_mulhi_epi16(dl_ch128[1], coeff128),15)));
/*if (((symbol_mod == 0) || (symbol_mod == (frame_parms->Ncp-1)))&&(frame_parms->nb_antenna_ports_gNB!=1)) {
dl_ch128+=2;
}
else {*/
avg128D = _mm_add_epi32(avg128D,_mm_srai_epi16(_mm_madd_epi16(dl_ch128[2],dl_ch128[2]),x));
//avg128D = _mm_add_epi32(avg128D,_mm_madd_epi16(dl_ch128[2],_mm_srai_epi16(_mm_mulhi_epi16(dl_ch128[2], coeff128),15)));
dl_ch128+=3;
// }
/*
if (rb==0) {
print_shorts("dl_ch128",&dl_ch128[0]);
print_shorts("dl_ch128",&dl_ch128[1]);
print_shorts("dl_ch128",&dl_ch128[2]);
}
*/
avg128D = _mm_add_epi32(avg128D,_mm_srai_epi16(_mm_madd_epi16(dl_ch128[2],dl_ch128[2]),x));
dl_ch128+=3;
}
avg[(aatx<<1)+aarx] =(((int32_t*)&avg128D)[0] +
......
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ b232be94
......@@ -142,6 +142,7 @@ int generate_dlsch_header(unsigned char *mac_header,
unsigned char short_padding,
unsigned short post_padding){return 0;}
void nr_ip_over_LTE_DRB_preconfiguration(void){}
void mac_rlc_data_ind (
const module_id_t module_idP,
const rnti_t rntiP,
......@@ -160,6 +161,8 @@ void mac_rlc_data_ind (
openair0_config_t openair0_cfg[MAX_CARDS];
int main(int argc, char **argv)
{
char c;
......@@ -474,6 +477,7 @@ int main(int argc, char **argv)
gNB_RRC_INST rrc;
memset((void*)&rrc,0,sizeof(rrc));
/*
// read in SCGroupConfig
AssertFatal(scg_fd != NULL,"no reconfig.raw file\n");
char buffer[1024];
......@@ -511,15 +515,28 @@ int main(int argc, char **argv)
SEQUENCE_free( &asn_DEF_NR_CellGroupConfig, secondaryCellGroup, 1 );
exit(-1);
}
NR_ServingCellConfigCommon_t *scc = secondaryCellGroup->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
NR_ServingCellConfigCommon_t *scc = secondaryCellGroup->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
*/
rrc.carrier.servingcellconfigcommon = secondaryCellGroup->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
printf("%p,%p\n",
secondaryCellGroup->spCellConfig->reconfigurationWithSync->spCellConfigCommon,
rrc.carrier.servingcellconfigcommon);
rrc.carrier.servingcellconfigcommon = calloc(1,sizeof(*rrc.carrier.servingcellconfigcommon));
NR_ServingCellConfigCommon_t *scc = rrc.carrier.servingcellconfigcommon;
NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup));
prepare_scc(rrc.carrier.servingcellconfigcommon);
uint64_t ssb_bitmap;
fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
fill_default_secondaryCellGroup(scc,
secondaryCellGroup,
0,
1,
n_tx,
0);
fix_scc(scc,ssb_bitmap);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
AssertFatal((gNB->if_inst = NR_IF_Module_init(0))!=NULL,"Cannot register interface");
gNB->if_inst->NR_PHY_config_req = nr_phy_config_request;
......@@ -661,9 +678,9 @@ int main(int argc, char **argv)
gNB->ssb_pdu.ssb_pdu_rel15.bchPayload=0x001234;
if (mcsIndex_set==0) dlsch_config.mcsIndex[0]=9;
if (rbSize_set==0) dlsch_config.rbSize=N_RB_DL;
if (rbStart_set==0) dlsch_config.rbStart=0;
if (rbSize_set==0) dlsch_config.rbSize=N_RB_DL-dlsch_config.rbStart;
//Configure UE
rrc.carrier.MIB = (uint8_t*) malloc(4);
......
openair1/SIMULATION/NR_PHY/ulsim.c
View file @ b232be94
......@@ -413,53 +413,24 @@ int main(int argc, char **argv)
gNB_RRC_INST rrc;
memset((void*)&rrc,0,sizeof(rrc));
// read in SCGroupConfig
AssertFatal(scg_fd != NULL,"no reconfig.raw file\n");
char buffer[1024];
int msg_len=fread(buffer,1,1024,scg_fd);
NR_RRCReconfiguration_t *NR_RRCReconfiguration;
printf("Decoding NR_RRCReconfiguration (%d bytes)\n",msg_len);
asn_dec_rval_t dec_rval = uper_decode_complete( NULL,
&asn_DEF_NR_RRCReconfiguration,
(void **)&NR_RRCReconfiguration,
(uint8_t *)buffer,
msg_len);
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
AssertFatal(1==0,"NR_RRCReConfiguration decode error\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_RRCReconfiguration, NR_RRCReconfiguration, 1 );
exit(-1);
}
fclose(scg_fd);
AssertFatal(NR_RRCReconfiguration->criticalExtensions.present == NR_RRCReconfiguration__criticalExtensions_PR_rrcReconfiguration,"wrong NR_RRCReconfiguration->criticalExstions.present type\n");
NR_RRCReconfiguration_IEs_t *reconfig_ies = NR_RRCReconfiguration->criticalExtensions.choice.rrcReconfiguration;
NR_CellGroupConfig_t *secondaryCellGroup;
dec_rval = uper_decode_complete( NULL,
&asn_DEF_NR_CellGroupConfig,
(void **)&secondaryCellGroup,
(uint8_t *)reconfig_ies->secondaryCellGroup->buf,
reconfig_ies->secondaryCellGroup->size);
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
AssertFatal(1==0,"NR_CellGroupConfig decode error\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_CellGroupConfig, secondaryCellGroup, 1 );
exit(-1);
}
rrc.carrier.servingcellconfigcommon = calloc(1,sizeof(*rrc.carrier.servingcellconfigcommon));
NR_ServingCellConfigCommon_t *scc = rrc.carrier.servingcellconfigcommon;
NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup));
prepare_scc(rrc.carrier.servingcellconfigcommon);
uint64_t ssb_bitmap;
fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
fill_default_secondaryCellGroup(scc,
secondaryCellGroup,
0,
1,
n_tx,
0);
fix_scc(scc,ssb_bitmap);
NR_ServingCellConfigCommon_t *scc = secondaryCellGroup->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
rrc.carrier.servingcellconfigcommon = secondaryCellGroup->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
printf("%p,%p\n",
secondaryCellGroup->spCellConfig->reconfigurationWithSync->spCellConfigCommon,
rrc.carrier.servingcellconfigcommon);
AssertFatal((gNB->if_inst = NR_IF_Module_init(0))!=NULL,"Cannot register interface");
gNB->if_inst->NR_PHY_config_req = nr_phy_config_request;
// common configuration
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @ b232be94
......@@ -298,7 +298,7 @@ uint64_t from_nrarfcn(int nr_bandP,
AssertFatal(nr_bandP <= 261, "nr_band %d > 260\n", nr_bandP);
for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL[%d] %llu\n",dl_nrarfcn, nr_bandtable[i].band,(long long unsigned int)nr_bandtable[i].N_OFFs_DL);
// selection of correct Deltaf raster according to SCS
if ( (nr_bandtable[i].deltaf_raster != 100) && (nr_bandtable[i].deltaf_raster != scs_khz))
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ b232be94
......@@ -1685,7 +1685,6 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(fapi_nr_ul_config_pusch_pd
/*
* TS 38.214 subclause 5.1.2.2.2 Downlink resource allocation type 1
*/
dlsch_config_pdu->number_rbs = NRRIV2BW(riv,n_RB_DLBWP);
dlsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_DLBWP);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ b232be94
......@@ -573,34 +573,24 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos=fsize;
*dci_pdu |= ((dci_pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment,fsize,N_RB,dci_size-pos,*dci_pdu);
#endif
// Time domain assignment
pos+=4;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment&0xf) << (dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"time-domain assignment %d (3 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment,dci_size-pos,*dci_pdu);
#endif
// VRB to PRB mapping
pos++;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_size-pos);
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping,dci_size-pos,*dci_pdu);
#endif
// MCS
pos+=5;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu);
#endif
// TB scaling
pos+=2;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling&0x3)<<(dci_size-pos);
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu);
#endif
break;
case NR_RNTI_C:
......@@ -608,18 +598,14 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
// indicating a DL DCI format 1bit
pos++;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&1)<<(dci_size-pos);
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
#endif
// Freq domain assignment (275rb >> fsize = 16)
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos+=fsize;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment,fsize,dci_size-pos,*dci_pdu);
#endif
uint16_t is_ra = 1;
for (int i=0; i<fsize; i++)
......@@ -653,72 +639,52 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
pos+=4;
*dci_pdu |= ((dci_pdu_rel15->time_domain_assignment&0xf) << (dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment,4,dci_size-pos,*dci_pdu);
#endif
// VRB to PRB mapping 1bit
pos++;
*dci_pdu |= (dci_pdu_rel15->vrb_to_prb_mapping&1)<<(dci_size-pos);
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping,1,dci_size-pos,*dci_pdu);
#endif
// MCS 5bit //bit over 32, so dci_pdu ++
pos+=5;
*dci_pdu |= (dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu);
#endif
// New data indicator 1bit
pos++;
*dci_pdu |= (dci_pdu_rel15->ndi&1)<<(dci_size-pos);
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
#endif
// Redundancy version 2bit
pos+=2;
*dci_pdu |= (dci_pdu_rel15->rv&0x3)<<(dci_size-pos);
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
#endif
// HARQ process number 4bit
pos+=4;
*dci_pdu |= ((dci_pdu_rel15->harq_pid&0xf)<<(dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
#endif
// Downlink assignment index 2bit
pos+=2;
*dci_pdu |= ((dci_pdu_rel15->dai&3)<<(dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai,2,dci_size-pos,*dci_pdu);
#endif
// TPC command for scheduled PUCCH 2bit
pos+=2;
*dci_pdu |= ((dci_pdu_rel15->tpc&3)<<(dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
#endif
// PUCCH resource indicator 3bit
pos+=3;
*dci_pdu |= ((dci_pdu_rel15->pucch_resource_indicator&0x7)<<(dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
#endif
// PDSCH-to-HARQ_feedback timing indicator 3bit
pos+=3;
*dci_pdu |= ((dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_size-pos));
#ifdef DEBUG_FILL_DCI
LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator,3,dci_size-pos,*dci_pdu);
#endif
} //end else
break;
......@@ -1363,4 +1329,4 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
}
}
}
*/
\ No newline at end of file
*/
openair2/RRC/NR/nr_rrc_proto.h
View file @ b232be94
......@@ -70,7 +70,6 @@ void rrc_parse_ue_capabilities(gNB_RRC_INST *rrc,LTE_UE_CapabilityRAT_ContainerL
void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_p);
void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_RRCReconfiguration_IEs_t *reconfig,
NR_CellGroupConfig_t *secondaryCellGroup,
int scg_id,
int servCellIndex,
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment