updated pdcch configs for runel test

openair1/PHY/NR_UE_TRANSPORT/dci_nr.c

@@ -2663,6 +2663,12 @@ uint8_t nr_dci_decoding_procedure(int s,
   }
 
   coreset_nbr_rb = 6 * coreset_nbr_rb;
+
+#ifdef NR_PDCCH_DCI_DEBUG
+  printf("PDCCH_DMRS_Scrambling_ID %d coreset_nbr_rb %d coreset_freq_dom %lx coreset_time_dur %d\n",
+    pdcch_DMRS_scrambling_id,coreset_nbr_rb,coreset_freq_dom,coreset_time_dur);
+#endif
+
   // coreset_time_dur,coreset_nbr_rb,
   NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
   //uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);

openair1/SCHED_NR_UE/phy_procedures_nr_ue.c

@@ -2834,7 +2834,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
   // Higher layers have updated the number of searchSpaces with are active in the current slot and this value is stored in variable nb_searchspace_total
   int nb_searchspace_total = pdcch_vars2->nb_search_space;
 
-  pdcch_vars[eNB_id]->crnti = 0x1234; //to be check how to set when using loop memory
+  pdcch_vars[eNB_id]->crnti = 1000; //to be check how to set when using loop memory
 
   uint16_t c_rnti=pdcch_vars[eNB_id]->crnti;
   uint16_t cs_rnti=0,new_rnti=0,tc_rnti=0;

openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c

@@ -420,13 +420,19 @@ int8_t nr_ue_decode_mib(
 
         //mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
         //mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
+        //changed for runel test
+        num_rbs = 24;
+        num_symbols = 1;
+        rb_offset = 120;
         uint64_t mask = 0x0;
         uint8_t i;
         for(i=0; i<(num_rbs/6); ++i){   //  38.331 Each bit corresponds a group of 6 RBs
             mask = mask >> 1;
             mask = mask | 0x100000000000;
         }
-        //LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
+        uint16_t UE_rb_offset_count = rb_offset/6;
+        mask = mask >> UE_rb_offset_count;
+        LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
         mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
         mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset;  //  additional parameter other than coreset
 

openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c

@@ -315,13 +315,15 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
   
   uint64_t mask = 0x0;
   uint16_t num_rbs=24;
-  uint16_t rb_offset=0;
-  uint16_t cell_id=0;
-  uint16_t num_symbols=2;
+  uint16_t rb_offset=120;
+  uint16_t cell_id=47;
+  uint16_t num_symbols=1;
   for(int i=0; i<(num_rbs/6); ++i){   //  38.331 Each bit corresponds a group of 6 RBs
     mask = mask >> 1;
     mask = mask | 0x100000000000;
   }
+  uint16_t UE_rb_offset_count = rb_offset/6;
+  mask = mask >> UE_rb_offset_count;
   dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.frequency_domain_resource = mask;
   dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset;  //  additional parameter other than coreset