Commit c48f074a authored by Raymond Knopp's avatar Raymond Knopp

changes in BSR handling in eNodeB. UL throughput on 5 MHz is 8 Mbit/s (mcs 19,...

changes in BSR handling in eNodeB. UL throughput on 5 MHz is 8 Mbit/s (mcs 19, 20 PRB). MCS 20 is not working for an unknown reason.
parent cd8ccd80
......@@ -346,6 +346,8 @@ static inline int abs32(int x)
int debug_cnt=0;
#endif
#define SHIFT 17
int lte_sync_time(int **rxdata, ///rx data in time domain
LTE_DL_FRAME_PARMS *frame_parms,
int *eNB_id)
......@@ -414,8 +416,8 @@ int lte_sync_time(int **rxdata, ///rx data in time domain
//calculate dot product of primary_synch0_time and rxdata[ar][n] (ar=0..nb_ant_rx) and store the sum in temp[n];
for (ar=0; ar<frame_parms->nb_antennas_rx; ar++) {
result = dot_product((short*)primary_synch0_time, (short*) &(rxdata[ar][n]), frame_parms->ofdm_symbol_size, 15);
result2 = dot_product((short*)primary_synch0_time, (short*) &(rxdata[ar][n+length]), frame_parms->ofdm_symbol_size, 15);
result = dot_product((short*)primary_synch0_time, (short*) &(rxdata[ar][n]), frame_parms->ofdm_symbol_size, SHIFT);
result2 = dot_product((short*)primary_synch0_time, (short*) &(rxdata[ar][n+length]), frame_parms->ofdm_symbol_size, SHIFT);
((short*)sync_corr_ue0)[2*n] += ((short*) &result)[0];
((short*)sync_corr_ue0)[2*n+1] += ((short*) &result)[1];
......@@ -428,8 +430,8 @@ int lte_sync_time(int **rxdata, ///rx data in time domain
}
for (ar=0; ar<frame_parms->nb_antennas_rx; ar++) {
result = dot_product((short*)primary_synch1_time, (short*) &(rxdata[ar][n]), frame_parms->ofdm_symbol_size, 15);
result2 = dot_product((short*)primary_synch1_time, (short*) &(rxdata[ar][n+length]), frame_parms->ofdm_symbol_size, 15);
result = dot_product((short*)primary_synch1_time, (short*) &(rxdata[ar][n]), frame_parms->ofdm_symbol_size, SHIFT);
result2 = dot_product((short*)primary_synch1_time, (short*) &(rxdata[ar][n+length]), frame_parms->ofdm_symbol_size, SHIFT);
((short*)sync_corr_ue1)[2*n] += ((short*) &result)[0];
((short*)sync_corr_ue1)[2*n+1] += ((short*) &result)[1];
((short*)sync_corr_ue1)[2*(length+n)] += ((short*) &result2)[0];
......@@ -443,8 +445,8 @@ int lte_sync_time(int **rxdata, ///rx data in time domain
for (ar=0; ar<frame_parms->nb_antennas_rx; ar++) {
result = dot_product((short*)primary_synch2_time, (short*) &(rxdata[ar][n]), frame_parms->ofdm_symbol_size, 15);
result2 = dot_product((short*)primary_synch2_time, (short*) &(rxdata[ar][n+length]), frame_parms->ofdm_symbol_size, 15);
result = dot_product((short*)primary_synch2_time, (short*) &(rxdata[ar][n]), frame_parms->ofdm_symbol_size, SHIFT);
result2 = dot_product((short*)primary_synch2_time, (short*) &(rxdata[ar][n+length]), frame_parms->ofdm_symbol_size, SHIFT);
((short*)sync_corr_ue2)[2*n] += ((short*) &result)[0];
((short*)sync_corr_ue2)[2*n+1] += ((short*) &result)[1];
((short*)sync_corr_ue2)[2*(length+n)] += ((short*) &result2)[0];
......@@ -561,7 +563,7 @@ int lte_sync_time_eNB(int32_t **rxdata, ///rx data in time domain
//calculate dot product of primary_synch0_time and rxdata[ar][n] (ar=0..nb_ant_rx) and store the sum in temp[n];
for (ar=0; ar<frame_parms->nb_antennas_rx; ar++) {
result = dot_product((short*)primary_synch_time, (short*) &(rxdata[ar][n]), frame_parms->ofdm_symbol_size, 15);
result = dot_product((short*)primary_synch_time, (short*) &(rxdata[ar][n]), frame_parms->ofdm_symbol_size, SHIFT);
//((short*)sync_corr)[2*n] += ((short*) &result)[0];
//((short*)sync_corr)[2*n+1] += ((short*) &result)[1];
sync_corr_eNB[n] += abs32(result);
......
......@@ -390,7 +390,11 @@ typedef struct PHY_VARS_eNB_s {
int32_t pucch1_stats_thres[NUMBER_OF_UE_MAX][10*1024];
int32_t pucch1ab_stats_cnt[NUMBER_OF_UE_MAX][10];
int32_t pucch1ab_stats[NUMBER_OF_UE_MAX][2*10*1024];
int32_t pusch_stats_rb[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_round[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_mcs[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_bsr[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_BO[NUMBER_OF_UE_MAX][10240];
#if ENABLE_RAL
hash_table_t *ral_thresholds_timed;
SLIST_HEAD(ral_thresholds_gen_poll_enb_s, ral_threshold_phy_t) ral_thresholds_gen_polled[RAL_LINK_PARAM_GEN_MAX];
......
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......@@ -654,9 +654,12 @@ typedef struct {
// Logical channel info for link with RLC
/// UE BSR info for each logical channel group id
/// Last received UE BSR info for each logical channel group id
uint8_t bsr_info[MAX_NUM_LCGID];
/// LCGID mapping
long lcgidmap[11];
/// phr information
int8_t phr_info;
......@@ -743,6 +746,7 @@ typedef struct {
int32_t ul_failure_timer;
int32_t ra_pdcch_order_sent;
int32_t ul_out_of_sync;
int32_t phr_received;
} UE_sched_ctrl;
/*! \brief eNB template for the Random access information */
typedef struct {
......
......@@ -692,7 +692,7 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
UE_TEMPLATE *UE_template = &eNB_mac_inst[module_idP].UE_list.UE_template[CC_id][UE_id];
UE_sched_ctrl *UE_sched_ctl = &eNB_mac_inst[module_idP].UE_list.UE_sched_ctrl[UE_id];
LOG_D(MAC,"[eNB %d][PUSCH] Checking UL requirements UE %d/%x\n",module_idP,UE_id,UE_RNTI(module_idP,UE_id));
// do not schedule UE if UL is not working
if (UE_sched_ctl->ul_failure_timer>0)
......@@ -700,6 +700,8 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
if (UE_sched_ctl->ul_out_of_sync>0)
return(0);
LOG_D(MAC,"[eNB %d][PUSCH] Checking UL requirements UE %d/%x\n",module_idP,UE_id,UE_RNTI(module_idP,UE_id));
if ((UE_template->bsr_info[LCGID0]>0) ||
(UE_template->bsr_info[LCGID1]>0) ||
(UE_template->bsr_info[LCGID2]>0) ||
......@@ -707,6 +709,7 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
(UE_template->ul_SR>0) ||
(UE_sched_ctl->ul_inactivity_timer>100)) { // uplink scheduling request
LOG_D(MAC,"[eNB %d][PUSCH] UE %d/%x should be scheduled\n",module_idP,UE_id,UE_RNTI(module_idP,UE_id));
return(1);
} else {
return(0);
......
This diff is collapsed.
......@@ -939,7 +939,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
// LOG_I(MAC,"store ulsch buffers\n");
// convert BSR to bytes for comparison with tbs
store_ulsch_buffer(module_idP,frameP, subframeP);
// store_ulsch_buffer(module_idP,frameP, subframeP);
//LOG_I(MAC,"assign max mcs min rb\n");
// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
......@@ -1097,7 +1097,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
}
/*
void store_ulsch_buffer(module_id_t module_idP, int frameP, sub_frame_t subframeP)
{
......@@ -1108,6 +1108,9 @@ void store_ulsch_buffer(module_id_t module_idP, int frameP, sub_frame_t subframe
for (UE_id=UE_list->head_ul; UE_id>=0; UE_id=UE_list->next_ul[UE_id]) {
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
UE_template = &UE_list->UE_template[UE_PCCID(module_idP,UE_id)][UE_id];
//LOG_I(MAC,"[UE %d next %d] SR is %d\n",UE_id, UE_list->next_ul[UE_id], UE_template->ul_SR);
......@@ -1138,7 +1141,7 @@ void store_ulsch_buffer(module_id_t module_idP, int frameP, sub_frame_t subframe
}
}
}
*/
void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subframeP, uint16_t *first_rb)
......@@ -1148,7 +1151,7 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
uint16_t n,UE_id;
uint8_t CC_id;
rnti_t rnti = -1;
int mcs=cmin(16,openair_daq_vars.target_ue_ul_mcs);
int mcs;
int rb_table_index=0,tbs,tx_power;
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
UE_list_t *UE_list = &eNB->UE_list;
......@@ -1156,6 +1159,7 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
UE_TEMPLATE *UE_template;
LTE_DL_FRAME_PARMS *frame_parms;
for (i=UE_list->head_ul; i>=0; i=UE_list->next_ul[i]) {
rnti = UE_RNTI(module_idP,i);
......@@ -1165,6 +1169,11 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
continue;
if (UE_list->UE_sched_ctrl[i].phr_received == 1)
mcs = 20; // if we've received the power headroom information the UE, we can go to maximum mcs
else
mcs = 10; // otherwise, limit to QPSK PUSCH
UE_id = i;
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
......
......@@ -375,7 +375,7 @@ static void _gen_emm_data(emm_nvdata_t* data)
data->imsi.u.num.digit12 = 1;
data->imsi.u.num.digit13 = 1;
data->imsi.u.num.digit14 = 1;
data->imsi.u.num.digit15 = 0;
data->imsi.u.num.digit15 = 1;
data->rplmn.MCCdigit1 = 2;
data->rplmn.MCCdigit2 = 0;
......
......@@ -185,7 +185,7 @@ int main (int argc, const char* argv[])
usim_data.imsi.u.num.digit15 = 0b1111;
#endif
#if (SELECTED_PLMN == OAI_LTEBOX)
#warning "IMSI 208.93.00001110"
#warning "IMSI 208.93.00001111"
/*
* International Mobile Subscriber Identity
* IMSI = MCC + MNC + MSIN = 208 (France) + 10 (SFR) + 00001234
......@@ -207,7 +207,7 @@ int main (int argc, const char* argv[])
usim_data.imsi.u.num.digit12 = 1;
usim_data.imsi.u.num.digit13 = 1;
usim_data.imsi.u.num.digit14 = 1;
usim_data.imsi.u.num.digit15 = 0;
usim_data.imsi.u.num.digit15 = 1;
#endif
#if (SELECTED_PLMN == TEST1)
#warning "IMSI 001.01.000001234"
......
......@@ -281,13 +281,13 @@ int esm_ebr_context_create(
}
res = sprintf(command_line,
"ifconfig oip1 %s netmask %s broadcast %s up",
"ifconfig oip1 %s netmask %s broadcast %s",
ipv4_addr, netmask, broadcast);
// AssertFatal((res > 0) && (res < 128),
// "error in system command line");
LOG_TRACE(INFO, "ESM-PROC - executing %s ",
command_line);
system(command_line);
//system(command_line);
break;
case NET_PDN_TYPE_IPV6:
......
......@@ -313,6 +313,7 @@ int trx_usrp_set_freq(openair0_device* device, openair0_config_t *openair0_cfg,
usrp_state_t *s = (usrp_state_t*)device->priv;
printf("Setting USRP TX Freq %f, RX Freq %f\n",openair0_cfg[0].tx_freq[0],openair0_cfg[0].rx_freq[0]);
s->usrp->set_tx_freq(openair0_cfg[0].tx_freq[0]);
s->usrp->set_rx_freq(openair0_cfg[0].rx_freq[0]);
......
......@@ -143,10 +143,10 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.212/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.215/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.212/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.215/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
......
......@@ -3499,6 +3499,11 @@ int main( int argc, char **argv )
#endif
write_output("pusch_rb.m","puschrb",PHY_vars_eNB_g[0][0]->pusch_stats_rb,10240,1,2);
write_output("pusch_mcs.m","puschmcs",PHY_vars_eNB_g[0][0]->pusch_stats_mcs,10240,1,2);
write_output("pusch_round.m","puschround",PHY_vars_eNB_g[0][0]->pusch_stats_round,10240,1,2);
write_output("pusch_bsr.m","puschbsr",PHY_vars_eNB_g[0][0]->pusch_stats_bsr,10240,1,2);
write_output("pusch_BO.m","puschBO",PHY_vars_eNB_g[0][0]->pusch_stats_BO,10240,1,2);
// stop threads
#ifdef XFORMS
printf("waiting for XFORMS thread\n");
......
......@@ -447,8 +447,8 @@ static void *UE_thread_synch(void *arg)
}
#ifndef EXMIMO
openair0.trx_set_freq_func(&openair0,&openair0_cfg[0],0);
openair0.trx_set_gains_func(&openair0,&openair0_cfg[0]);
openair0.trx_stop_func(0);
//openair0.trx_set_gains_func(&openair0,&openair0_cfg[0]);
//openair0.trx_stop_func(0);
#else
openair0_set_frequencies(&openair0,&openair0_cfg[0],0);
openair0_set_gains(&openair0,&openair0_cfg[0]);
......@@ -1229,7 +1229,7 @@ void *UE_thread(void *arg)
}
} else {
LOG_E( PHY, "[SCHED][UE] UE RX thread busy (IC %d)!!\n", instance_cnt_rx);
if (instance_cnt_rx > 1) {
if (instance_cnt_rx > 2) {
exit_fun("instance_cnt_rx > 1");
return &UE_thread_retval;
}
......@@ -1265,7 +1265,7 @@ void *UE_thread(void *arg)
} else {
LOG_E( PHY, "[SCHED][UE] UE TX thread busy (IC %d)!!\n" );
if (instance_cnt_tx>1) {
if (instance_cnt_tx>2) {
exit_fun("instance_cnt_tx > 1");
return &UE_thread_retval;
}
......
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