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canghaiwuhen
OpenXG-RAN
Commits
ccaf5220
Commit
ccaf5220
authored
Nov 27, 2019
by
Raymond Knopp
Browse files
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Plain Diff
gNB runs with rfsimulator.
parent
d4fe5b50
Changes
5
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5 changed files
with
135 additions
and
41 deletions
+135
-41
common/utils/nr/nr_common.c
common/utils/nr/nr_common.c
+1
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+39
-41
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+2
-0
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+4
-0
openair2/LAYER2/NR_MAC_gNB/nr_mac_common.c
openair2/LAYER2/NR_MAC_gNB/nr_mac_common.c
+89
-0
No files found.
common/utils/nr/nr_common.c
View file @
ccaf5220
...
@@ -144,4 +144,5 @@ void SLIV2SL(int SLIV,int *S,int *L) {
...
@@ -144,4 +144,5 @@ void SLIV2SL(int SLIV,int *S,int *L) {
*
L
=
15
-
SLIVdiv14
;
*
L
=
15
-
SLIVdiv14
;
*
S
=
13
-
SLIVmod14
;
*
S
=
13
-
SLIVmod14
;
}
}
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
ccaf5220
...
@@ -329,33 +329,25 @@ int configure_fapi_dl_Tx(int Mod_idP,
...
@@ -329,33 +329,25 @@ int configure_fapi_dl_Tx(int Mod_idP,
dlsch_pdu_rel15
->
VRBtoPRBMapping
=
1
;
// non-interleaved, check if this is ok for initialBWP
dlsch_pdu_rel15
->
VRBtoPRBMapping
=
1
;
// non-interleaved, check if this is ok for initialBWP
// choose shortest PDSCH
// choose shortest PDSCH
int
startSymbolAndLength
=
0
;
int
startSymbolAndLength
=
0
;
int
StartSymbolIndex
,
NrOfSymbols
=
14
,
k0
=
0
;
int
time_domain_assignment
=
2
;
int
StartSymbolIndex_tmp
,
NrOfSymbols_tmp
=
2
;
int
StartSymbolIndex
,
NrOfSymbols
;
int
time_domain_assignment
=
0
;
AssertFatal
(
time_domain_assignment
<
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
->
list
.
count
,
"time_domain_assignment %d>=%d
\n
"
,
time_domain_assignment
,
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
->
list
.
count
);
for
(
int
i
=
0
;
startSymbolAndLength
=
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
->
list
.
array
[
time_domain_assignment
]
->
startSymbolAndLength
;
i
<
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
->
list
.
count
;
SLIV2SL
(
startSymbolAndLength
,
&
StartSymbolIndex
,
&
NrOfSymbols
);
i
++
)
{
dlsch_pdu_rel15
->
StartSymbolIndex
=
StartSymbolIndex
;
startSymbolAndLength
=
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
->
list
.
array
[
i
]
->
startSymbolAndLength
;
dlsch_pdu_rel15
->
NrOfSymbols
=
NrOfSymbols
;
SLIV2SL
(
startSymbolAndLength
,
&
StartSymbolIndex_tmp
,
&
NrOfSymbols_tmp
);
if
(
NrOfSymbols_tmp
>
NrOfSymbols
)
{
// k0 = *bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
NrOfSymbols
=
NrOfSymbols_tmp
;
dlsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
NULL
,
StartSymbolIndex
=
StartSymbolIndex_tmp
;
scc
->
dmrs_TypeA_Position
,
k0
=
*
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
->
list
.
array
[
i
]
->
k0
;
dlsch_pdu_rel15
->
NrOfSymbols
);
time_domain_assignment
=
i
;
}
}
dlsch_pdu_rel15
->
StartSymbolIndex
=
StartSymbolIndex
;
dlsch_pdu_rel15
->
NrOfSymbols
=
NrOfSymbols
;
dlsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
NULL
,
scc
->
dmrs_TypeA_Position
,
NrOfSymbols
);
dci_pdu_rel15_t
dci_pdu_rel15
;
dci_pdu_rel15_t
dci_pdu_rel15
;
dci_pdu_rel15
.
frequency_domain_assignment
=
PRBalloc_to_locationandbandwidth0
(
dlsch_pdu_rel15
->
rbStart
,
dci_pdu_rel15
.
frequency_domain_assignment
=
PRBalloc_to_locationandbandwidth0
(
dlsch_pdu_rel15
->
rbStart
,
dlsch_pdu_rel15
->
rbSize
,
dlsch_pdu_rel15
->
rbSize
,
NRRIV2BW
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
));
NRRIV2BW
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
));
dci_pdu_rel15
.
time_domain_assignment
=
3
;
// row index used here instead of SLIV;
dci_pdu_rel15
.
time_domain_assignment
=
time_domain_assignment
;
// row index used here instead of SLIV;
dci_pdu_rel15
.
vrb_to_prb_mapping
=
1
;
dci_pdu_rel15
.
vrb_to_prb_mapping
=
1
;
dci_pdu_rel15
.
mcs
=
dlsch_pdu_rel15
->
mcsIndex
[
0
];
dci_pdu_rel15
.
mcs
=
dlsch_pdu_rel15
->
mcsIndex
[
0
];
dci_pdu_rel15
.
tb_scaling
=
1
;
dci_pdu_rel15
.
tb_scaling
=
1
;
...
@@ -384,36 +376,42 @@ int configure_fapi_dl_Tx(int Mod_idP,
...
@@ -384,36 +376,42 @@ int configure_fapi_dl_Tx(int Mod_idP,
scc
,
scc
,
bwp
);
bwp
);
pdcch_pdu_rel15
->
numDlDci
=
1
;
pdcch_pdu_rel15
->
numDlDci
=
1
;
pdcch_pdu_rel15
->
AggregationLevel
[
0
]
=
4
;
pdcch_pdu_rel15
->
AggregationLevel
[
0
]
=
4
;
pdcch_pdu_rel15
->
RNTI
[
0
]
=
UE_list
->
rnti
[
0
];
pdcch_pdu_rel15
->
RNTI
[
0
]
=
UE_list
->
rnti
[
0
];
pdcch_pdu_rel15
->
CceIndex
[
0
]
=
0
;
pdcch_pdu_rel15
->
CceIndex
[
0
]
=
0
;
pdcch_pdu_rel15
->
beta_PDCCH_1_0
[
0
]
=
0
;
pdcch_pdu_rel15
->
beta_PDCCH_1_0
[
0
]
=
0
;
pdcch_pdu_rel15
->
powerControlOffsetSS
[
0
]
=
1
;
pdcch_pdu_rel15
->
powerControlOffsetSS
[
0
]
=
1
;
int
dci_formats
[
pdcch_pdu_rel15
->
numDlDci
];
int
rnti_types
[
pdcch_pdu_rel15
->
numDlDci
];
int
dci_formats
[
pdcch_pdu_rel15
->
numDlDci
];
dci_formats
[
0
]
=
NR_DL_DCI_FORMAT_1_0
;
int
rnti_types
[
pdcch_pdu_rel15
->
numDlDci
];
rnti_types
[
0
]
=
NR_RNTI_C
;
dci_formats
[
0
]
=
NR_DL_DCI_FORMAT_1_0
;
fill_dci_pdu_rel15
(
&
dci_pdu_rel15
,
pdcch_pdu_rel15
,
dci_formats
,
rnti_types
);
rnti_types
[
0
]
=
NR_RNTI_C
;
LOG_I
(
MAC
,
"DCI params: rnti %d, rnti_type %d, dci_format %d
\n
\
for
(
int
i
=
0
;
i
<
pdcch_pdu_rel15
->
numDlDci
;
i
++
)
coreset params: FreqDomainResource %llx, n_symb %d
\n
\
pdcch_pdu_rel15
->
PayloadSizeBits
[
i
]
=
nr_dci_size
(
dci_formats
[
i
],
rnti_types
[
i
],
dlsch_pdu_rel15
->
BWPSize
);
ss params : first symb %d
\n
"
,
fill_dci_pdu_rel15
(
pdcch_pdu_rel15
,
&
dci_pdu_rel15
,
dci_formats
,
rnti_types
);
LOG_I
(
MAC
,
"DCI params: rnti %d, rnti_type %d, dci_format %d
\n
\
coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d
\n
"
,
pdcch_pdu_rel15
->
RNTI
[
0
],
pdcch_pdu_rel15
->
RNTI
[
0
],
rnti_types
[
0
],
rnti_types
[
0
],
dci_formats
[
0
],
dci_formats
[
0
],
(
unsigned
long
long
)
pdcch_pdu_rel15
->
FreqDomainResource
,
(
unsigned
long
long
)
pdcch_pdu_rel15
->
FreqDomainResource
,
pdcch_pdu_rel15
->
StartSymbolIndex
);
pdcch_pdu_rel15
->
StartSymbolIndex
,
pdcch_pdu_rel15
->
DurationSymbols
);
int
x_Overhead
=
0
;
// should be 0 for initialBWP
int
x_Overhead
=
0
;
// should be 0 for initialBWP
nr_get_tbs_dl
(
&
dl_config_dlsch_pdu
->
dlsch_pdu
,
nr_get_tbs_dl
(
&
dl_config_dlsch_pdu
->
dlsch_pdu
,
x_Overhead
);
x_Overhead
);
// Hardcode it for now
// Hardcode it for now
TBS
=
dl_config_dlsch_pdu
->
dlsch_pdu
.
dlsch_pdu_rel15
.
TBSize
[
0
];
TBS
=
dl_config_dlsch_pdu
->
dlsch_pdu
.
dlsch_pdu_rel15
.
TBSize
[
0
];
LOG_I
(
MAC
,
"DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d TBS: %d
\n
"
,
LOG_I
(
MAC
,
"DLSCH PDU: start PRB %d n_PRB %d start
SymbolAndLength %d start
symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d TBS: %d
\n
"
,
dlsch_pdu_rel15
->
rbStart
,
dlsch_pdu_rel15
->
rbStart
,
dlsch_pdu_rel15
->
rbSize
,
dlsch_pdu_rel15
->
rbSize
,
startSymbolAndLength
,
dlsch_pdu_rel15
->
StartSymbolIndex
,
dlsch_pdu_rel15
->
StartSymbolIndex
,
dlsch_pdu_rel15
->
NrOfSymbols
,
dlsch_pdu_rel15
->
NrOfSymbols
,
dlsch_pdu_rel15
->
nrOfLayers
,
dlsch_pdu_rel15
->
nrOfLayers
,
...
@@ -599,7 +597,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
...
@@ -599,7 +597,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
}
}
TBS_bytes
=
configure_fapi_dl_Tx
(
module_idP
,
dl_req
,
TX_req
,
TBS_bytes
=
configure_fapi_dl_Tx
(
module_idP
,
dl_req
,
TX_req
,
nr_mac
->
pdu_index
);
nr_mac
->
pdu_index
[
CC_id
]
);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_I
(
MAC
,
"Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, , TBS size: %d
\n
\n
"
,
frameP
,
slotP
,
TBS_bytes
);
LOG_I
(
MAC
,
"Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, , TBS size: %d
\n
\n
"
,
frameP
,
slotP
,
TBS_bytes
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
ccaf5220
...
@@ -485,6 +485,8 @@ void nr_configure_pdcch(nfapi_nr_dl_config_pdcch_pdu_rel15_t* pdcch_pdu,
...
@@ -485,6 +485,8 @@ void nr_configure_pdcch(nfapi_nr_dl_config_pdcch_pdu_rel15_t* pdcch_pdu,
}
}
}
}
void
fill_dci_pdu_rel15
(
nfapi_nr_dl_config_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
,
void
fill_dci_pdu_rel15
(
nfapi_nr_dl_config_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
,
dci_pdu_rel15_t
*
dci_pdu_rel15
,
dci_pdu_rel15_t
*
dci_pdu_rel15
,
int
*
dci_formats
,
int
*
dci_formats
,
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
ccaf5220
...
@@ -147,4 +147,8 @@ int get_num_dmrs(uint16_t dmrs_mask );
...
@@ -147,4 +147,8 @@ int get_num_dmrs(uint16_t dmrs_mask );
int16_t
fill_dmrs_mask
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
);
int16_t
fill_dmrs_mask
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
);
uint16_t
nr_dci_size
(
nr_dci_format_t
format
,
nr_rnti_type_t
rnti_type
,
uint16_t
N_RB
);
#endif
/*__LAYER2_NR_MAC_PROTO_H__*/
#endif
/*__LAYER2_NR_MAC_PROTO_H__*/
openair2/LAYER2/NR_MAC_gNB/nr_mac_common.c
View file @
ccaf5220
...
@@ -368,3 +368,92 @@ int get_num_dmrs(uint16_t dmrs_mask ) {
...
@@ -368,3 +368,92 @@ int get_num_dmrs(uint16_t dmrs_mask ) {
return
(
num_dmrs
);
return
(
num_dmrs
);
}
}
uint16_t
nr_dci_size
(
nr_dci_format_t
format
,
nr_rnti_type_t
rnti_type
,
uint16_t
N_RB
)
{
uint16_t
size
=
0
;
switch
(
format
)
{
/*Only sizes for 0_0 and 1_0 are correct at the moment*/
case
NR_UL_DCI_FORMAT_0_0
:
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size
+=
20
;
size
+=
(
uint8_t
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
// Freq domain assignment -- hopping scenario to be updated
size
+=
nr_dci_size
(
NR_DL_DCI_FORMAT_1_0
,
rnti_type
,
N_RB
)
-
size
;
// Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
break
;
case
NR_UL_DCI_FORMAT_0_1
:
/// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, SRS request 2 --17
size
+=
17
;
// Carrier indicator
// UL/SUL indicator
// BWP Indicator
// Freq domain assignment
// Time domain assignment
// VRB to PRB mapping
// Frequency Hopping flag
// 1st DAI
// 2nd DAI
// SRS resource indicator
// Precoding info and number of layers
// Antenna ports
// CSI request
// CBGTI
// PTRS - DMRS association
// beta offset indicator
// DMRS sequence init
break
;
case
NR_DL_DCI_FORMAT_1_0
:
/// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28
size
+=
28
;
size
+=
(
uint8_t
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
// Freq domain assignment
break
;
case
NR_DL_DCI_FORMAT_1_1
:
// Carrier indicator
size
+=
1
;
// Format identifier
// BWP Indicator
// Freq domain assignment
// Time domain assignment
// VRB to PRB mapping
// PRB bundling size indicator
// Rate matching indicator
// ZP CSI-RS trigger
/// TB1- MCS 5, NDI 1, RV 2
size
+=
8
;
// TB2
size
+=
4
;
// HARQ PID
// DAI
size
+=
2
;
// TPC PUCCH
size
+=
3
;
// PUCCH resource indicator
size
+=
3
;
// PDSCH to HARQ timing indicator
// Antenna ports
// Tx Config Indication
size
+=
2
;
// SRS request
// CBGTI
// CBGFI
size
+=
1
;
// DMRS sequence init
break
;
case
NR_DL_DCI_FORMAT_2_0
:
break
;
case
NR_DL_DCI_FORMAT_2_1
:
break
;
case
NR_DL_DCI_FORMAT_2_2
:
break
;
case
NR_DL_DCI_FORMAT_2_3
:
break
;
default:
AssertFatal
(
1
==
0
,
"Invalid NR DCI format %d
\n
"
,
format
);
}
return
size
;
}
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