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canghaiwuhen
OpenXG-RAN
Commits
decdded2
Commit
decdded2
authored
Nov 05, 2017
by
Raymond Knopp
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debugging for MPDCCH
parent
c8070607
Changes
3
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3 changed files
with
89 additions
and
15 deletions
+89
-15
openair1/PHY/LTE_TRANSPORT/dci.c
openair1/PHY/LTE_TRANSPORT/dci.c
+3
-1
openair1/PHY/LTE_TRANSPORT/edci.c
openair1/PHY/LTE_TRANSPORT/edci.c
+85
-9
openair2/LAYER2/MAC/eNB_scheduler_RA.c
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+1
-5
No files found.
openair1/PHY/LTE_TRANSPORT/dci.c
View file @
decdded2
...
...
@@ -210,6 +210,7 @@ uint8_t *generate_dci0(uint8_t *dci,
uint8_t
*
e
,
uint8_t
DCI_LENGTH
,
uint8_t
aggregation_level
,
uint8_r
bitsperCCE
,
uint16_t
rnti
)
{
...
...
@@ -230,7 +231,7 @@ uint8_t *generate_dci0(uint8_t *dci,
"generate_dci FATAL, illegal aggregation_level %d
\n
"
,
aggregation_level
);
coded_bits
=
72
*
aggregation_level
;
coded_bits
=
bitsperCCE
*
aggregation_level
;
/*
...
...
@@ -2293,6 +2294,7 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
e
+
(
72
*
dci_alloc
[
i
].
firstCCE
),
dci_alloc
[
i
].
dci_length
,
dci_alloc
[
i
].
L
,
72
,
dci_alloc
[
i
].
rnti
);
}
}
...
...
openair1/PHY/LTE_TRANSPORT/edci.c
View file @
decdded2
...
...
@@ -96,16 +96,40 @@ void mpdcch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
}
}
// this table is the allocation of modulated MPDCCH format 5 symbols to REs
// There are in total 36 REs/ECCE * 4 ECCE/PRB_pair = 144 REs in total/PRB_pair, total is 168 REs => 24 REs for DMRS
// For format 5 there are 6 PRB pairs => 864 REs for 24 total ECCE
static
uint16_t
mpdcch5tab
[
864
];
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
// start symbol is symbol 1 and L'=24 => all 6 PRBs in the set
// 9 symbols without DMRS = 9*12*6 REs = 648 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs
// Total = 648+216 = 864 REs = 1728 bits
static
uint16_t
mpdcch5ss1tab
[
864
];
void
init_mpdcch5ss1p107108tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re
;
LOG_I
(
PHY
,
"Inititalizing mpdcch5tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
1
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
){
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(((
l
==
5
)
||
(
l
==
6
)
||
(
l
==
12
)
||
(
l
==
13
))
&&
(
kmod
!=
0
)
&&
(
kmod
!=
5
)
&&
(
kmod
!=
10
)))
mpdcch5tab
[
re
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
}
AssertFatal
(
re
==
864
,
"RE count not equal to 864
\n
"
);
}
void
init_mpdcch5tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
// start symbol is symbol 2 and L'=24 => all 6 PRBs in the set
// 8 symbols without DMRS = 9*12*6 REs = 576 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs
// Total = 576+216 = 792 REs = 1584 bits
static
uint16_t
mpdcch5ss2tab
[
864
];
void
init_mpdcch5ss2p107108tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re
;
LOG_I
(
PHY
,
"Inititalizing mpdcch5tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
0
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
l
=
2
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
){
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
...
...
@@ -113,12 +137,55 @@ void init_mpdcch5tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
mpdcch5tab
[
re
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
}
}
// this table is the allocation of modulated MPDCCH format 3 symbols to REs, antenna ports 107,108
// with start symbol 1, using L'=16 => first 4 PRBs in the set
// 8 symbols without DMRS = 9*12*4 REs = 432 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*4 REs = 144 REs
// Total = 432+144 = 576 = 16CCE*36RE/CCE
static
uint16_t
mpdcch3ss1tab
[
864
];
void
init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re
;
LOG_I
(
PHY
,
"Inititalizing mpdcch3ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
1
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
48
;
k
++
){
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(((
l
==
5
)
||
(
l
==
6
)
||
(
l
==
12
)
||
(
l
==
13
))
&&
(
kmod
!=
0
)
&&
(
kmod
!=
5
)
&&
(
kmod
!=
10
)))
mpdcch5tab
[
re
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
}
AssertFatal
(
re
==
864
,
"RE count not equal to 864
\n
"
);
}
// this table is the allocation of modulated MPDCCH format 2 symbols to REs, antenna ports 107,108
// with start symbol 1, using L'=8 => last 2 PRBs in the set
// 8 symbols without DMRS = 9*12*2 REs = 216 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*2 REs = 72 REs
// Total = 216+72 = 288 = 8CCE*36RE/CCE
static
uint16_t
mpdcch2ss1tab
[
864
];
void
init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re
;
LOG_I
(
PHY
,
"Inititalizing mpdcch3ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
1
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
48
;
k
++
){
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(((
l
==
5
)
||
(
l
==
6
)
||
(
l
==
12
)
||
(
l
==
13
))
&&
(
kmod
!=
0
)
&&
(
kmod
!=
5
)
&&
(
kmod
!=
10
)))
mpdcch5tab
[
re
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
}
AssertFatal
(
re
==
864
,
"RE count not equal to 864
\n
"
);
}
extern
uint8_t
*
generate_dci0
(
uint8_t
*
dci
,
uint8_t
*
e
,
uint8_t
DCI_LENGTH
,
uint8_t
bitsperCCE
,
uint8_t
aggregation_level
,
uint16_t
rnti
);
...
...
@@ -130,7 +197,15 @@ void generate_mdci_top(PHY_VARS_eNB *eNB, int frame, int subframe,int16_t amp,in
LTE_DL_FRAME_PARMS
*
fp
=&
eNB
->
frame_parms
;
int
i
;
int
gain_lin_QPSK
;
uint8_t
bitsperCCE
;
if
(
mpdcch
->
start_symbol
==
1
)
bitsperCCE
=
72
;
else
if
(
mpdcch
->
start_symbol
==
2
)
bitsperCCE
=
66
;
else
if
(
mpdcch
->
start_symbol
==
3
)
bitsperCCE
=
60
;
for
(
i
=
0
;
i
<
mpdcch
->
num_dci
;
i
++
)
{
mdci
=
&
mpdcch
->
mdci_alloc
[
i
];
...
...
@@ -150,11 +225,12 @@ void generate_mdci_top(PHY_VARS_eNB *eNB, int frame, int subframe,int16_t amp,in
generate_dci0
(
mdci
->
dci_pdu
,
mpdcch
->
e
+
(
72
*
mdci
->
firstCCE
),
mdci
->
dci_length
,
bitsperCCE
,
mdci
->
L
,
mdci
->
rnti
);
coded_bits
=
72
*
mdci
->
L
;
coded_bits
=
bitsperCCE
*
mdci
->
L
;
// scrambling
uint16_t
absSF
=
(
frame
*
10
)
+
subframe
;
...
...
@@ -166,7 +242,7 @@ void generate_mdci_top(PHY_VARS_eNB *eNB, int frame, int subframe,int16_t amp,in
mpdcch_scrambling
(
fp
,
mdci
,
absSF
,
mpdcch
->
e
+
(
72
*
mdci
->
firstCCE
),
mpdcch
->
e
+
(
bitsperCCE
*
mdci
->
firstCCE
),
coded_bits
);
// Modulation for PDCCH
...
...
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @
decdded2
...
...
@@ -304,20 +304,16 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
number_of_tx_antenna_ports
=
1
;
RA_template
->
msg2_mpdcch_repetition_cnt
++
;
dl_req
->
number_pdu
++
;
RA_template
->
Msg2_subframe
=
(
RA_template
->
Msg2_subframe
+
9
)
%
10
;
}
//repetition_count==0 && SF condition met
if
(
RA_template
->
msg2_mpdcch_repetition_cnt
>
0
)
{
// we're in a stream of repetitions
LOG_I
(
MAC
,
"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, MPDCCH repetition %d
\n
"
,
module_idP
,
frameP
,
subframeP
,
RA_template
->
msg2_mpdcch_repetition_cnt
);
if
(
RA_template
->
msg2_mpdcch_repetition_cnt
==
reps
)
{
// this is the last mpdcch repetition
if
(
cc
[
CC_idP
].
tdd_Config
==
NULL
)
{
// FDD case
// wait 2 subframes for PDSCH transmission
if
(
subframeP
>
7
)
RA_template
->
Msg2_frame
=
(
frameP
+
1
)
&
1023
;
else
RA_template
->
Msg2_frame
=
frameP
;
RA_template
->
Msg2_subframe
=
(
subframeP
+
2
)
%
10
;
// +2 is the "n+x" from Section 7.1.11 in 36.213
LOG_I
(
MAC
,
"[eNB %d][RAPROC] SFN %d.%d : Set Msg2 in %d.%d
\n
"
,
frameP
,
subframeP
,
RA_template
->
Msg2_frame
,
RA_template
->
Msg2_subframe
);
}
else
{
AssertFatal
(
1
==
0
,
"TDD case not done yet
\n
"
);
...
...
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