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OpenXG-RAN
Commit fbbf51d9 authored by Florian Kaltenberger's avatar Florian Kaltenberger
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reactivating old implementation of threading, bringing over recent changes

parent 053433a8
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Showing with 60 additions and 69 deletions
cmake_targets/CMakeLists.txt
View file @ fbbf51d9
......@@ -2395,10 +2395,12 @@ target_link_libraries (nr-softmodem-nos1 ${T_LIB})
add_executable(nr-uesoftmodem
${rrc_h}
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_DIR}/common/utils/threadPool/thread-pool.c
${OPENAIR_DIR}/executables//nr-uesoftmodem.c
${OPENAIR_DIR}/executables/nr-ue.c
#${OPENAIR_DIR}/common/utils/threadPool/thread-pool.c
#${OPENAIR_DIR}/executables/nr-uesoftmodem.c
#${OPENAIR_DIR}/executables/nr-ue.c
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_DIR}/targets/RT/USER/nr-uesoftmodem.c
${OPENAIR_DIR}/targets/RT/USER/nr-ue.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
......
executables/nr-ue.c
View file @ fbbf51d9
......@@ -382,7 +382,7 @@ void processSubframeRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE_mac->scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
//write_output("uerxdata_frame.m", "uerxdata_frame", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_frame, 1, 1);
printf("Processing slot %d\n",proc->nr_tti_rx);
LOG_D(PHY,"Processing slot %d\n",proc->nr_tti_rx);
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
......@@ -687,14 +687,14 @@ void *UE_thread(void *arg) {
nbSlotProcessing--;
usleep(200);
}
pushTpool(Tpool, processingMsg[thread_idx]);
}
while (nbSlotProcessing >= RX_NB_TH && !tryPullTpool(&nf, Tpool)) {
nbSlotProcessing--;
usleep(200);
else {
if (tryPullTpool(&nf, Tpool))
pushTpool(Tpool, processingMsg[thread_idx]);
else
LOG_W(PHY,"can't schedule slot %d\n",slot_nr);
}
pushTpool(Tpool, processingMsg[thread_idx]);
} // while !oai_exit
return NULL;
......
openair1/PHY/defs_nr_UE.h
View file @ fbbf51d9
......@@ -267,6 +267,27 @@ typedef struct {
uint8_t CC_id;
/// Last RX timestamp
openair0_timestamp timestamp_rx;
/// pthread attributes for main UE thread
pthread_attr_t attr_ue;
/// scheduling parameters for main UE thread
struct sched_param sched_param_ue;
/// pthread descriptor main UE thread
pthread_t pthread_ue;
/// \brief Instance count for synch thread.
/// \internal This variable is protected by \ref mutex_synch.
int instance_cnt_synch;
/// pthread attributes for synch processing thread
pthread_attr_t attr_synch;
/// scheduling parameters for synch thread
struct sched_param sched_param_synch;
/// pthread descriptor synch thread
pthread_t pthread_synch;
/// condition variable for UE synch thread;
pthread_cond_t cond_synch;
/// mutex for UE synch thread
pthread_mutex_t mutex_synch;
/// set of scheduling variables RXn-TXnp4 threads
UE_nr_rxtx_proc_t proc_rxtx[RX_NB_TH];
} UE_nr_proc_t;
typedef enum {
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
View file @ fbbf51d9
......@@ -254,7 +254,7 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2,mgmt_addr=192.168.100.8,clock_source=external,time_source=external";
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2,clock_source=external,time_source=external";
}
);
......
targets/RT/USER/nr-ue.c
View file @ fbbf51d9
......@@ -239,21 +239,28 @@ void init_UE(int nb_inst) {
NR_UE_MAC_INST_t *mac_inst;
for (inst=0; inst < nb_inst; inst++) {
// UE->rfdevice.type = NONE_DEV;
//PHY_VARS_NR_UE *UE = PHY_vars_UE_g[inst][0];
LOG_I(PHY,"Initializing memory for UE instance %d (%p)\n",inst,PHY_vars_UE_g[inst]);
PHY_vars_UE_g[inst][0] = init_nr_ue_vars(NULL,inst,0);
PHY_VARS_NR_UE *UE = PHY_vars_UE_g[inst][0];
AssertFatal((UE->if_inst = nr_ue_if_module_init(inst)) != NULL, "can not initial IF module\n");
nr_l3_init_ue();
nr_l2_init_ue();
mac_inst = get_mac_inst(0);
mac_inst = get_mac_inst(inst);
mac_inst->if_module = UE->if_inst;
UE->if_inst->scheduled_response = nr_ue_scheduled_response;
UE->if_inst->phy_config_request = nr_ue_phy_config_request;
// Initial bandwidth part configuration -- full carrier bandwidth
mac_inst->initial_bwp_dl.bwp_id = 0;
mac_inst->initial_bwp_dl.location = 0;
mac_inst->initial_bwp_dl.scs = UE->frame_parms.subcarrier_spacing;
mac_inst->initial_bwp_dl.N_RB = UE->frame_parms.N_RB_DL;
mac_inst->initial_bwp_dl.cyclic_prefix = UE->frame_parms.Ncp;
mac_inst->initial_bwp_ul.bwp_id = 0;
mac_inst->initial_bwp_ul.location = 0;
mac_inst->initial_bwp_ul.scs = UE->frame_parms.subcarrier_spacing;
mac_inst->initial_bwp_ul.N_RB = UE->frame_parms.N_RB_UL;
mac_inst->initial_bwp_ul.cyclic_prefix = UE->frame_parms.Ncp;
LOG_I(PHY,"Intializing UE Threads for instance %d (%p,%p)...\n",inst,PHY_vars_UE_g[inst],PHY_vars_UE_g[inst][0]);
//init_UE_threads(inst);
//UE = PHY_vars_UE_g[inst][0];
AssertFatal(0 == pthread_create(&UE->proc.pthread_ue,
&UE->proc.attr_ue,
UE_thread,
......@@ -587,10 +594,15 @@ void processSubframeRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
UE_mac->scheduled_response.ul_config = NULL;
UE_mac->scheduled_response.tx_request = NULL;
UE_mac->scheduled_response.module_id = UE->Mod_id;
UE_mac->scheduled_response.CC_id = 0;
UE_mac->scheduled_response.frame = proc->frame_rx;
UE_mac->scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
//write_output("uerxdata_frame.m", "uerxdata_frame", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_frame, 1, 1);
printf("Processing slot %d\n",proc->nr_tti_rx);
LOG_D(PHY,"Processing slot %d\n",proc->nr_tti_rx);
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
......@@ -760,12 +772,12 @@ int computeSamplesShift(PHY_VARS_NR_UE *UE) {
}
// compute TO compensation that should be applied for this frame
if ( UE->rx_offset < 5*UE->frame_parms.samples_per_slot &&
if ( UE->rx_offset < UE->frame_parms.samples_per_frame/2 &&
UE->rx_offset > 0 )
return -1 ;
if ( UE->rx_offset > 5*UE->frame_parms.samples_per_slot &&
UE->rx_offset < 10*UE->frame_parms.samples_per_slot )
if ( UE->rx_offset > UE->frame_parms.samples_per_frame/2 &&
UE->rx_offset < UE->frame_parms.samples_per_frame/2 )
return 1;
return 0;
......
targets/RT/USER/nr-uesoftmodem.c
View file @ fbbf51d9
......@@ -206,7 +206,6 @@ int otg_enabled;
//int number_of_cards = 1;
static NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
static nfapi_nr_config_request_t *config[MAX_NUM_CCs];
int16_t node_synch_ref[MAX_NUM_CCs];
uint32_t target_dl_mcs = 28; //maximum allowed mcs
......@@ -654,13 +653,6 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
frame_parms[CC_id] = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
/* Set some default values that may be overwritten while reading options */
frame_parms[CC_id] = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
config[CC_id] = (nfapi_nr_config_request_t*) malloc(sizeof(nfapi_nr_config_request_t));
config[CC_id]->subframe_config.numerology_index_mu.value =1;
config[CC_id]->subframe_config.duplex_mode.value = 1; //FDD
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
config[CC_id]->sch_config.physical_cell_id.value = 0;
frame_parms[CC_id]->eutra_band = 78;
frame_parms[CC_id]->frame_type = FDD;
frame_parms[CC_id]->tdd_config = 3;
......@@ -677,26 +669,6 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
//frame_parms[CC_id]->nushift = 0;
///frame_parms[CC_id]->phich_config_common.phich_resource = oneSixth;
//frame_parms[CC_id]->phich_config_common.phich_duration = normal;
// UL RS Config
/*frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 1;//n_DMRS1 set to 0
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
frame_parms[CC_id]->pusch_config_common.n_SB = 1;
frame_parms[CC_id]->pusch_config_common.hoppingMode = 0;
frame_parms[CC_id]->pusch_config_common.pusch_HoppingOffset = 0;
frame_parms[CC_id]->pusch_config_common.enable64QAM = 0;
frame_parms[CC_id]->prach_config_common.rootSequenceIndex=22;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
// NR: Init to legacy LTE 20Mhz params
frame_parms[CC_id]->numerology_index = 0;
frame_parms[CC_id]->ttis_per_subframe = 1;
......@@ -961,22 +933,6 @@ int main( int argc, char **argv ) {
else
UE[CC_id]->mac_enabled = 1;
if (UE[CC_id]->mac_enabled == 0) { //set default UL parameters for testing mode
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
//UE[CC_id]->pusch_config_dedicated[i] = malloc(sizeof(PUSCH_CONFIG_DEDICATED));
//UE[CC_id]->scheduling_request_config[i] = malloc(sizeof(SCHEDULING_REQUEST_CONFIG));
/*UE[CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
UE[CC_id]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = 0;
UE[CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(0%3);
UE[CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;*/
}
}
UE[CC_id]->UE_scan = UE_scan;
UE[CC_id]->UE_scan_carrier = UE_scan_carrier;
UE[CC_id]->UE_fo_compensation = UE_fo_compensation;
......
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