Added UL harq handling

Also fixed bugs in ulsim and dlsim harq tests

openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c

@@ -348,6 +348,8 @@ int nr_dlsch_encoding(unsigned char *a,
   float Coderate = 0.0;
   uint8_t Nl = 4;
 
+  dlsch->harq_processes[harq_pid]->round = nr_rv_round_map[rel15->rvIndex[0]];
+
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_IN);
 
   A = rel15->TBSize[0]<<3;

openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c

@@ -359,6 +359,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
 
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_ULSCH_DECODING,1);
   harq_process->TBS = pusch_pdu->pusch_data.tb_size;
+  harq_process->round = nr_rv_round_map[pusch_pdu->pusch_data.rv_index];
 
   A   = (harq_process->TBS)<<3;
   ret = ulsch->max_ldpc_iterations + 1;
@@ -570,7 +571,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
 
       AssertFatal(kc!=255,"");
       j+=(harq_process->F>>3);
-      //      for (i=Kr_bytes,j=K_bytes_F-((2*p_decParams->Z)>>3); i < ((kc*p_decParams->Z)>>3); i++, j++) {
       for (i=Kr_bytes; i < ((kc*p_decParams->Z)>>3); i++, j++) {
         pv[i]= _mm_loadu_si128((__m128i*)(&harq_process->d[r][8*j]));
       }
@@ -661,8 +661,8 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
       harq_process->status = SCH_IDLE;
       harq_process->round  = 0;
       harq_process->handled  = 0;
+      ulsch->harq_mask &= ~(1 << harq_pid);
     }
-    ulsch->harq_mask &= ~(1 << harq_pid);
 
     //   LOG_D(PHY,"[gNB %d] ULSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
     //         phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,ulsch->Mlimit,harq_process->TBS);
@@ -680,7 +680,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
     harq_process->status = SCH_IDLE;
     harq_process->round  = 0;
     // harq_process->handled  = 0;
-    ulsch->harq_mask  |= (1 << harq_pid);
+    ulsch->harq_mask &= ~(1 << harq_pid);
     // harq_process->harq_ack.ack = 1;
     // harq_process->harq_ack.harq_id = harq_pid;
     // harq_process->harq_ack.send_harq_status = 1;

openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c

@@ -277,6 +277,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
   __m128i *pl = (__m128i*)&l;
   
     vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_SEGMENTATION, VCD_FUNCTION_IN);
+  
+  harq_process->round = nr_rv_round_map_ue[harq_process->rvidx];
 
   //NR_DL_UE_HARQ_t *harq_process = dlsch->harq_processes[0];
 

openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c

@@ -259,6 +259,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
   Ilbrm = 0;
   Tbslbrm = 950984; //max tbs
   Coderate = 0.0;
+  harq_process->round = nr_rv_round_map_ue[harq_process->pusch_pdu.pusch_data.rv_index];
 
 ///////////
 /////////////////////////////////////////////////////////////////////////////////////////  

openair1/PHY/defs_nr_common.h

@@ -111,6 +111,9 @@
 #define MAX_NUM_NR_CHANNEL_BITS (14*273*12*8)  // 14 symbols, 273 RB
 #define MAX_NUM_NR_RE (14*273*12)
 
+extern const uint8_t nr_rv_round_map[4]; 
+extern const uint8_t nr_rv_round_map_ue[4]; 
+
 typedef enum {
   NR_MU_0=0,
   NR_MU_1,

openair1/SCHED_NR_UE/phy_procedures_nr_ue.c

@@ -86,6 +86,8 @@ fifo_dump_emos_UE emos_dump_UE;
 
 char nr_mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
 
+const uint8_t nr_rv_round_map_ue[4] = {0, 2, 1, 3};
+
 extern double cpuf;
 
 /*

openair1/SIMULATION/NR_PHY/ulsim.c

@@ -104,7 +104,7 @@ int rrc_init_nr_global_param(void){return(0);}
 // needed for some functions
 uint16_t n_rnti = 0x1234;
 openair0_config_t openair0_cfg[MAX_CARDS];
-uint8_t round_rv_map[4] = {1, 0, 2, 3};
+//const uint8_t nr_rv_round_map[4] = {0, 2, 1, 3}; 
 
 int main(int argc, char **argv)
 {
@@ -559,6 +559,7 @@ int main(int argc, char **argv)
   uint8_t mcs_table = 0;
   uint16_t pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; // | PUSCH_PDU_BITMAP_PUSCH_PTRS;
   uint8_t max_rounds = 4;
+  uint8_t crc_status = 0;
 
   uint8_t length_dmrs = pusch_len1; // [hna] remove dmrs struct
   uint16_t l_prime_mask = get_l_prime(nb_symb_sch, typeB, pusch_dmrs_pos0, length_dmrs);  // [hna] remove dmrs struct
@@ -583,12 +584,12 @@ int main(int argc, char **argv)
     for (trial = 0; trial < n_trials; trial++) {
     uint8_t round = 0;
     int error_flag;
-    gNB->ulsch[0][0]->harq_mask = 0;
+    crc_status = 1;
 
-    while (round<max_rounds && !(gNB->ulsch[0][0]->harq_mask & 0x1)) {
+    while (round<max_rounds && crc_status) {
       ulsch_ue[0]->harq_processes[harq_pid]->round = round;
       gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round;
-      rv_index = round_rv_map[round];
+      rv_index = nr_rv_round_map[round];
       reset_meas(&gNB->phy_proc_rx);
       reset_meas(&gNB->ulsch_decoding_stats);
       reset_meas(&gNB->ulsch_deinterleaving_stats);
@@ -841,7 +842,10 @@ int main(int argc, char **argv)
 	    gNB->ulsch[0][0]->max_ldpc_iterations+1) {
 	  error_flag = 1; 
 	  n_errors++;
-	}
+    crc_status = 1;
+	} else {
+    crc_status = 0;
+  }
     printf("end of round %d rv_index %d\n",round, rv_index);
     round++;
     } // round

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -54,6 +54,8 @@
 #include "NR_ControlResourceSet.h"
 
 extern RAN_CONTEXT_t RC;
+
+const uint8_t nr_rv_round_map[4] = {0, 2, 1, 3}; 
 //#define ENABLE_MAC_PAYLOAD_DEBUG 1
 
 //uint8_t mac_pdu[MAX_NR_DLSCH_PAYLOAD_BYTES];
@@ -269,7 +271,6 @@ int configure_fapi_dl_pdu(int Mod_idP,
   int TBS;
   int bwp_id=1;
   int UE_id = 0;
-  uint8_t rv_round_map[4] = {0, 2, 3, 1};
 
   NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
 
@@ -315,7 +316,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
   pdsch_pdu_rel15->qamModOrder[0] = 2;
   pdsch_pdu_rel15->mcsIndex[0] = mcs;
   pdsch_pdu_rel15->mcsTable[0] = 0;
-  pdsch_pdu_rel15->rvIndex[0] = (get_softmodem_params()->phy_test==1) ? 0 : rv_round_map[UE_list->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].round];
+  pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[UE_list->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].round];
   pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
   pdsch_pdu_rel15->nrOfLayers = 1;    
   pdsch_pdu_rel15->transmissionScheme = 0;
@@ -774,6 +775,24 @@ void nr_schedule_uss_dlsch_phytest(module_id_t   module_idP,
 
 }
 
+uint8_t select_ul_harq_pid(NR_UE_sched_ctrl_t *sched_ctrl) {
+
+  uint8_t max_ul_harq_pids = 3; // temp: for testing
+  // schedule active harq processes
+  NR_UE_ul_harq_t cur_harq;
+  for (uint8_t hrq_id; hrq_id < max_ul_harq_pids; hrq_id++) {
+    cur_harq = sched_ctrl->ul_harq_processes[hrq_id];
+    if (cur_harq.state==ACTIVE_NOT_SCHED)
+      return hrq_id;
+  }
+
+  // schedule new harq processes
+  for (uint8_t hrq_id; hrq_id < max_ul_harq_pids; hrq_id++) {
+    cur_harq = sched_ctrl->ul_harq_processes[hrq_id];
+    if (cur_harq.state==INACTIVE)
+      return hrq_id;
+  }
+}
 
 void schedule_fapi_ul_pdu(int Mod_idP,
                           frame_t frameP,
@@ -978,9 +997,14 @@ void schedule_fapi_ul_pdu(int Mod_idP,
     //Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2]
     //Optional Data only included if indicated in pduBitmap
     // TODO from harq function as in pdsch
-    pusch_pdu->pusch_data.rv_index = 0;
-    pusch_pdu->pusch_data.harq_process_id = 0;
-    pusch_pdu->pusch_data.new_data_indicator = 1;
+    uint8_t harq_id = select_ul_harq_pid(&UE_list->UE_sched_ctrl[UE_id]);
+    NR_UE_ul_harq_t *cur_harq = &UE_list->UE_sched_ctrl[UE_id].ul_harq_processes[harq_id];
+    pusch_pdu->pusch_data.harq_process_id = harq_id;
+    pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi;
+    pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round];
+
+    cur_harq->state = ACTIVE_SCHED;
+    cur_harq->last_tx_slot = pusch_sched->slot;
 
     uint8_t num_dmrs_symb = 0;
 

openair2/LAYER2/NR_MAC_gNB/main.c

@@ -117,6 +117,9 @@ void mac_top_init_gNB(void)
         UE_list->UE_sched_ctrl[list_el].harq_processes[list_harq].round = 0;
         UE_list->UE_sched_ctrl[list_el].harq_processes[list_harq].ndi = 0;
         UE_list->UE_sched_ctrl[list_el].harq_processes[list_harq].is_waiting = 0;
+        UE_list->UE_sched_ctrl[list_el].ul_harq_processes[list_harq].round = 0;
+        UE_list->UE_sched_ctrl[list_el].ul_harq_processes[list_harq].ndi = 0;
+        UE_list->UE_sched_ctrl[list_el].ul_harq_processes[list_harq].state = 0;
       }
     }
 

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -267,6 +267,19 @@ typedef struct NR_UE_harq {
   uint16_t feedback_slot;
 } NR_UE_harq_t;
 
+typedef enum {
+  INACTIVE = 0,
+  ACTIVE_NOT_SCHED,
+  ACTIVE_SCHED
+} NR_UL_harq_states_t;
+
+typedef struct NR_UE_ul_harq {
+  uint8_t ndi;
+  uint8_t round;
+  uint16_t last_tx_slot;
+  NR_UL_harq_states_t state;
+} NR_UE_ul_harq_t;
+
 /*! \brief scheduling control information set through an API */
 typedef struct {
   uint64_t dlsch_in_slot_bitmap;  // static bitmap signaling which slot in a tdd period contains dlsch
@@ -277,6 +290,7 @@ typedef struct {
   int16_t ta_update;
   uint8_t current_harq_pid;
   NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
+  NR_UE_ul_harq_t ul_harq_processes[NR_MAX_NB_HARQ_PROCESSES];
   int dummy;
   NR_UE_mac_ce_ctrl_t UE_mac_ce_ctrl;// MAC CE related information
 } NR_UE_sched_ctrl_t;

openair2/NR_PHY_INTERFACE/NR_IF_Module.c

@@ -131,8 +131,34 @@ void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl) {
   UL_info->uci_ind.num_ucis = 0;
 }
 
+void handle_nr_ul_harq(uint16_t slot, NR_UE_sched_ctrl_t *sched_ctrl, uint8_t crc_status) {
 
-void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
+  int max_harq_rounds = 4; // TODO define macro
+  for (uint8_t hrq_id = 0; hrq_id < NR_MAX_NB_HARQ_PROCESSES; hrq_id++) {
+    NR_UE_ul_harq_t cur_harq = sched_ctrl->ul_harq_processes[hrq_id];
+    if ((cur_harq.last_tx_slot == slot-1) && cur_harq.state==ACTIVE_SCHED) {
+      if (!crc_status) {
+        cur_harq.ndi ^= 1;
+        cur_harq.round = 0;
+        cur_harq.state = INACTIVE; // passed -> make inactive. can be used by scheduder for next grant
+      } else {
+        cur_harq.round++;
+        cur_harq.state = ACTIVE_NOT_SCHED;
+      }
+
+      if (!(cur_harq.round<max_harq_rounds)) {
+        cur_harq.ndi ^= 1;
+        cur_harq.state = INACTIVE; // failed after 4 rounds -> make inactive
+        cur_harq.round = 0;
+      }
+      return;
+    }
+  }
+
+}
+
+
+void handle_nr_ulsch(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl) {
   if(nfapi_mode == 1) {
     if (UL_info->crc_ind.number_crcs>0) {
       //LOG_D(PHY,"UL_info->crc_ind.crc_indication_body.number_of_crcs:%d CRC_IND:SFN/SF:%d\n", UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf));
@@ -159,6 +185,8 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
               UL_info->rx_ind.pdu_list[i].rnti) {
             LOG_D(PHY, "UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].crc_indication_rel8.crc_flag:%d\n", j, UL_info->crc_ind.crc_list[j].tb_crc_status);
 
+            handle_nr_ul_harq(UL_info->slot, sched_ctrl, UL_info->crc_ind.crc_list[j].tb_crc_status);
+
             if (UL_info->crc_ind.crc_list[j].tb_crc_status == 1) { // CRC error indication
               LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->slot);
 
@@ -233,7 +261,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
   handle_nr_uci(UL_info, &mac->UE_list.UE_sched_ctrl[0]);
   // clear HI prior to handling ULSCH
   mac->UL_dci_req[CC_id].numPdus = 0;
-  handle_nr_ulsch(UL_info);
+  handle_nr_ulsch(UL_info, &mac->UE_list.UE_sched_ctrl[0]);
 
   if (nfapi_mode != 1) {
     if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {