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wangjie
OpenXG-RAN
Commits
3d385304
Commit
3d385304
authored
Dec 16, 2019
by
Haruki NAOI
Browse files
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Plain Diff
Fix: ULSCH AMC by instantaneous SINR value.
parent
bc123817
Changes
6
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6 changed files
with
21 additions
and
9 deletions
+21
-9
openair2/LAYER2/MAC/defs.h
openair2/LAYER2/MAC/defs.h
+1
-0
openair2/LAYER2/MAC/eNB_scheduler.c
openair2/LAYER2/MAC/eNB_scheduler.c
+1
-1
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
+10
-2
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+1
-1
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+7
-5
openair2/LAYER2/MAC/mac.h
openair2/LAYER2/MAC/mac.h
+1
-0
No files found.
openair2/LAYER2/MAC/defs.h
View file @
3d385304
...
@@ -831,6 +831,7 @@ typedef struct {
...
@@ -831,6 +831,7 @@ typedef struct {
uint8_t
pucch3_cqi_update
[
NFAPI_CC_MAX
];
uint8_t
pucch3_cqi_update
[
NFAPI_CC_MAX
];
uint8_t
pucch3_snr
[
NFAPI_CC_MAX
];
uint8_t
pucch3_snr
[
NFAPI_CC_MAX
];
uint8_t
pusch_snr
[
NFAPI_CC_MAX
];
uint8_t
pusch_snr
[
NFAPI_CC_MAX
];
uint8_t
pusch_snr_avg
[
NFAPI_CC_MAX
];
uint16_t
feedback_cnt
[
NFAPI_CC_MAX
];
uint16_t
feedback_cnt
[
NFAPI_CC_MAX
];
uint16_t
timing_advance
;
uint16_t
timing_advance
;
uint16_t
timing_advance_r9
;
uint16_t
timing_advance_r9
;
...
...
openair2/LAYER2/MAC/eNB_scheduler.c
View file @
3d385304
...
@@ -617,7 +617,7 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -617,7 +617,7 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
UE_scheduling_control
->
ul_out_of_sync
==
0
?
"in synch"
:
"out of sync"
,
UE_scheduling_control
->
ul_out_of_sync
==
0
?
"in synch"
:
"out of sync"
,
UE_list
->
UE_template
[
CC_id
][
UE_id
].
phr_info
,
UE_list
->
UE_template
[
CC_id
][
UE_id
].
phr_info
,
UE_scheduling_control
->
dl_cqi
[
CC_id
],
UE_scheduling_control
->
dl_cqi
[
CC_id
],
(
5
*
UE_scheduling_control
->
pusch_snr
[
CC_id
]
-
640
)
/
10
,
(
5
*
UE_scheduling_control
->
pusch_snr
_avg
[
CC_id
]
-
640
)
/
10
,
(
5
*
UE_scheduling_control
->
pucch1_snr
[
CC_id
]
-
640
)
/
10
);
(
5
*
UE_scheduling_control
->
pucch1_snr
[
CC_id
]
-
640
)
/
10
);
}
}
...
...
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
View file @
3d385304
...
@@ -3345,6 +3345,8 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
...
@@ -3345,6 +3345,8 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
uint8_t
average_rbs
;
uint8_t
average_rbs
;
uint16_t
first_rb
[
MAX_NUM_CCs
];
uint16_t
first_rb
[
MAX_NUM_CCs
];
uint8_t
mcs
;
uint8_t
mcs
;
uint8_t
snr
;
uint8_t
snr2mcs_offset
=
4
;
uint8_t
rb_table_index
;
uint8_t
rb_table_index
;
uint8_t
num_pucch_rb
;
uint8_t
num_pucch_rb
;
uint32_t
tbs
;
uint32_t
tbs
;
...
@@ -3439,7 +3441,13 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
...
@@ -3439,7 +3441,13 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
UE_template
=
&
UE_list
->
UE_template
[
CC_id
][
UE_id
];
UE_template
=
&
UE_list
->
UE_template
[
CC_id
][
UE_id
];
if
(
UE_list
->
UE_sched_ctrl
[
UE_id
].
phr_received
==
1
)
{
if
(
UE_list
->
UE_sched_ctrl
[
UE_id
].
phr_received
==
1
)
{
mcs
=
20
;
snr
=
(
5
*
UE_list
->
UE_sched_ctrl
[
UE_id
].
pusch_snr
[
CC_id
]
-
640
)
/
10
;
if
((
snr
+
snr2mcs_offset
)
>=
20
)
{
mcs
=
20
;
}
else
{
mcs
=
snr
+
snr2mcs_offset
;
}
}
else
{
}
else
{
mcs
=
10
;
mcs
=
10
;
}
}
...
@@ -3860,7 +3868,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
...
@@ -3860,7 +3868,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
//power control
//power control
//compute the expected ULSCH RX power (for the stats)
//compute the expected ULSCH RX power (for the stats)
// this is the normalized RX power and this should be constant (regardless of mcs
// this is the normalized RX power and this should be constant (regardless of mcs
snr
=
(
5
*
UE_sched_ctrl
->
pusch_snr
[
CC_id
]
-
640
)
/
10
;
snr
=
(
5
*
UE_sched_ctrl
->
pusch_snr
_avg
[
CC_id
]
-
640
)
/
10
;
target_snr
=
eNB
->
puSch10xSnr
/
10
;
target_snr
=
eNB
->
puSch10xSnr
/
10
;
// this assumes accumulated tpc
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
...
...
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @
3d385304
...
@@ -2448,7 +2448,7 @@ add_new_ue(module_id_t mod_idP,
...
@@ -2448,7 +2448,7 @@ add_new_ue(module_id_t mod_idP,
UE_list
->
assoc_dl_slice_idx
[
UE_id
]
=
0
;
UE_list
->
assoc_dl_slice_idx
[
UE_id
]
=
0
;
UE_list
->
assoc_ul_slice_idx
[
UE_id
]
=
0
;
UE_list
->
assoc_ul_slice_idx
[
UE_id
]
=
0
;
UE_list
->
UE_sched_ctrl
[
UE_id
].
ta_update
=
31
;
UE_list
->
UE_sched_ctrl
[
UE_id
].
ta_update
=
31
;
UE_list
->
UE_sched_ctrl
[
UE_id
].
pusch_snr
[
cc_idP
]
=
0
;
UE_list
->
UE_sched_ctrl
[
UE_id
].
pusch_snr
_avg
[
cc_idP
]
=
0
;
for
(
j
=
0
;
j
<
8
;
j
++
)
{
for
(
j
=
0
;
j
<
8
;
j
++
)
{
UE_list
->
UE_template
[
cc_idP
][
UE_id
].
oldNDI
[
j
][
TB1
]
=
(
j
==
0
)
?
1
:
0
;
// 1 because first transmission is with format1A (Msg4) for harq_pid 0
UE_list
->
UE_template
[
cc_idP
][
UE_id
].
oldNDI
[
j
][
TB1
]
=
(
j
==
0
)
?
1
:
0
;
// 1 because first transmission is with format1A (Msg4) for harq_pid 0
...
...
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @
3d385304
...
@@ -172,14 +172,16 @@ rx_sdu(const module_id_t enb_mod_idP,
...
@@ -172,14 +172,16 @@ rx_sdu(const module_id_t enb_mod_idP,
* maybe it's even not correct at all?
* maybe it's even not correct at all?
*/
*/
UE_scheduling_control
->
ta_update
=
(
UE_scheduling_control
->
ta_update
*
3
+
timing_advance
)
/
4
;
UE_scheduling_control
->
ta_update
=
(
UE_scheduling_control
->
ta_update
*
3
+
timing_advance
)
/
4
;
UE_scheduling_control
->
pusch_snr
[
CC_idP
]
=
ul_cqi
;
double
tpc_forgetting_filter
=
0
.
75
;
double
tpc_forgetting_filter
=
0
.
75
;
if
(
UE_scheduling_control
->
pusch_snr
[
CC_idP
]
==
0
)
{
if
(
UE_scheduling_control
->
pusch_snr
_avg
[
CC_idP
]
==
0
)
{
UE_scheduling_control
->
pusch_snr
[
CC_idP
]
=
ul_cqi
;
UE_scheduling_control
->
pusch_snr
_avg
[
CC_idP
]
=
ul_cqi
;
}
}
else
{
else
{
UE_scheduling_control
->
pusch_snr
[
CC_idP
]
=
(
int
)((
double
)
UE_scheduling_control
->
pusch_snr
[
CC_idP
]
*
tpc_forgetting_filter
+
(
double
)
ul_cqi
*
(
1
-
tpc_forgetting_filter
));
UE_scheduling_control
->
pusch_snr
_avg
[
CC_idP
]
=
(
int
)((
double
)
UE_scheduling_control
->
pusch_snr_avg
[
CC_idP
]
*
tpc_forgetting_filter
+
(
double
)
ul_cqi
*
(
1
-
tpc_forgetting_filter
));
}
}
UE_scheduling_control
->
ul_consecutive_errors
=
0
;
UE_scheduling_control
->
ul_consecutive_errors
=
0
;
first_rb
=
UE_template_ptr
->
first_rb_ul
[
harq_pid
];
first_rb
=
UE_template_ptr
->
first_rb_ul
[
harq_pid
];
...
@@ -2071,7 +2073,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP,
...
@@ -2071,7 +2073,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP,
cqi_req
=
0
;
cqi_req
=
0
;
/* Power control: compute the expected ULSCH RX snr (for the stats) */
/* Power control: compute the expected ULSCH RX snr (for the stats) */
/* This is the normalized snr and this should be constant (regardless of mcs) */
/* This is the normalized snr and this should be constant (regardless of mcs) */
snr
=
(
5
*
UE_sched_ctrl
->
pusch_snr
[
CC_id
]
-
640
)
/
10
;
snr
=
(
5
*
UE_sched_ctrl
->
pusch_snr
_avg
[
CC_id
]
-
640
)
/
10
;
target_snr
=
eNB
->
puSch10xSnr
/
10
;
/* TODO: target_rx_power was 178, what to put? */
target_snr
=
eNB
->
puSch10xSnr
/
10
;
/* TODO: target_rx_power was 178, what to put? */
/* This assumes accumulated tpc */
/* This assumes accumulated tpc */
/* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */
/* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */
...
...
openair2/LAYER2/MAC/mac.h
View file @
3d385304
...
@@ -1000,6 +1000,7 @@ typedef struct {
...
@@ -1000,6 +1000,7 @@ typedef struct {
uint8_t
pucch3_cqi_update
[
NFAPI_CC_MAX
];
uint8_t
pucch3_cqi_update
[
NFAPI_CC_MAX
];
uint8_t
pucch3_snr
[
NFAPI_CC_MAX
];
uint8_t
pucch3_snr
[
NFAPI_CC_MAX
];
uint8_t
pusch_snr
[
NFAPI_CC_MAX
];
uint8_t
pusch_snr
[
NFAPI_CC_MAX
];
uint8_t
pusch_snr_avg
[
NFAPI_CC_MAX
];
uint16_t
feedback_cnt
[
NFAPI_CC_MAX
];
uint16_t
feedback_cnt
[
NFAPI_CC_MAX
];
uint16_t
timing_advance
;
uint16_t
timing_advance
;
uint16_t
timing_advance_r9
;
uint16_t
timing_advance_r9
;
...
...
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