Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
wangjie
OpenXG-RAN
Commits
631d345d
Commit
631d345d
authored
Mar 09, 2020
by
Francesco Mani
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
fix indentation and removing an if in scheduler
parent
98714f31
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
47 additions
and
49 deletions
+47
-49
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+47
-49
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
631d345d
...
...
@@ -321,67 +321,65 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Check if there are downlink symbols in the slot,
if
(
is_nr_DL_slot
(
cc
->
ServingCellConfigCommon
,
slot_txP
))
{
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
1
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
//mbsfn_status[CC_id] = 0;
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
1
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
//mbsfn_status[CC_id] = 0;
// clear vrb_maps
memset
(
cc
[
CC_id
].
vrb_map
,
0
,
100
);
memset
(
cc
[
CC_id
].
vrb_map_UL
,
0
,
100
);
// clear vrb_maps
memset
(
cc
[
CC_id
].
vrb_map
,
0
,
100
);
memset
(
cc
[
CC_id
].
vrb_map_UL
,
0
,
100
);
clear_nr_nfapi_information
(
RC
.
nrmac
[
module_idP
],
CC_id
,
frame_txP
,
slot_txP
);
}
clear_nr_nfapi_information
(
RC
.
nrmac
[
module_idP
],
CC_id
,
frame_txP
,
slot_txP
);
}
// refresh UE list based on UEs dropped by PHY in previous subframe
/*
for (i = 0; i < MAX_MOBILES_PER_GNB; i++) {
if (UE_list->active[i]) {
// refresh UE list based on UEs dropped by PHY in previous subframe
/*
for (i = 0; i < MAX_MOBILES_PER_GNB; i++) {
if (UE_list->active[i]) {
nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
rnti = 0;//UE_RNTI(module_idP, i);
CC_id = 0;//UE_PCCID(module_idP, i);
rnti = 0;//UE_RNTI(module_idP, i);
CC_id = 0;//UE_PCCID(module_idP, i);
} //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
*/
PROTOCOL_CTXT_SET_BY_MODULE_ID
(
&
ctxt
,
module_idP
,
ENB_FLAG_YES
,
NOT_A_RNTI
,
frame_txP
,
slot_txP
,
module_idP
);
} //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
*/
PROTOCOL_CTXT_SET_BY_MODULE_ID
(
&
ctxt
,
module_idP
,
ENB_FLAG_YES
,
NOT_A_RNTI
,
frame_txP
,
slot_txP
,
module_idP
);
// This schedules MIB
if
((
slot_txP
==
0
)
&&
(
frame_txP
&
7
)
==
0
){
schedule_nr_mib
(
module_idP
,
frame_txP
,
slot_txP
);
}
// This schedules MIB
if
((
slot_txP
==
0
)
&&
(
frame_txP
&
7
)
==
0
){
schedule_nr_mib
(
module_idP
,
frame_txP
,
slot_txP
);
}
// TbD once RACH is available, start ta_timer when UE is connected
if
(
ue_sched_ctl
->
ta_timer
)
ue_sched_ctl
->
ta_timer
--
;
if
(
ue_sched_ctl
->
ta_timer
==
0
)
{
gNB
->
ta_command
=
ue_sched_ctl
->
ta_update
;
/* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */
ue_sched_ctl
->
ta_timer
=
100
;
/* reset ta_update */
ue_sched_ctl
->
ta_update
=
31
;
/* MAC CE flag indicating TA length */
gNB
->
ta_len
=
2
;
}
// TbD once RACH is available, start ta_timer when UE is connected
if
(
ue_sched_ctl
->
ta_timer
)
ue_sched_ctl
->
ta_timer
--
;
if
(
ue_sched_ctl
->
ta_timer
==
0
)
{
gNB
->
ta_command
=
ue_sched_ctl
->
ta_update
;
/* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */
ue_sched_ctl
->
ta_timer
=
100
;
/* reset ta_update */
ue_sched_ctl
->
ta_update
=
31
;
/* MAC CE flag indicating TA length */
gNB
->
ta_len
=
2
;
}
if
(
is_nr_DL_slot
(
cc
->
ServingCellConfigCommon
,
slot_rxP
))
nr_schedule_RA
(
module_idP
,
frame_txP
,
slot_txP
);
// Phytest scheduling
if
(
phy_test
&&
slot_txP
==
1
){
//nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
// resetting ta flag
gNB
->
ta_len
=
0
;
}
// Phytest scheduling
if
(
phy_test
&&
slot_txP
==
1
){
//nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
// resetting ta flag
gNB
->
ta_len
=
0
;
}
/*
// Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0);
*/
/*
// Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0);
*/
}
//is_nr_DL_slot
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment