Commit 672937b4 authored by Ahmed Hussein's avatar Ahmed Hussein

Using SCF structs for DMRS at UE side instead of dmrs_UplinkConfig

parent c128e822
...@@ -357,8 +357,9 @@ static void UE_synch(void *arg) { ...@@ -357,8 +357,9 @@ static void UE_synch(void *arg) {
} }
void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
uint32_t rb_size, rb_start; uint32_t rb_size, rb_start;
uint8_t nr_of_symbols, start_symbol_index, mcs_index, mcs_table, nrOfLayers, harq_process_id, rv_index; uint8_t nr_of_symbols, start_symbol_index, mcs_index, mcs_table, nrOfLayers, harq_process_id, rv_index, dmrs_config_type;
uint16_t rnti, l_prime_mask; uint16_t rnti, l_prime_mask;
nr_dcireq_t dcireq; nr_dcireq_t dcireq;
...@@ -392,6 +393,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -392,6 +393,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
harq_process_id = 0; harq_process_id = 0;
rv_index = 0; rv_index = 0;
l_prime_mask = get_l_prime(nr_of_symbols, typeB, pusch_dmrs_pos0, pusch_len1); l_prime_mask = get_l_prime(nr_of_symbols, typeB, pusch_dmrs_pos0, pusch_len1);
dmrs_config_type = 0;
//------------------------------------------------------------------------------// //------------------------------------------------------------------------------//
scheduled_response.ul_config->slot = 8; scheduled_response.ul_config->slot = 8;
...@@ -403,6 +405,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -403,6 +405,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nr_of_symbols = nr_of_symbols; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nr_of_symbols = nr_of_symbols;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol_index; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol_index;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_index = mcs_index; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_index = mcs_index;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0;
......
...@@ -657,7 +657,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -657,7 +657,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
abstraction_flag = 0; abstraction_flag = 0;
fp->nb_antennas_tx = 1; fp->nb_antennas_tx = 1;
fp->nb_antennas_rx=1; fp->nb_antennas_rx=1;
dmrs_UplinkConfig_t *dmrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig; // dmrs_UplinkConfig_t *dmrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig;
ptrs_UplinkConfig_t *ptrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig; ptrs_UplinkConfig_t *ptrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig;
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx); printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST); //LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
...@@ -710,9 +710,9 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -710,9 +710,9 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
} }
//------------- config DMRS parameters--------------// //------------- config DMRS parameters--------------//
dmrs_Uplink_Config->pusch_dmrs_type = pusch_dmrs_type1; // dmrs_Uplink_Config->pusch_dmrs_type = pusch_dmrs_type1;
dmrs_Uplink_Config->pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0; // dmrs_Uplink_Config->pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0;
dmrs_Uplink_Config->pusch_maxLength = pusch_len1; // dmrs_Uplink_Config->pusch_maxLength = pusch_len1;
//-------------------------------------------------// //-------------------------------------------------//
ue->dmrs_DownlinkConfig.pdsch_dmrs_type = pdsch_dmrs_type1; ue->dmrs_DownlinkConfig.pdsch_dmrs_type = pdsch_dmrs_type1;
ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition = pdsch_dmrs_pos0; ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition = pdsch_dmrs_pos0;
......
...@@ -133,9 +133,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -133,9 +133,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
ulsch_ue = UE->ulsch[thread_id][gNB_id][cwd_index]; ulsch_ue = UE->ulsch[thread_id][gNB_id][cwd_index];
harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid]; harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid];
start_symbol = harq_process_ul_ue->pusch_pdu.start_symbol_index; start_symbol = harq_process_ul_ue->pusch_pdu.start_symbol_index;
ul_dmrs_symb_pos = harq_process_ul_ue->pusch_pdu.ul_dmrs_symb_pos; ul_dmrs_symb_pos = harq_process_ul_ue->pusch_pdu.ul_dmrs_symb_pos;
number_of_symbols = harq_process_ul_ue->pusch_pdu.nr_of_symbols; number_of_symbols = harq_process_ul_ue->pusch_pdu.nr_of_symbols;
dmrs_type = harq_process_ul_ue->pusch_pdu.dmrs_config_type;
for (i = start_symbol; i < start_symbol + number_of_symbols; i++) { for (i = start_symbol; i < start_symbol + number_of_symbols; i++) {
...@@ -146,7 +147,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -146,7 +147,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
rnti = harq_process_ul_ue->pusch_pdu.rnti; rnti = harq_process_ul_ue->pusch_pdu.rnti;
ulsch_ue->Nid_cell = Nid_cell; ulsch_ue->Nid_cell = Nid_cell;
nb_dmrs_re_per_rb = ((UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)?6:4); nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4);
N_RE_prime = NR_NB_SC_PER_RB*number_of_symbols - nb_dmrs_re_per_rb*number_dmrs_symbols - N_PRB_oh; N_RE_prime = NR_NB_SC_PER_RB*number_of_symbols - nb_dmrs_re_per_rb*number_dmrs_symbols - N_PRB_oh;
...@@ -271,7 +272,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -271,7 +272,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
pusch_dmrs = UE->nr_gold_pusch_dmrs[slot]; pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
n_dmrs = (nb_rb*nb_dmrs_re_per_rb*number_dmrs_symbols); n_dmrs = (nb_rb*nb_dmrs_re_per_rb*number_dmrs_symbols);
int16_t mod_dmrs[n_dmrs<<1]; int16_t mod_dmrs[n_dmrs<<1];
dmrs_type = UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type;
/////////// ///////////
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
...@@ -409,7 +409,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -409,7 +409,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
ulsch_ue->ptrs_symbols, ulsch_ue->ptrs_symbols,
start_sc, start_sc,
frame_parms->ofdm_symbol_size, frame_parms->ofdm_symbol_size,
UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type, dmrs_type,
ptrs_Uplink_Config->resourceElementOffset); ptrs_Uplink_Config->resourceElementOffset);
} }
......
...@@ -499,21 +499,18 @@ int main(int argc, char **argv) ...@@ -499,21 +499,18 @@ int main(int argc, char **argv)
uint16_t number_dmrs_symbols = 0; uint16_t number_dmrs_symbols = 0;
unsigned int available_bits; unsigned int available_bits;
uint8_t nb_re_dmrs; uint8_t nb_re_dmrs;
uint8_t length_dmrs = UE->pusch_config.dmrs_UplinkConfig.pusch_maxLength;
unsigned char mod_order; unsigned char mod_order;
uint16_t code_rate; uint16_t code_rate;
uint16_t l_prime_mask = get_l_prime(nb_symb_sch, UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type, pusch_dmrs_pos0, length_dmrs); uint8_t length_dmrs = pusch_len1; // [hna] remove dmrs struct
uint16_t l_prime_mask = get_l_prime(nb_symb_sch, typeB, pusch_dmrs_pos0, length_dmrs); // [hna] remove dmrs struct
for (i = 0; i < nb_symb_sch; i++) { for (i = 0; i < nb_symb_sch; i++) {
number_dmrs_symbols += (l_prime_mask >> i) & 0x01; number_dmrs_symbols += (l_prime_mask >> i) & 0x01;
} }
mod_order = nr_get_Qm_ul(Imcs, 0); mod_order = nr_get_Qm_ul(Imcs, 0);
nb_re_dmrs = ((UE->pusch_config.dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1) ? 6 : 4) * number_dmrs_symbols;
code_rate = nr_get_code_rate_ul(Imcs, 0); code_rate = nr_get_code_rate_ul(Imcs, 0);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, precod_nbr_layers);
printf("\n"); printf("\n");
...@@ -570,7 +567,6 @@ int main(int argc, char **argv) ...@@ -570,7 +567,6 @@ int main(int argc, char **argv)
pusch_pdu->pusch_data.rv_index = 0; pusch_pdu->pusch_data.rv_index = 0;
pusch_pdu->pusch_data.harq_process_id = 0; pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = 0; pusch_pdu->pusch_data.new_data_indicator = 0;
pusch_pdu->pusch_data.tb_size = TBS>>3;
pusch_pdu->pusch_data.num_cb = 0; pusch_pdu->pusch_data.num_cb = 0;
...@@ -593,16 +589,22 @@ int main(int argc, char **argv) ...@@ -593,16 +589,22 @@ int main(int argc, char **argv)
ul_config.ul_config_list[0].pusch_config_pdu.nr_of_symbols = nb_symb_sch; ul_config.ul_config_list[0].pusch_config_pdu.nr_of_symbols = nb_symb_sch;
ul_config.ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol; ul_config.ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol;
ul_config.ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask; ul_config.ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask;
ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type = 0;
ul_config.ul_config_list[0].pusch_config_pdu.mcs_index = Imcs; ul_config.ul_config_list[0].pusch_config_pdu.mcs_index = Imcs;
ul_config.ul_config_list[0].pusch_config_pdu.mcs_table = 0; ul_config.ul_config_list[0].pusch_config_pdu.mcs_table = 0;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0; ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = 0; ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = 0;
ul_config.ul_config_list[0].pusch_config_pdu.nrOfLayers = precod_nbr_layers; ul_config.ul_config_list[0].pusch_config_pdu.nrOfLayers = precod_nbr_layers;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.tb_size = TBS;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.harq_process_id = harq_pid; ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.harq_process_id = harq_pid;
//there are plenty of other parameters that we don't seem to be using for now. e.g. //there are plenty of other parameters that we don't seem to be using for now. e.g.
ul_config.ul_config_list[0].pusch_config_pdu.absolute_delta_PUSCH = 0; ul_config.ul_config_list[0].pusch_config_pdu.absolute_delta_PUSCH = 0;
nb_re_dmrs = ((ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type == pusch_dmrs_type1) ? 6 : 4) * number_dmrs_symbols;
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, precod_nbr_layers);
pusch_pdu->pusch_data.tb_size = TBS>>3;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.tb_size = TBS;
// set FAPI parameters for UE, put them in the scheduled response and call // set FAPI parameters for UE, put them in the scheduled response and call
nr_ue_scheduled_response(&scheduled_response); nr_ue_scheduled_response(&scheduled_response);
......
...@@ -143,6 +143,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, ...@@ -143,6 +143,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id,
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.transform_precoding = 0; ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.transform_precoding = 0;
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.num_dmrs_cdm_grps_no_data = 0; ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.num_dmrs_cdm_grps_no_data = 0;
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.dmrs_ports = 0; ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.dmrs_ports = 0;
ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.dmrs_config_type = 0;
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.n_front_load_symb = 0; //FIXME //ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.n_front_load_symb = 0; //FIXME
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.srs_config = 0; //FIXME //ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.srs_config = 0; //FIXME
//ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.csi_reportTriggerSize = 0; //FIXME //ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu.csi_reportTriggerSize = 0; //FIXME
......
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