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wangjie
OpenXG-RAN
Commits
82df0e51
Commit
82df0e51
authored
4 years ago
by
Sakthivel Velumani
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updated tables and 64qam mod
parent
f8675c25
dev
1
128-ues
256_QAM_demod
512-dataplane-bug-in-l2nfapi_nos1
FR2_NSA
Fix_SA_SIB1
NR-PHY-MAC-IF-multi-UE
NRPRACH_highSpeed_saankhya
NRUE_usedlschparallel
NR_10MHz
NR_2port_CSIRS
NR_CSIRS_tomerge
NR_CSI_reporting
NR_DLUL_PF
NR_DLUL_PF_4UL
NR_DLUL_PF_rebased
NR_DL_MIMO
NR_DL_sched_fixes
NR_DL_scheduler
NR_F1C_F1U_extensions
NR_FAPI_beamindex_SSB_RO
NR_FAPI_beamindex_SSB_RO_SEMPROJ
NR_FDD_FIX
NR_FR2_RA
NR_FR2_RRC_SSB
NR_FR2_initsync_fixes
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge-old
NR_MAC_SSB
NR_MAC_SSB_RO_GlobalEdge
NR_MAC_SSB_RO_UE_IDCC
NR_MAC_SSB_RO_merge
NR_MAC_TCI_UCI_GlobalEdge
NR_MCS_BLER
NR_NGAP
NR_PUCCH_MultiUE
NR_RA_cleanup
NR_RA_updates
NR_RRCConfiguration_FR2
NR_RRCReconfiguration_BWP
NR_SA_F1AP_5GRECORDS
NR_SA_F1AP_5GRECORDS-USIM
NR_SA_F1AP_5GRECORDS-wf-0623
NR_SA_F1AP_5GRECORDS_lts
NR_SA_F1AP_RFSIMULATOR
NR_SA_F1AP_RFSIMULATOR2
NR_SA_F1AP_RFSIMULATOR2_SRB
NR_SA_F1AP_RFSIMULATOR3
NR_SA_F1AP_RFSIMULATOR3_tmp
NR_SA_F1AP_RFSIMULATOR3_wf
NR_SA_F1AP_RFSIMULATOR_w5GCN
NR_SA_F1AP_dev
NR_SA_NGAP_RRC
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs
NR_SA_itti_sim_wk48_hs1
NR_SA_w5GCN_new_gtpu
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_SRB_Config
NR_UE_CONFIG_REQ_FIXES
NR_UE_MAC_scheduler
NR_UE_PUCCH_bugfixes
NR_UE_RA_fixes
NR_UE_SA
NR_UE_SSB_meas
NR_UE_UL_DCI_improvements
NR_UE_dlsch_bugfix
NR_UE_enable_parallelization
NR_UE_rework_test
NR_UE_reworking_UCI_procedures
NR_UE_stability_fixes
NR_UL_SCFDMA_100MHz
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_Wireshark
NR_beam_simulation
NR_cleanup_PUCCH_resources
NR_gNB_initial_MIB_fix
NR_mac_uci_functions_rework
NR_multiplexing_HARQ_CSI_PUCCH
NR_new_ul_antennaports
NR_phytest_bugfixes
NR_reworking_UL_antennaports
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_scheduling_request3
PBCHNRTCFIX
PUSCH_TA_update
RA_CI_test
RFquality
Saankhya_NRPRACH_HighSpeed
Test_SA_5GREC
UE_DL_DCI_hotfix
add-dmrs-test
add-ru-docker-image
avxllr
bandwidth-testing
bch-fixes-bitmap
benetel_5g_prach_fix
benetel_config_file_fix
benetel_dpdk20
benetel_driver_uldl_pf_merge
benetel_driver_update
benetel_fixes
benetel_phase_rotation
benetel_phase_rotation_old
bsr-fix
bugfix-free-ra-process
bugfix-nr-bands
bugfix-nr-ldpc-post-processing
bugfix-nr-ldpc-size-typo
bugfix-nr-pdcp-sn-size
bugfix-nr-rate-matching-assertion
bugfix-nr-t-reordering
bugfix-x2-SgNBAdditionRequest
bugfix_gnb_rt_stats_html
bupt-sa-merge
cce_indexing_fix
cce_indexing_fix2
ci-add-sabox-support
ci-deploy-asterix
ci-deploy-docker-compose
ci-fix-module-ul-iperf
ci-new-docker-pipeline
ci-reduce-nb-vms
ci-test
ci-ul-iperf-from-trf-container
ci_benetel_longrun_limits
ci_benetel_test
ci_fix_iperf_for_module
ci_hotfix_module_ue_ip_address
ci_improve_module_ctl
ci_nsa_2x2_implem
ci_nsa_benetel
ci_nsa_fixes
ci_nsa_pipes_improve
ci_nsa_test_integration_2021_wk19
ci_nsa_traces
ci_nsa_uplink
ci_phytest
ci_quectel_support
ci_sa_rfsim_test
ci_solve_ul_for_module
ci_test_5GREC
ci_test_nsa_2x2
ci_test_nsa_fix_quectel_nic
ci_test_nsa_on_develop
ci_test_ra_fr2
ci_testinfra_as_code
ci_update_build_nasmesh
ci_vm_resource_fix
cleanup_softmodem_main
code-cleanup-20210716
constant_power
debug-UL-5GRECORDS
debug_UL_signal
detached-w16-test
develop
develop-CBRA-v3
develop-CCE
develop-NR_SA_F1AP_5GRECORDS
develop-NR_SA_F1AP_5GRECORDS-abs
develop-NR_SA_F1AP_5GRECORDS-hs
develop-NR_SA_F1AP_5GRECORDS-hs1
develop-NR_SA_F1AP_5GRECORDS-lts
develop-NR_SA_F1AP_5GRECORDS-lts-wf
develop-NR_SA_F1AP_5GRECORDS-v3
develop-NR_SA_F1AP_5GRECORDS_100M
develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA
develop-NR_SA_F1AP_5GRECORDS_lfq_0607
develop-NSA_SA_fixes
develop-SA-CBRA
develop-SA-CBRA-CUDU
develop-SA-CBRA-Msg5
develop-SA-CBRA-lts
develop-SA-CBRA-ulsch-lts
develop-SA-RA
develop-SnT
develop-aw2sori
develop-oriecpriupdates
develop-sib1
develop-sib1-local
develop-sib1-lts
develop-sib1-update
develop-sib1-update-test1
develop-sib1-update-ue
develop-wf-du
develop_fpga_ldpc
develop_stable
dfts_alternatives
disable_CSI_measrep
dlsch_parallel
docker-improvements-2021-april
docker-no-cache-option
dongzhanyi-zte-develop1
dongzhanyi-zte-develop2
enhance-rfsim
episys-merge
episys/nsa_baseline
episys/nsa_development
feature/make-s1-mme-port-configurable
feature/make-s1-mme-port-configurable-with-astyle-fixes
fedora-gen-kernel-fix
fft_bench_hotfix
finalize-oaicn-integration
fix-check
fix-ci-tun
fix-compile
fix-itti-segv
fix-lte-ue-modem-in-docker-container
fix-nr-pdcp-timer
fix-nr-rlc-range-nack
fix-physim-deploy
fix-physim-run-script-on-cluster
fix-quectel
fix-realtime
fix-retransmission-rbg
fix-x2-without-gnb
fix_NR_DLUL_PF
fix_NR_DLUL_PF_benchmark
fix_coreset_dmrs_idx
fix_do_ra_data
fix_nr_ulsim
fix_pdsch_low_prb
fix_rb_corruption
fix_reestablishment
fix_rrc_x2_ticking
fixes-CE-RLC-PDU-size
fixes-mac-sched-nfapi
fixes-mac-sched-tun
fixes-tun
fixgtpu
flexran-apps
flexran-repair-mme-mgmt
flexran-rtc-repo-is-public
fujitsu_lte_contribution
fujitsu_lte_contribution-128
git-dashboard
gnb-freerun-txru
gnb-n300-fixes
gnb-only-test
gnb-realtime-hotfix
gnb-realtime-quickfix
gnb-threadpool
hack-bch-no-sched-sf-0
hack-exit-gnb-when-no-enb-nsa
harq-hotfix
hotfix-minor-remove-nr-rlc-cppcheck-error
hotfix-nr-rlc-tick
improve_nr_modulation
integ-w13-test-rt-issue
integration_2020_wk15
integration_2020_wk40
integration_2020_wk41
integration_2020_wk42_2
integration_2020_wk45
integration_2020_wk45_2
integration_2020_wk46
integration_2020_wk46_2
integration_2020_wk47
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
integration_2021_wk04
integration_2021_wk05
integration_2021_wk06
integration_2021_wk06_MR978
integration_2021_wk06_b
integration_2021_wk06_c
integration_2021_wk08
integration_2021_wk08_2
integration_2021_wk08_MR963
integration_2021_wk09
integration_2021_wk09_b
integration_2021_wk10
integration_2021_wk10_b
integration_2021_wk11
integration_2021_wk12
integration_2021_wk12_b
integration_2021_wk13_a
integration_2021_wk13_b
integration_2021_wk13_b_fix_tdas
integration_2021_wk13_b_fixed
integration_2021_wk13_c
integration_2021_wk14_a
integration_2021_wk15_a
integration_2021_wk16
integration_2021_wk17_a
integration_2021_wk17_b
integration_2021_wk18_a
integration_2021_wk18_b
integration_2021_wk19
integration_2021_wk20_a
integration_2021_wk22
integration_2021_wk23
integration_2021_wk27
integration_2021_wk28
integration_2021_wk30
integration_2021_wk30_b
integration_w5GC_CBRA_test
inter-RRU-final
itti-enhancement
ldpc-decoder-codegen
ldpc-decoder-codegen2
ldpc_offload_t1
ldpc_short_codeword_fixes
load_gnb
lte-ulsch-bugfix
lte_uplink_improvement
mac-fixes-wk45_2
migrate-cpp-check-container
migrate-vm-pipeline-to-bionic
minor-fix-doc-basic-sim
mosaic5g-oai-ran
mosaic5g-oai-sim
msg4_phy_0303_lfq
multiple_ssb_sib1_bugfix
nasmesh_kernel_5.8
new-gtpu
nfapi_nr_arch_mod
nfapi_nr_develop
nfapi_nr_develop_new
ngap-dlul
ngap-support
ngap-w48-merge2
ngap-wf
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1120-srb-gtp-yhz
ngap-wf-1203-yunsdr
ngap-wf-liuyu
ngap_lfq_1120
ngap_merge
noCore
nr-bsr-fix
nr-dl-mimo-2layer
nr-dmrs-fixes
nr-mac-pdu-wireshark
nr-mac-remove-ue-list
nr-pdcp-benchmarking
nr-pdcp-improvements
nr-pdcp-nea2-security
nr-pdcp-nia2-integrity
nr-pdcp-small-bugfixes
nr-pdcp-srb-integrity
nr-ra-fix
nr-rlc-am-bugfix-w44
nr-rlc-bugfix-w44
nr-stats-print
nrPBCHTCFix
nrPbchTcFix
nrUE
nrUE-hs
nrUE-upper-layer
nr_bsr
nr_dl_dmrs_type2
nr_dl_pf
nr_dl_pf2
nr_dl_ul_ptrs
nr_fdd_if_fix
nr_improve_chanest
nr_power_measurement_fixes
nr_prach_fr2
nr_ue_msg3
nr_ue_pdcp_fix
nr_ue_remove_high_speed_flag
nr_ue_tti_cleanup
nr_ul_pf
nr_ul_scfdma
nsa-ue
nsa_remove_band_hardcodings
oai-sim
oairu
oairu-dockerfile-support
oc-docker-october-improvements
openxg/develop
phy-asan-fixes
physim-build-deploy
physim-deploy-handle-error-cases
prb_based_dl_channel_estimation
ptrs_rrc_config
pusch-mthread-scaling-fix
pusch-retrans-fix-ue
ra-dl-ul
recursive-cmake
remove_nos1_hack_pdcp
remove_x2_gnb_hardcoding
repair-TA
revert_memcpy
rh-ci-add-ue-parallelization
rh_ci_add_runtime_stats
rh_ci_add_uldlharq_stats
rh_ci_fix_autoterminate
rh_ci_fr1_update
rh_ci_gsheet_rt_monitoring
rh_ci_nsa2jenkins
rh_ci_nsa_test_n310
rh_ci_oc
rh_ci_phy_test_improve
rh_ci_py
rh_ci_ra_fr2
rh_ci_rfsim_ra
rh_ci_test_benetel
rh_ci_test_nsa
rh_ci_test_nsa_wk16
rh_ci_test_nsa_wk17_b
rh_ci_test_nsa_wk17b
rh_ci_test_rfsim_sa
rh_ci_ue_parallel
rh_fr1_newjenkins
rh_fr1_update
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rohan_ulsim2RxFix
rrc-enb-phy-testmode
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
s1ap-bugfix-rab_setup
sa-demo
sa-demo-hs
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
sanitize-address
sanitize-v1
sanitize-v1-tmp
sarma_pvnp_oai
scs_60_iisc
sim-channels
small-bugfixes-w40
small-config-change
small_nr_bugfixes
t-gnb-tracer
test-5GREC
test-nsa-benetel
test-panos
test_nsa_gtpu_fix
test_rt-fix_phy-test
testing_with_external_txdata
ue-dci-false-detection
ue-fixes
ue-pdsch-pusch-parallel
ue-race-fix
ue_beam_selection
ul-freq-iq-samps-to-file
ul_dl_dci_same_slot
ulsch_decode_mthread
ulsim_changes
usrp_stop_cleanly
usrp_x400
wf-sa-rrc
wf_testc
wireshark-T-hack-ueid
wireshark-log-scheduling-requests
wk11-with-phytest
x2-endc-processing
x2_handle_sctp_shutdown
xiangwab
xiangwan
xw2
yihongzheng_srb
zzs
2021.wk14_a
2021.wk13_d
2021.wk13_c
2021.w30
2021.w29
2021.w28
2021.w27
2021.w26
2021.w25
2021.w24
2021.w23
2021.w22
2021.w20
2021.w19
2021.w18_b
2021.w18_a
2021.w17_b
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
2021.w06
2021.w05
2021.w04
2021.w02
2020.w51_2
2020.w51
2020.w50
2020.w49
2020.w48_2
2020.w48
2020.w47
2020.w46_2
2020.w46
2020.w45_2
2020.w45
2020.w44
2020.w42_2
2020.w42
2020.w41
2020.w39
2020.w38
2020.w37
2020.w36
2020.w34
benetel_phase_rotation
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
No related merge requests found
Changes
7
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7 changed files
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113 additions
and
44 deletions
+113
-44
cmake_targets/CMakeLists.txt
cmake_targets/CMakeLists.txt
+1
-0
openair1/PHY/INIT/nr_init.c
openair1/PHY/INIT/nr_init.c
+1
-0
openair1/PHY/MODULATION/nr_modulation.c
openair1/PHY/MODULATION/nr_modulation.c
+83
-24
openair1/PHY/NR_REFSIG/nr_mod_table.h
openair1/PHY/NR_REFSIG/nr_mod_table.h
+8
-3
openair1/PHY/NR_REFSIG/nr_refsig.h
openair1/PHY/NR_REFSIG/nr_refsig.h
+2
-0
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+1
-1
openair1/SIMULATION/NR_PHY/dlsim.c
openair1/SIMULATION/NR_PHY/dlsim.c
+17
-16
No files found.
cmake_targets/CMakeLists.txt
View file @
82df0e51
...
...
@@ -1543,6 +1543,7 @@ set(PHY_SRC_UE
${
OPENAIR1_DIR
}
/PHY/NR_REFSIG/nr_dmrs_rx.c
${
OPENAIR1_DIR
}
/PHY/NR_REFSIG/nr_gold.c
${
OPENAIR1_DIR
}
/PHY/NR_REFSIG/scrambling_luts.c
${
OPENAIR1_DIR
}
/PHY/NR_REFSIG/nr_gen_mod_table.c
${
OPENAIR1_DIR
}
/PHY/NR_REFSIG/dmrs_nr.c
${
OPENAIR1_DIR
}
/PHY/NR_REFSIG/ptrs_nr.c
${
OPENAIR1_DIR
}
/PHY/NR_UE_ESTIMATION/filt16a_32.c
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/INIT/nr_init.c
View file @
82df0e51
...
...
@@ -132,6 +132,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
}
nr_generate_modulation_table
();
nr_init_pdcch_dmrs
(
gNB
,
cfg
->
cell_config
.
phy_cell_id
.
value
);
nr_init_pbch_interleaver
(
gNB
->
nr_pbch_interleaver
);
//PDSCH DMRS init
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/MODULATION/nr_modulation.c
View file @
82df0e51
...
...
@@ -34,64 +34,123 @@ void nr_modulation(uint32_t *in,
int32_t
*
nr_mod_table32
;
int32_t
*
out32
=
(
int32_t
*
)
out
;
uint8_t
*
in_bytes
=
(
uint8_t
*
)
in
;
uint64_t
*
in64
=
(
uint64_t
*
)
in
;
int64_t
*
out64
=
(
int64_t
*
)
out
;
uint8_t
idx
;
uint16_t
u
=
1
;
uint8_t
shift_lut
[
3
]
=
{
0
,
2
,
4
};
uint32_t
i
,
j
;
uint32_t
bit_cnt
;
uint64_t
x
,
x1
,
x2
;
#if defined(__SSE2__)
#if defined(__AVX2__)
uint16_t
*
in_2bytes
=
(
uint16_t
*
)
in
;
__m256i
*
nr_mod_table256
;
__m256i
*
out256
;
#elif defined(__SSE2__)
__m128i
*
nr_mod_table128
;
__m128i
*
out128
;
__m64
*
nr_mod_table64
;
__m64
*
out64
;
#endif
offset
=
(
mod_order
==
2
)
?
NR_MOD_TABLE_QPSK_OFFSET
:
(
mod_order
==
4
)
?
NR_MOD_TABLE_QAM16_OFFSET
:
\
(
mod_order
==
6
)
?
NR_MOD_TABLE_QAM64_OFFSET
:
(
mod_order
==
8
)
?
NR_MOD_TABLE_QAM256_OFFSET
:
0
;
LOG_
D
(
PHY
,
"nr_modulation: length %d, mod_order %d
\n
"
,
length
,
mod_order
);
LOG_
I
(
PHY
,
"nr_modulation: length %d, mod_order %d
\n
"
,
length
,
mod_order
);
switch
(
mod_order
)
{
case
6
:
nr_mod_table32
=
(
int32_t
*
)
nr_mod_table
;
for
(
int
i
=
0
;
i
<
length
/
mod_order
;
i
++
)
{
idx
=
((
in
[
i
*
mod_order
/
32
]
>>
((
i
*
mod_order
)
&
0x1f
))
&
mask
);
if
((((
i
+
1
)
*
mod_order
)
>
32
*
u
)
&&
(
i
!=
0
))
idx
|=
(
in
[(
i
*
mod_order
/
32
)
+
1
]
<<
shift_lut
[(
u
++
)
%
3
])
&
0x3f
;
else
if
(((
i
+
1
)
*
mod_order
)
==
32
*
u
)
u
++
;
out32
[
i
]
=
nr_mod_table32
[(
offset
+
idx
)];
j
=
0
;
for
(
i
=
0
;
i
<
length
/
192
;
i
++
)
{
x
=
in64
[
i
*
3
];
x1
=
x
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x
>>
12
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x
>>
24
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x
>>
36
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x
>>
48
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x2
=
(
x
>>
60
);
x
=
in64
[
i
*
3
+
1
];
x2
|=
x
<<
4
;
x1
=
x2
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x2
>>
12
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x2
>>
24
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x2
>>
36
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x2
>>
48
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x2
=
((
x
>>
56
)
&
0xf0
)
|
(
x2
>>
60
);
x
=
in64
[
i
*
3
+
2
];
x2
|=
x
<<
8
;
x1
=
x2
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x2
>>
12
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x2
>>
24
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x2
>>
36
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x2
>>
48
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x2
=
((
x
>>
52
)
&
0xff0
)
|
(
x2
>>
60
);
out64
[
j
++
]
=
nr_64qam_mod_table
[
x2
];
}
i
*=
24
;
bit_cnt
=
i
*
8
;
while
(
bit_cnt
<
length
)
{
x
=
*
((
uint32_t
*
)(
in_bytes
+
i
));
x1
=
x
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
x1
=
(
x
>>
12
)
&
4095
;
out64
[
j
++
]
=
nr_64qam_mod_table
[
x1
];
i
+=
3
;
bit_cnt
+=
24
;
}
return
;
case
8
:
nr_mod_table32
=
(
int32_t
*
)
nr_mod_table
;
for
(
i
nt
i
=
0
;
i
<
length
/
8
;
i
++
)
for
(
i
=
0
;
i
<
length
/
8
;
i
++
)
out32
[
i
]
=
nr_mod_table32
[(
offset
+
in_bytes
[
i
])];
return
;
#if defined(__SSE2__)
#if defined(__AVX2__)
case
2
:
nr_mod_table256
=
(
__m256i
*
)
nr_qpsk_2byte_mod_table
;
out256
=
(
__m256i
*
)
out
;
for
(
i
=
0
;
i
<
length
/
16
;
i
++
)
out256
[
i
]
=
nr_mod_table256
[
in_2bytes
[
i
]];
if
(
length
%
16
)
out256
[
i
+
1
]
=
nr_mod_table256
[
in_2bytes
[
i
]];
return
;
#elif defined(__SSE2__)
case
2
:
nr_mod_table128
=
(
__m128i
*
)
nr_qpsk_byte_mod_table
;
out128
=
(
__m128i
*
)
out
;
for
(
i
nt
i
=
0
;
i
<
length
/
8
;
i
++
)
for
(
i
=
0
;
i
<
length
/
8
;
i
++
)
out128
[
i
]
=
nr_mod_table128
[
in_bytes
[
i
]];
if
(
length
%
8
)
out128
[
i
+
1
]
=
nr_mod_table128
[
in_bytes
[
i
]];
return
;
#endif
case
4
:
nr_mod_table64
=
(
__m64
*
)
nr_qam16_byte_mod_table
;
out64
=
(
__m64
*
)
out
;
out64
=
(
int64_t
*
)
out
;
for
(
int
i
=
0
;
i
<
length
/
8
;
i
++
)
out64
[
i
]
=
nr_
mod_table64
[
in_bytes
[
i
]];
out64
[
i
]
=
nr_
16qam_byte_mod_table
[
in_bytes
[
i
]];
return
;
#endif
default:
break
;
}
nr_mod_table32
=
(
int32_t
*
)
nr_mod_table
;
nr_mod_table32
=
(
int32_t
*
)
nr_
qpsk_
mod_table
;
for
(
int
i
=
0
;
i
<
length
/
mod_order
;
i
++
)
{
idx
=
((
in
[
i
*
mod_order
/
32
]
>>
((
i
*
mod_order
)
&
0x1f
))
&
mask
);
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/NR_REFSIG/nr_mod_table.h
View file @
82df0e51
This diff is collapsed.
Click to expand it.
openair1/PHY/NR_REFSIG/nr_refsig.h
View file @
82df0e51
...
...
@@ -53,6 +53,8 @@ int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
void
init_scrambling_luts
(
void
);
void
nr_generate_modulation_table
(
void
);
extern
__m64
byte2m64_re
[
256
];
extern
__m64
byte2m64_im
[
256
];
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
View file @
82df0e51
...
...
@@ -150,7 +150,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
nb_re
=
((
12
*
rel15
->
NrOfSymbols
)
-
nb_re_dmrs
-
xOverhead
)
*
rel15
->
rbSize
*
rel15
->
NrOfCodewords
;
uint8_t
Qm
=
rel15
->
qamModOrder
[
0
];
uint32_t
encoded_length
=
nb_re
*
Qm
;
int16_t
mod_dmrs
[
n_dmrs
<<
1
];
int16_t
mod_dmrs
[
n_dmrs
<<
1
]
__attribute__
((
aligned
(
256
)))
;
/// CRC, coding, interleaving and rate matching
AssertFatal
(
harq
->
pdu
!=
NULL
,
"harq->pdu is null
\n
"
);
...
...
This diff is collapsed.
Click to expand it.
openair1/SIMULATION/NR_PHY/dlsim.c
View file @
82df0e51
...
...
@@ -926,22 +926,6 @@ int main(int argc, char **argv)
printf
(
"SNR %f : n_errors (negative CRC) = %d/%d, Avg round %.2f, Channel BER %e, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %d bits/slot
\n
"
,
SNR
,
n_errors
,
n_trials
,
roundStats
[
snrRun
],(
double
)
errors_scrambling
/
available_bits
/
n_trials
,
effRate
,
effRate
/
TBS
*
100
,
TBS
);
printf
(
"
\n
"
);
if
(
n_trials
==
1
)
{
LOG_M
(
"rxsig0.m"
,
"rxs0"
,
UE
->
common_vars
.
rxdata
[
0
],
frame_length_complex_samples
,
1
,
1
);
if
(
UE
->
frame_parms
.
nb_antennas_rx
>
1
)
LOG_M
(
"rxsig1.m"
,
"rxs1"
,
UE
->
common_vars
.
rxdata
[
1
],
frame_length_complex_samples
,
1
,
1
);
LOG_M
(
"chestF0.m"
,
"chF0"
,
UE
->
pdsch_vars
[
0
][
0
]
->
dl_ch_estimates_ext
,
N_RB_DL
*
12
*
14
,
1
,
1
);
write_output
(
"rxF_comp.m"
,
"rxFc"
,
&
UE
->
pdsch_vars
[
0
][
0
]
->
rxdataF_comp0
[
0
][
0
],
N_RB_DL
*
12
*
14
,
1
,
1
);
break
;
}
//if ((float)n_errors/(float)n_trials <= target_error_rate) {
if
(
effRate
>=
(
eff_tp_check
*
TBS
))
{
printf
(
"PDSCH test OK
\n
"
);
break
;
}
if
(
print_perf
==
1
)
{
printf
(
"
\n
gNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))
\n
"
,
1000
>>*
scc
->
ssbSubcarrierSpacing
,
dlsch_config
.
rbSize
,
dlsch_config
.
mcsIndex
[
0
],
...
...
@@ -992,6 +976,23 @@ int main(int argc, char **argv)
printStatIndent2(&UE->dlsch_tc_intl2_stats,"intl2+HardDecode+CRC");
*/
}
if
(
n_trials
==
1
)
{
LOG_M
(
"rxsig0.m"
,
"rxs0"
,
UE
->
common_vars
.
rxdata
[
0
],
frame_length_complex_samples
,
1
,
1
);
if
(
UE
->
frame_parms
.
nb_antennas_rx
>
1
)
LOG_M
(
"rxsig1.m"
,
"rxs1"
,
UE
->
common_vars
.
rxdata
[
1
],
frame_length_complex_samples
,
1
,
1
);
LOG_M
(
"chestF0.m"
,
"chF0"
,
UE
->
pdsch_vars
[
0
][
0
]
->
dl_ch_estimates_ext
,
N_RB_DL
*
12
*
14
,
1
,
1
);
write_output
(
"rxF_comp.m"
,
"rxFc"
,
&
UE
->
pdsch_vars
[
0
][
0
]
->
rxdataF_comp0
[
0
][
0
],
N_RB_DL
*
12
*
14
,
1
,
1
);
break
;
}
//if ((float)n_errors/(float)n_trials <= target_error_rate) {
if
(
effRate
>=
(
eff_tp_check
*
TBS
))
{
printf
(
"PDSCH test OK
\n
"
);
break
;
}
snrRun
++
;
}
// NSR
...
...
This diff is collapsed.
Click to expand it.
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