Commit c3fc5ecd authored by ChiehChun's avatar ChiehChun

Change pre_precessor_ul type to bool

- To check the current slot is the scheduled slot and
  only execute the post processor in scheduled slot.
parent 38ab9b4d
...@@ -352,7 +352,7 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -352,7 +352,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
vrb_map[rb + sched_ctrl->rbStart] = 1; vrb_map[rb + sched_ctrl->rbStart] = 1;
} }
void nr_ul_preprocessor_phytest(module_id_t module_id, bool nr_ul_preprocessor_phytest(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd, int num_slots_per_tdd,
...@@ -368,7 +368,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, ...@@ -368,7 +368,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
__func__, __func__,
UE_info->num_UEs); UE_info->num_UEs);
if (UE_info->num_UEs == 0) if (UE_info->num_UEs == 0)
return; return false;
const int UE_id = 0; const int UE_id = 0;
const int CC_id = 0; const int CC_id = 0;
...@@ -389,7 +389,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, ...@@ -389,7 +389,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
* limitations). Note that if K2 or the TDD configuration is changed, below * limitations). Note that if K2 or the TDD configuration is changed, below
* conditions might exclude each other and never be true */ * conditions might exclude each other and never be true */
if (!(is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && sched_slot == 8)) if (!(is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && sched_slot == 8))
return; return false;
const uint16_t rbStart = 0; const uint16_t rbStart = 0;
const uint16_t rbSize = 50; /* due to OAI UE limitations */ const uint16_t rbSize = 50; /* due to OAI UE limitations */
...@@ -403,7 +403,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, ...@@ -403,7 +403,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
frame, frame,
slot, slot,
i); i);
return; return false;
} }
} }
...@@ -430,7 +430,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, ...@@ -430,7 +430,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
nr_of_candidates); nr_of_candidates);
if (sched_ctrl->cce_index < 0) { if (sched_ctrl->cce_index < 0) {
LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__);
return; return false;
} }
UE_info->num_pdcch_cand[UE_id][cid]++; UE_info->num_pdcch_cand[UE_id][cid]++;
...@@ -479,4 +479,5 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, ...@@ -479,4 +479,5 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
/* mark the corresponding RBs as used */ /* mark the corresponding RBs as used */
for (int rb = rbStart; rb < rbStart + rbSize; rb++) for (int rb = rbStart; rb < rbStart + rbSize; rb++)
vrb_map_UL[rb] = 1; vrb_map_UL[rb] = 1;
return true;
} }
...@@ -699,7 +699,7 @@ void pf_ul(module_id_t module_id, ...@@ -699,7 +699,7 @@ void pf_ul(module_id_t module_id,
} }
} }
void nr_simple_ulsch_preprocessor(module_id_t module_id, bool nr_simple_ulsch_preprocessor(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd, int num_slots_per_tdd,
...@@ -715,7 +715,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, ...@@ -715,7 +715,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
__func__, __func__,
UE_info->num_UEs); UE_info->num_UEs);
if (UE_info->num_UEs == 0) if (UE_info->num_UEs == 0)
return; return false;
const int CC_id = 0; const int CC_id = 0;
...@@ -733,7 +733,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, ...@@ -733,7 +733,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd);
const int sched_slot = (slot + K2) % num_slots_per_tdd; const int sched_slot = (slot + K2) % num_slots_per_tdd;
if (!is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot)) if (!is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot))
return; return false;
sched_ctrl->sched_pusch.slot = sched_slot; sched_ctrl->sched_pusch.slot = sched_slot;
sched_ctrl->sched_pusch.frame = sched_frame; sched_ctrl->sched_pusch.frame = sched_frame;
...@@ -775,6 +775,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, ...@@ -775,6 +775,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
len, len,
rballoc_mask, rballoc_mask,
2); 2);
return true;
} }
void nr_schedule_ulsch(module_id_t module_id, void nr_schedule_ulsch(module_id_t module_id,
...@@ -783,8 +784,10 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -783,8 +784,10 @@ void nr_schedule_ulsch(module_id_t module_id,
int num_slots_per_tdd, int num_slots_per_tdd,
int ul_slots, int ul_slots,
uint64_t ulsch_in_slot_bitmap) { uint64_t ulsch_in_slot_bitmap) {
RC.nrmac[module_id]->pre_processor_ul( bool do_sched = RC.nrmac[module_id]->pre_processor_ul(
module_id, frame, slot, num_slots_per_tdd, ulsch_in_slot_bitmap); module_id, frame, slot, num_slots_per_tdd, ulsch_in_slot_bitmap);
if (!do_sched)
return;
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
......
...@@ -96,7 +96,7 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -96,7 +96,7 @@ void nr_schedule_ulsch(module_id_t module_id,
int ul_slots, int ul_slots,
uint64_t ulsch_in_slot_bitmap); uint64_t ulsch_in_slot_bitmap);
void nr_simple_ulsch_preprocessor(module_id_t module_id, bool nr_simple_ulsch_preprocessor(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd, int num_slots_per_tdd,
...@@ -154,7 +154,7 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -154,7 +154,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
int num_slots_per_tdd); int num_slots_per_tdd);
/* \brief UL preprocessor for phytest: schedules UE_id 0 with fixed MCS on a /* \brief UL preprocessor for phytest: schedules UE_id 0 with fixed MCS on a
* fixed set of resources */ * fixed set of resources */
void nr_ul_preprocessor_phytest(module_id_t module_id, bool nr_ul_preprocessor_phytest(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd, int num_slots_per_tdd,
......
...@@ -487,7 +487,7 @@ typedef void (*nr_pp_impl_dl)(module_id_t mod_id, ...@@ -487,7 +487,7 @@ typedef void (*nr_pp_impl_dl)(module_id_t mod_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd); int num_slots_per_tdd);
typedef void (*nr_pp_impl_ul)(module_id_t mod_id, typedef bool (*nr_pp_impl_ul)(module_id_t mod_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd, int num_slots_per_tdd,
......
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