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Commit cf5bc231 authored by Francesco Mani's avatar Francesco Mani
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scheduling dl in both half frames

parent 4e12c394
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Showing with 29 additions and 21 deletions
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ cf5bc231
......@@ -291,7 +291,8 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
void nr_schedule_pucch(int Mod_idP,
int UE_id,
frame_t frameP,
sub_frame_t slotP) {
sub_frame_t slotP,
int num_slots_per_tdd) {
uint16_t O_uci;
uint16_t O_ack;
......@@ -306,12 +307,13 @@ void nr_schedule_pucch(int Mod_idP,
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
NR_sched_pucch *curr_pucch;
int p = slotP/num_slots_per_tdd;
int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
nr_ulmix_slots++;
for (int k=0; k<nr_ulmix_slots; k++) {
curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k];
curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[p][k];
if ((curr_pucch->dai_c > 0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) {
UL_tti_req->SFN = frameP;
UL_tti_req->Slot = slotP;
......@@ -333,7 +335,9 @@ void nr_schedule_pucch(int Mod_idP,
O_ack,
SR_flag);
curr_pucch->dai_c = 0;
memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[p][k],
0,
sizeof(NR_sched_pucch));
}
}
}
......@@ -377,14 +381,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
nr_ulmix_slots++;
if (slot_txP== 0 && (UE_list->fiveG_connected[UE_id] || get_softmodem_params()->phy_test)) {
for (int k=0; k<nr_ulmix_slots; k++) {
memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k],
0,
sizeof(NR_sched_pucch));
}
}
start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
......@@ -397,12 +393,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
dlsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch
ulsch_in_slot_bitmap = &RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[UE_id].ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
// hardcoding dlsch to be in slot 1
if (!(slot_txP%num_slots_per_tdd)) {
if(slot_txP==0)
*dlsch_in_slot_bitmap = 0x7e;
else
*dlsch_in_slot_bitmap = 0x00;
*dlsch_in_slot_bitmap = 0x7e;
}
// hardcoding ulsch to be in slot 8
......@@ -469,7 +464,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (UE_list->fiveG_connected[UE_id] && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%num_slots_per_tdd))) {
ue_sched_ctl->current_harq_pid = slot_txP % num_slots_per_tdd;
nr_update_pucch_scheduling(module_idP, UE_id, frame_txP, slot_txP, num_slots_per_tdd,&pucch_sched);
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, &UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched], NULL);
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,
&UE_list->UE_sched_ctrl[UE_id].sched_pucch[slot_txP/num_slots_per_tdd][pucch_sched], NULL);
// resetting ta flag
gNB->ta_len = 0;
}
......@@ -486,12 +482,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (get_softmodem_params()->phy_test == 0) {
if (UE_list->fiveG_connected[UE_id])
nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP, num_slots_per_tdd);
schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
}
if (get_softmodem_params()->phy_test){
nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP, num_slots_per_tdd);
if (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%num_slots_per_tdd)){
nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
}
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @ cf5bc231
......@@ -370,7 +370,6 @@ int configure_fapi_dl_pdu(int Mod_idP,
dci_pdu_rel15[0].ndi = UE_list->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].ndi;
// DAI
dci_pdu_rel15[0].dai[0].val = (pucch_sched->dai_c-1)&3;
// TPC for PUCCH
dci_pdu_rel15[0].tpc = 1; // table 7.2.1-1 in 38.213
// PUCCH resource indicator
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ cf5bc231
......@@ -1328,11 +1328,13 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
int UE_id;
int i;
int i,p;
NR_UE_list_t *UE_list = &RC.nrmac[mod_idP]->UE_list;
NR_COMMON_channels_t *cc = RC.nrmac[mod_idP]->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int num_slots_ul = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
int nb_periods = 1<<(7-scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0)
num_slots_ul++;
LOG_I(MAC, "[gNB %d] Adding UE with rnti %x (next avail %d, num_UEs %d)\n",
......@@ -1353,7 +1355,17 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
memset((void *) &UE_list->UE_sched_ctrl[UE_id],
0,
sizeof(NR_UE_sched_ctrl_t));
UE_list->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch *)malloc(num_slots_ul*sizeof(NR_sched_pucch));
UE_list->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(nb_periods*sizeof(NR_sched_pucch *));
for (p=0; p<nb_periods; p++)
UE_list->UE_sched_ctrl[UE_id].sched_pucch[p] = (NR_sched_pucch *)malloc(num_slots_ul*sizeof(NR_sched_pucch));
for (p=0; p<nb_periods; p++) {
for (int k=0; k<num_slots_ul; k++) {
memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[p][k],
0, sizeof(NR_sched_pucch));
}
}
LOG_I(MAC, "gNB %d] Add NR UE_id %d : rnti %x\n",
mod_idP,
UE_id,
......@@ -1431,6 +1443,7 @@ void nr_update_pucch_scheduling(int Mod_idP,
NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
NR_sched_pucch *curr_pucch;
int tdd_index = slotP/slots_per_tdd;
int first_ul_slot_tdd,k,i;
uint8_t pdsch_to_harq_feedback[8];
int found = 0;
......@@ -1444,7 +1457,7 @@ void nr_update_pucch_scheduling(int Mod_idP,
// for each possible ul or mixed slot
for (k=0; k<nr_ulmix_slots; k++) {
curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k];
curr_pucch = &UE_list->UE_sched_ctrl[UE_id].sched_pucch[tdd_index][k];
// if there is free room in current pucch structure
if (curr_pucch->dai_c<MAX_ACK_BITS) {
curr_pucch->frame = frameP;
......
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @ cf5bc231
......@@ -198,7 +198,7 @@ typedef struct NR_UE_harq {
typedef struct {
uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch
uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
NR_sched_pucch *sched_pucch;
NR_sched_pucch **sched_pucch;
uint16_t ta_timer;
int16_t ta_update;
uint8_t current_harq_pid;
......
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