Commit dde8ba2d authored by Raphael Defosseux's avatar Raphael Defosseux

Merge remote-tracking branch 'origin/trx_thread_param' into develop_integration_2020_w26

parents 8d2f7a54 09916983
dev 1 128-ues 256_QAM_demod 512-dataplane-bug-in-l2nfapi_nos1 FR2_NSA Fix_SA_SIB1 NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_2port_CSIRS NR_CSIRS_tomerge NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_F1C_F1U_extensions NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_NGAP NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguration_FR2 NR_RRCReconfiguration_BWP NR_RRC_PDCP NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_config_simplified NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_UE_CONFIG_REQ_FIXES NR_UE_MAC_scheduler NR_UE_PUCCH_bugfixes NR_UE_RA_fixes NR_UE_SA NR_UE_SSB_meas NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_UE_stability_fixes NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_cleanup_PUCCH_resources NR_gNB_initial_MIB_fix NR_mac_uci_functions_rework NR_multiplexing_HARQ_CSI_PUCCH NR_new_ul_antennaports NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_ue_dlsch_dmrs_cdm PBCHNRTCFIX PUSCH_TA_update RA_CI_test RFquality Saankhya_NRPRACH_HighSpeed Test_SA_5GREC UE_DL_DCI_hotfix add-dmrs-test add-ru-docker-image avxllr bandwidth-testing bch-fixes-bitmap benetel_5g_prach_fix benetel_config_file_fix benetel_dpdk20 benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes benetel_phase_rotation benetel_phase_rotation_old bsr-fix bugfix-free-ra-process bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-add-sabox-support ci-deploy-asterix ci-deploy-docker-compose ci-fix-module-ul-iperf ci-new-docker-pipeline ci-rd-july-improvements ci-reduce-nb-vms ci-test ci-ul-iperf-from-trf-container ci_benetel_longrun_limits ci_benetel_test ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_2x2_implem ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_2x2 ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_test_ra_fr2 ci_testinfra_as_code ci_update_build_nasmesh ci_vm_resource_fix cleanup_softmodem_main code-cleanup-20210716 constant_power debug-UL-5GRECORDS debug_UL_signal detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-NSA_SA_fixes develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aw2sori develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-wf-du develop_fpga_ldpc develop_stable dfts_alternatives disable_CSI_measrep dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel docker-improvements-2021-april docker-no-cache-option dongzhanyi-zte-develop dongzhanyi-zte-develop1 dongzhanyi-zte-develop2 enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fedora-gen-kernel-fix fembms-enb-ue fft_bench_hotfix finalize-oaicn-integration firas fix-check fix-ci-tun fix-compile fix-itti-segv fix-lte-ue-modem-in-docker-container fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-physim-run-script-on-cluster fix-quectel fix-realtime fix-retransmission-rbg fix-softmodem-restart fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_pdsch_low_prb fix_rb_corruption fix_reestablishment fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun fixgtpu flexran-apps flexran-repair-mme-mgmt flexran-rtc-repo-is-public fujitsu_lte_contribution fujitsu_lte_contribution-128 git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable improve_nr_modulation improve_ue_stability integ-w13-test-rt-issue integration_2020_wk15 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_2021_wk20_a integration_2021_wk22 integration_2021_wk23 integration_2021_wk27 integration_2021_wk28 integration_2021_wk30 integration_2021_wk30_b integration_w5GC_CBRA_test inter-RRU-final itti-enhancement ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc_offload_t1 ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 migrate-cpp-check-container migrate-vm-pipeline-to-bionic minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-bsr-fix nr-dl-mimo-2layer nr-dmrs-fixes nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-pdcp-benchmarking nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-ra-fix nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-stats-print nrPBCHTCFix nrPbchTcFix nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fdd_if_fix nr_improve_chanest nr_polar_decoder_improvement nr_power_measurement_fixes nr_prach_fr2 nr_ue_msg3 nr_ue_pdcp_fix nr_ue_remove_high_speed_flag nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases prb_based_dl_channel_estimation ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul recursive-cmake remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_oc rh_ci_phy_test_improve rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_test_rfsim_sa rh_ci_ue_parallel rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rohan_ulsim2RxFix rrc-enb-phy-testmode s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-demo-hs sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai scs_60_iisc sim-channels small-bugfixes-w40 small-config-change small_nr_bugfixes smallcleanup t-gnb-tracer test-5GREC test-nsa-benetel test-panos test_nsa_gtpu_fix test_rt-fix_phy-test testing_with_external_txdata tp-ota-test ue-csi ue-dci-false-detection ue-fixes ue-pdsch-pusch-parallel ue-race-fix ue_beam_selection ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes usrp_stop_cleanly usrp_x400 wf-sa-rrc wf_testc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest x2-endc-processing x2_handle_sctp_shutdown xiangwab xiangwan xw2 yihongzheng_srb zzs 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w30 2021.w29 2021.w28 2021.w27 2021.w26 2021.w25 2021.w24 2021.w23 2021.w22 2021.w20 2021.w19 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 benetel_phase_rotation benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
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......@@ -118,6 +118,7 @@ uint16_t sl_ahead;
extern int emulate_rf;
extern int numerology;
extern int usrp_tx_thread;
/*************************************************************/
/* Functions to attach and configure RRU */
......@@ -1510,12 +1511,14 @@ void *ru_thread( void *param ) {
if ((ru->is_slave) && (ru->if_south == LOCAL_RF)) do_ru_synch(ru);
// start trx write thread
if (ru->start_write_thread){
if(ru->start_write_thread(ru) != 0){
LOG_E(HW,"Could not start tx write thread\n");
}
else{
LOG_I(PHY,"tx write thread ready\n");
if(usrp_tx_thread == 1){
if (ru->start_write_thread){
if(ru->start_write_thread(ru) != 0){
LOG_E(HW,"Could not start tx write thread\n");
}
else{
LOG_I(PHY,"tx write thread ready\n");
}
}
}
}
......
......@@ -90,6 +90,7 @@
#define CONFIG_HLP_EMULATE_RF "Emulated RF enabled(disable by defult)\n"
#define CONFIG_HLP_PARALLEL_CMD "three config for level of parallelism 'PARALLEL_SINGLE_THREAD', 'PARALLEL_RU_L1_SPLIT', or 'PARALLEL_RU_L1_TRX_SPLIT'\n"
#define CONFIG_HLP_WORKER_CMD "two option for worker 'WORKER_DISABLE' or 'WORKER_ENABLE'\n"
#define CONFIG_HLP_USRP_THREAD "having extra thead for usrp tx\n"
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
......@@ -144,6 +145,10 @@ extern int sync_var;
extern int transmission_mode;
extern double cpuf;
extern int emulate_rf;
extern int numerology;
extern int usrp_tx_thread;
extern volatile int start_eNB;
extern volatile int start_UE;
......
......@@ -183,6 +183,7 @@ extern void *udp_eNB_task(void *args_p);
int transmission_mode=1;
int emulate_rf = 0;
int numerology = 0;
int usrp_tx_thread = 0;
static char *parallel_config = NULL;
......
......@@ -34,6 +34,7 @@
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
{"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, iptr:&usrp_tx_thread, defstrval:0, TYPE_INT, 0}, \
{"s" , CONFIG_HLP_SNR, 0, dblptr:&snr_dB, defdblval:25, TYPE_DOUBLE, 0}, \
}
......
......@@ -173,6 +173,7 @@ uint64_t num_missed_slots=0; // counter for the number of missed slots
int transmission_mode=1;
int numerology = 0;
int usrp_tx_thread = 0;
/* flag set by eNB conf file to specify if the radio head is local or remote (default option is local) */
//uint8_t local_remote_radio = BBU_LOCAL_RADIO_HEAD;
......
......@@ -422,6 +422,6 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
else
r_offset += Nl*Qm * ((GpmodC==0?0:1) + (Gp/C));
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_OUT);
return(0);
}
......@@ -330,7 +330,10 @@ int trx_brf_set_gains(openair0_device* device,
{
return(0);
}
int trx_brf_write_init(openair0_device *device)
{
return 0;
}
#define RXDCLENGTH 16384
int16_t cos_fsover8[8] = {2047, 1447, 0, -1448, -2047, -1448, 0, 1447};
......@@ -1145,6 +1148,7 @@ int device_init(openair0_device *device,
device->trx_stop_func = trx_brf_stop;
device->trx_set_freq_func = trx_brf_set_freq;
device->trx_set_gains_func = trx_brf_set_gains;
device->trx_write_init = trx_brf_write_init;
device->openair0_cfg = openair0_cfg;
device->priv = (void *)brf;
......
......@@ -197,6 +197,10 @@ int trx_eth_reset_stats(openair0_device* device)
return(0);
}
int trx_eth_write_init(openair0_device *device)
{
return 0;
}
int ethernet_tune(openair0_device *device,
unsigned int option,
......@@ -415,8 +419,9 @@ int transport_init(openair0_device *device,
device->trx_reset_stats_func = trx_eth_reset_stats;
device->trx_end_func = trx_eth_end;
device->trx_stop_func = trx_eth_stop;
device->trx_set_freq_func = trx_eth_set_freq;
device->trx_set_gains_func = trx_eth_set_gains;
device->trx_set_freq_func = trx_eth_set_freq;
device->trx_set_gains_func = trx_eth_set_gains;
device->trx_write_init = trx_eth_write_init;
if (eth->flags == ETH_RAW_MODE) {
device->trx_write_func = trx_eth_write_raw;
......
......@@ -510,6 +510,11 @@ int trx_iris_reset_stats(openair0_device *device) {
}
int trx_iris_write_init(openair0_device *device)
{
return 0;
}
extern "C" {
/*! \brief Initialize Openair Iris target. It returns 0 if OK
......@@ -831,6 +836,7 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
device->trx_set_freq_func = trx_iris_set_freq;
device->trx_set_gains_func = trx_iris_set_gains;
device->openair0_cfg = openair0_cfg;
device->trx_write_init = trx_iris_write_init;
s->sample_rate = openair0_cfg[0].sample_rate;
// TODO:
......
......@@ -350,6 +350,10 @@ void trx_lms_end(openair0_device *device) {
}
int trx_lms_write_init(openair0_device *device)
{
return 0;
}
extern "C" {
/*! \brief Initialize Openair LMSSDR target. It returns 0 if OK
* \param device the hardware to use
......@@ -406,6 +410,7 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg){
device->trx_stop_func = trx_lms_stop;
device->trx_set_freq_func = trx_lms_set_freq;
device->trx_set_gains_func = trx_lms_set_gains;
device->trx_write_init = trx_lms_write_init;
device->openair0_cfg = openair0_cfg;
......
......@@ -70,6 +70,8 @@
* @{
*/
extern int usrp_tx_thread;
typedef struct {
......@@ -345,7 +347,6 @@ static int trx_usrp_write(openair0_device *device,
int flags_msb = (flags>>8)&0xff;
int end;
int write_tread = 0;
openair0_thread_t *write_thread = &device->write_thread;
openair0_write_package_t *write_package = write_thread->write_package;
......@@ -382,7 +383,7 @@ static int trx_usrp_write(openair0_device *device,
last_packet_state = true;
}
if(write_tread == 0){
if(usrp_tx_thread == 0){
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
......@@ -586,7 +587,7 @@ void *trx_usrp_write_thread(void * arg){
return NULL;
}
int trx_write_init(openair0_device *device){
int trx_usrp_write_init(openair0_device *device){
uhd::set_thread_priority_safe(1.0);
openair0_thread_t *write_thread = &device->write_thread;
......@@ -932,7 +933,7 @@ extern "C" {
device->trx_stop_func = trx_usrp_stop;
device->trx_set_freq_func = trx_usrp_set_freq;
device->trx_set_gains_func = trx_usrp_set_gains;
device->trx_write_init = trx_write_init;
device->trx_write_init = trx_usrp_write_init;
// hotfix! to be checked later
......
......@@ -243,6 +243,11 @@ ts += nsamps;
return nsamps;
}
int tcp_bridge_write_init(openair0_device *device)
{
return 0;
}
__attribute__((__visibility__("default")))
int device_init(openair0_device* device, openair0_config_t *openair0_cfg)
{
......@@ -267,6 +272,7 @@ int device_init(openair0_device* device, openair0_config_t *openair0_cfg)
device->trx_set_gains_func = tcp_bridge_set_gains;
device->trx_write_func = tcp_bridge_write;
device->trx_read_func = tcp_bridge_read;
device->trx_write_init = tcp_bridge_write_init;
device->priv = tcp_bridge;
......
......@@ -679,7 +679,11 @@ void rx_rf(RU_t *ru,
resynch=1;
}
proc->timestamp_rx = ts-ru->ts_offset;
if(get_softmodem_params()->emulate_rf) {
proc->timestamp_rx = old_ts + fp->samples_per_tti;
} else {
proc->timestamp_rx = ts-ru->ts_offset;
}
// AssertFatal(rxs == fp->samples_per_tti,
// "rx_rf: Asked for %d samples, got %d from SDR\n",fp->samples_per_tti,rxs);
......@@ -2337,19 +2341,22 @@ void init_RU_proc(RU_t *ru) {
LOG_I(PHY,"%s() DJP - added creation of pthread_prach\n", __FUNCTION__);
pthread_create( &proc->pthread_prach, attr_prach, ru_thread_prach, (void *)ru );
ru->state=RU_RUN;
fill_rf_config(ru,ru->rf_config_file);
init_frame_parms(ru->frame_parms,1);
ru->frame_parms->nb_antennas_rx = ru->nb_rx;
phy_init_RU(ru);
ret = openair0_device_load(&ru->rfdevice,&ru->openair0_cfg);
if (ret < 0) {
LOG_I(PHY,"Exiting, cannot load device. Make sure that your SDR board is connected!\n");
exit(1);
}
if(!get_softmodem_params()->emulate_rf)
{
fill_rf_config(ru,ru->rf_config_file);
init_frame_parms(ru->frame_parms,1);
ru->frame_parms->nb_antennas_rx = ru->nb_rx;
phy_init_RU(ru);
ret = openair0_device_load(&ru->rfdevice,&ru->openair0_cfg);
if (ret < 0) {
LOG_I(PHY,"Exiting, cannot load device. Make sure that your SDR board is connected!\n");
exit(1);
}
if (setup_RU_buffers(ru)!=0) {
LOG_I(PHY,"Exiting, cannot initialize RU Buffers\n");
exit(1);
if (setup_RU_buffers(ru)!=0) {
LOG_I(PHY,"Exiting, cannot initialize RU Buffers\n");
exit(1);
}
}
}
......
......@@ -170,6 +170,7 @@ extern void init_eNB_afterRU(void);
int transmission_mode=1;
int emulate_rf = 0;
int numerology = 0;
int usrp_tx_thread = 0;
THREAD_STRUCT thread_struct;
/* struct for ethernet specific parameters given in eNB conf file */
......@@ -659,6 +660,7 @@ int main ( int argc, char **argv )
initTpool("n", L1proc->threadPool, true);
initNotifiedFIFO(L1proc->respEncode);
initNotifiedFIFO(L1proc->respDecode);
RC.eNB[x][CC_id]->proc.L1_proc_tx.threadPool = L1proc->threadPool;
}
......
......@@ -155,6 +155,10 @@ extern int sync_var;
extern int transmission_mode;
extern double cpuf;
extern int emulate_rf;
extern int numerology;
extern int usrp_tx_thread;
// In lte-enb.c
extern void stop_eNB(int);
extern void kill_eNB_proc(int inst);
......
......@@ -171,6 +171,8 @@ extern void get_uethreads_params(void);
int transmission_mode=1;
int usrp_tx_thread = 0;
char *usrp_args=NULL;
char *usrp_clksrc=NULL;
......
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