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OpenXG-RAN
Commit e1a92ead authored by Xue Song's avatar Xue Song
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Merge branch 'master' into develop_SA_rfsim_for_F1 

Conflicts:
	openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
	openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
	openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
	openair2/RRC/NR/rrc_gNB.c
	openair2/RRC/NR/rrc_gNB_NGAP.c
	openair2/RRC/NR_UE/rrc_UE.c
	openair3/NGAP/ngap_gNB.c
	openair3/NGAP/ngap_gNB_nas_procedures.c
parents 01999cfc 403db5f6
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ci-scripts/Jenkinsfile-gitlab
View file @ e1a92ead
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ci-scripts/checkGitLabMergeRequestLabels.sh 0 → 100755
View file @ e1a92ead
#!/bin/bash
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
# * The OpenAirInterface Software Alliance licenses this file to You under
# * the OAI Public License, Version 1.1 (the "License"); you may not use this file
# * except in compliance with the License.
# * You may obtain a copy of the License at
# *
# * http://www.openairinterface.org/?page_id=698
# *
# * Unless required by applicable law or agreed to in writing, software
# * distributed under the License is distributed on an "AS IS" BASIS,
# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# * See the License for the specific language governing permissions and
# * limitations under the License.
# *-------------------------------------------------------------------------------
# * For more information about the OpenAirInterface (OAI) Software Alliance:
# * contact@openairinterface.org
# */
function usage {
echo "OAI GitLab merge request applying script"
echo " Original Author: Raphael Defosseux"
echo ""
echo "Usage:"
echo "------"
echo ""
echo " checkGitLabMergeRequestLabels.sh [OPTIONS]"
echo ""
echo "Options:"
echo "------------------"
echo ""
echo " --mr-id ####"
echo " Specify the ID of the merge request."
echo ""
echo " --help OR -h"
echo " Print this help message."
echo ""
}
if [ $# -ne 2 ] && [ $# -ne 1 ]
then
echo "Syntax Error: not the correct number of arguments"
echo ""
usage
exit 1
fi
while [[ $# -gt 0 ]]
do
key="$1"
case $key in
-h|--help)
shift
usage
exit 0
;;
--mr-id)
MERGE_REQUEST_ID="$2"
shift
shift
;;
*)
echo "Syntax Error: unknown option: $key"
echo ""
usage
exit 1
esac
done
LABELS=`curl --silent "https://gitlab.eurecom.fr/api/v4/projects/oai%2Fopenairinterface5g/merge_requests/$MERGE_REQUEST_ID" | jq '.labels' || true`
IS_MR_BUILD_ONLY=`echo $LABELS | grep -c BUILD-ONLY || true`
IS_MR_CI=`echo $LABELS | grep -c CI || true`
IS_MR_4G=`echo $LABELS | grep -c 4G-LTE || true`
IS_MR_5G=`echo $LABELS | grep -c 5G-NR || true`
# First case: none is present! No CI
if [ $IS_MR_BUILD_ONLY -eq 0 ] && [ $IS_MR_CI -eq 0 ] && [ $IS_MR_4G -eq 0 ] && [ $IS_MR_5G -eq 0 ]
then
echo "NONE"
exit 0
fi
# Second case: Build-Only
if [ $IS_MR_BUILD_ONLY -eq 1 ]
then
echo "BUILD-ONLY"
exit 0
fi
# Third case: CI or 4G label --> Full CI run
if [ $IS_MR_4G -eq 1 ] || [ $IS_MR_CI -eq 1 ]
then
echo "FULL"
exit 0
fi
# Fourth case: 5G label
if [ $IS_MR_BUILD_ONLY -eq 0 ] && [ $IS_MR_CI -eq 0 ] && [ $IS_MR_4G -eq 0 ] && [ $IS_MR_5G -eq 1 ]
then
echo "SHORTEN-5G"
exit 0
fi
cmake_targets/CMakeLists.txt
View file @ e1a92ead
......@@ -485,7 +485,6 @@ add_custom_target (
add_library(NR_RRC_LIB ${nr_rrc_h} ${nr_rrc_source}
${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1_msg.c
${OPENAIR2_DIR}/RRC/NR/nr_ngap_gNB.c
)
add_dependencies(NR_RRC_LIB nr_rrc_flag)
include_directories ("${NR_RRC_FULL_DIR}")
......@@ -2112,10 +2111,10 @@ set (MAC_NR_SRC_UE
${NR_UE_MAC_DIR}/mac_vars.c
${NR_UE_MAC_DIR}/main_ue_nr.c
${NR_UE_MAC_DIR}/nr_ue_procedures.c
${NR_UE_MAC_DIR}/nr_ue_scheduler.c
${NR_UE_MAC_DIR}/nr_ue_dci_configuration.c
${NR_UE_MAC_DIR}/nr_l1_helpers.c
${NR_UE_MAC_DIR}/nr_ra_procedures.c
${NR_UE_MAC_DIR}/rar_tools_nrUE.c
)
set (ENB_APP_SRC
......
doc/ITTISIM.md 0 → 100755
View file @ e1a92ead
<table style="border-collapse: collapse; border: none;">
<tr style="border-collapse: collapse; border: none;">
<td style="border-collapse: collapse; border: none;">
<a href="http://www.openairinterface.org/">
<img src="./images/oai_final_logo.png" alt="" border=3 height=50 width=150>
</img>
</a>
</td>
<td style="border-collapse: collapse; border: none; vertical-align: center;">
<b><font size = "5">Running L3 ITTI simulator</font></b>
</td>
</tr>
</table>
This page is valid on the following branches:
- `develop` starting from tag `2020.w48`
# 1. Building the ITTI simulator.
The ITTI simulator is available directly from the standard build.
```bash
$ source oaienv
$ cd cmake_targets
$ sudo ./build_oai -x -w None -c -ittiSIM
```
# 2. Running the ITTI simulator.
The ITTI simulator establishes ITTI-threaded communication between the gNB RRC task and the UE RRC task.
This allows to test the sequence of NGAP/RRC/NAS messages.
The main limitations are:
- NAS is a simple stub that just sends and receives messages
- only initial Attach sequence
## 2.1. Starting the ITTI simulator
The ITTI simulator is able to run with a connected 5GC or without any.
The develop branch tag `2020.w48` only works RRC without 5GC connection.
```bash
$ sudo -E ./ran_build/build/nr-ittisim -O gnb.conf
```
executables/nr-softmodem-common.h
View file @ e1a92ead
......@@ -77,6 +77,7 @@
#define CONFIG_HLP_UE "Set the lte softmodem as a UE\n"
#define CONFIG_HLP_L2MONW "Enable L2 wireshark messages on localhost \n"
#define CONFIG_HLP_L2MONP "Enable L2 pcap messages on localhost \n"
#define CONFIG_HLP_MAC "Disable the MAC procedures at UE side (default is enabled)\n"
#define CONFIG_HLP_VCD "Enable VCD (generated file will is named openair_dump_eNB.vcd, read it with target/RT/USER/eNB.gtkw\n"
#define CONFIG_HLP_TQFS "Apply three-quarter of sampling frequency, 23.04 Msps to reduce the data rate on USB/PCIe transfers (only valid for 20 MHz)\n"
#define CONFIG_HLP_TPORT "tracer port\n"
......
executables/nr-ue.c
View file @ e1a92ead
......@@ -18,49 +18,16 @@
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "executables/thread-common.h"
#include "executables/nr-uesoftmodem.h"
#include "NR_MAC_UE/mac.h"
//#include "RRC/LTE/rrc_extern.h"
#include "PHY_INTERFACE/phy_interface_extern.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
#include "fapi_nr_ue_l1.h"
#include "executables/nr-uesoftmodem.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "NR_MAC_UE/mac_proto.h"
#include "RRC/NR_UE/rrc_proto.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h"
#include "SCHED_NR_UE/defs.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "common/utils/LOG/log.h"
#include "common/utils/system.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "executables/nr-softmodem.h"
#include "T.h"
#ifdef XFORMS
#include "PHY/TOOLS/nr_phy_scope.h"
extern char do_forms;
#endif
// Missing stuff?
int next_ra_frame = 0;
module_id_t next_Mod_id = 0;
extern double cpuf;
//static nfapi_nr_config_request_t config_t;
//static nfapi_nr_config_request_t* config =&config_t;
/*
* NR SLOT PROCESSING SEQUENCE
*
......@@ -124,16 +91,12 @@ extern double cpuf;
#define DURATION_RX_TO_TX (6) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
#endif
#define FRAME_PERIOD 100000000ULL
#define DAQ_PERIOD 66667ULL
typedef enum {
pss=0,
pbch=1,
si=2
pss = 0,
pbch = 1,
si = 2
} sync_mode_t;
void init_nr_ue_vars(PHY_VARS_NR_UE *ue,
uint8_t UE_id,
uint8_t abstraction_flag)
......@@ -258,7 +221,7 @@ static void UE_synch(void *arg) {
double rx_gain_off = 0;
nr_get_carrier_frequencies(&UE->frame_parms, &dl_carrier, &ul_carrier);
if (nr_initial_sync( &syncD->proc, UE, UE->mode,2) == 0) {
if (nr_initial_sync(&syncD->proc, UE, 2) == 0) {
freq_offset = UE->common_vars.freq_offset; // frequency offset computed with pss in initial sync
hw_slot_offset = ((UE->rx_offset<<1) / UE->frame_parms.samples_per_subframe * UE->frame_parms.slots_per_subframe) +
round((float)((UE->rx_offset<<1) % UE->frame_parms.samples_per_subframe)/UE->frame_parms.samples_per_slot0);
......@@ -394,26 +357,17 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
nr_downlink_indication_t dl_indication;
memset((void*)&dl_indication, 0, sizeof(dl_indication));
dl_indication.module_id = UE->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = UE->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, gNB_id);
UE->if_inst->dl_indication(&dl_indication, NULL);
}
// Process Rx data for one sub-frame
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, no_relay, NULL );
#else
uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, UE->mode,get_nrUE_params()->nr_dlsch_parallel);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_slot_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n");
phy_procedures_nrUE_RX(UE, proc, gNB_id, get_nrUE_params()->nr_dlsch_parallel);
LOG_D(PHY, "In %s: slot %d, time %lu\n", __FUNCTION__, proc->nr_slot_rx, (rdtsc()-a)/3500);
#endif
if(IS_SOFTMODEM_NOS1){
......@@ -424,23 +378,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
}
}
// no UL for now
/*
if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_slot_rx;
UE->ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
*/
}
/*!
......
executables/nr-uesoftmodem.c
View file @ e1a92ead
......@@ -298,7 +298,6 @@ void set_options(int CC_id, PHY_VARS_NR_UE *UE){
tx_gain[0][CC_id] = tx_gain[0][0];
// Set UE variables
UE->rx_total_gain_dB = (int)rx_gain[CC_id][0] + rx_gain_off;
UE->tx_total_gain_dB = (int)tx_gain[CC_id][0];
UE->tx_power_max_dBm = tx_max_power[CC_id];
......
executables/nr-uesoftmodem.h
View file @ e1a92ead
......@@ -50,15 +50,15 @@
{"ue-rxgain", CONFIG_HLP_UERXG, 0, dblptr:&(rx_gain[0][0]), defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-rxgain-off", CONFIG_HLP_UERXGOFF, 0, dblptr:&rx_gain_off, defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-txgain", CONFIG_HLP_UETXG, 0, dblptr:&(tx_gain[0][0]), defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&(fp->nb_antennas_rx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&(fp->nb_antennas_tx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&(fp->nb_antennas_rx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&(fp->nb_antennas_tx), defuintval:1, TYPE_UINT8, 0}, \
{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, iptr:&(UE->UE_scan_carrier), defintval:0, TYPE_INT, 0}, \
{"ue-fo-compensation", CONFIG_HLP_UEFO, PARAMFLAG_BOOL, iptr:&(UE->UE_fo_compensation), defintval:0, TYPE_INT, 0}, \
{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
{"r" , CONFIG_HLP_PRB, 0, iptr:&(fp->N_RB_DL), defintval:25, TYPE_UINT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, iptr:&(UE->timing_advance), defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, iptr:&(UE->timing_advance), defintval:0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, u8ptr:&(fp->threequarter_fs), defintval:0, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"ue-timing-correction-disable", CONFIG_HLP_DISABLETIMECORR, PARAMFLAG_BOOL, iptr:&(UE->no_timing_correction), defintval:0, TYPE_INT, 0}, \
}
......
openair1/PHY/INIT/nr_init.c
View file @ e1a92ead
......@@ -84,8 +84,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PRACH *const prach_vars = &gNB->prach_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
int i;
int Ptx=cfg->carrier_config.num_tx_ant.value;
......@@ -98,19 +96,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
while(gNB->configured == 0) usleep(10000);
load_dftslib();
/*
LOG_I(PHY,"[gNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d nb_antennas_tx:%u nb_antennas_rx:%u PRACH[rootSequenceIndex:%u prach_Config_enabled:%u configIndex:%u highSpeed:%u zeroCorrelationZoneConfig:%u freqOffset:%u]\n",
gNB->Mod_id,
fp->N_RB_DL,fp->phich_config_common.phich_resource,
fp->phich_config_common.phich_duration,
fp->nb_antennas_tx, fp->nb_antennas_rx,
fp->prach_config_common.rootSequenceIndex,
fp->prach_config_common.prach_Config_enabled,
fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset
);*/
LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_gNB][MOD %02"PRIu8"][]\n", gNB->Mod_id);
crcTableInit();
init_scrambling_luts();
......
openair1/PHY/INIT/nr_init_ue.c
View file @ e1a92ead
This diff is collapsed.
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @ e1a92ead
......@@ -102,8 +102,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb);
LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
// DMRS length is per OFDM symbol
uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)?
(n_rb*6) : (pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType);
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
......@@ -164,64 +163,83 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
#endif
/// Resource mapping
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
/*Reorder REG list for a freq first mapping*/
uint8_t reg_idx0 = pdcch_pdu_rel15->dci_pdu.CceIndex[d]*NR_NB_REG_PER_CCE;
uint8_t nb_regs = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*NR_NB_REG_PER_CCE;
// Get cce_list indices by reg_idx in ascending order
int reg_list_index = 0;
int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for(int p2 = 0; p2 < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; p2++) {
if(gNB->cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
reg_list_order[reg_list_index] = p2;
reg_list_index++;
break;
}
}
}
/*Mapping the encoded DCI along with the DMRS */
for (int reg_idx=reg_idx0; reg_idx<(nb_regs+reg_idx0); reg_idx++) {
k = cset_start_sc + (12*reg_idx/cset_nsymb);
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + ((reg_idx/cset_nsymb)%cset_nsymb);
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (reg_idx/cset_nsymb)*3;
else
dmrs_idx = ((reg_idx/cset_nsymb)+rb_offset)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
//if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
for (int cce_count = 0; cce_count < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; cce_count ++) {
int8_t cce_idx = reg_list_order[cce_count];
for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) {
k = cset_start_sc + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].symb_idx;
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx =gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx * 3;
else
dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
k_prime = 0;
for (int m = 0; m < NR_NB_SC_PER_RB; m++) {
if (m == (k_prime << 2) + 1) { // DMRS if not already mapped
((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] =
(amp * mod_dmrs[l][dmrs_idx << 1]) >> 15;
((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dmrs_idx++;
//}
k_prime++;
} else { // DCI payload
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
dmrs_idx++;
k_prime++;
} else { // DCI payload
((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] = (amp * mod_dci[dci_idx << 1]) >> 15;
((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dci[(dci_idx << 1) + 1]) >> 15;
#ifdef DEBUG_DCI
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
} // m
} // reg_idx
LOG_I(PHY, "DCI: payloadSize = %d | payload = %llx\n",
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
} // m
} // reg_in_cce_idx
} // cce_count
LOG_D(PHY, "DCI: payloadSize = %d | payload = %llx\n",
*pdcch_pdu_rel15->dci_pdu.PayloadSizeBits,*(unsigned long long*)pdcch_pdu_rel15->dci_pdu.Payload);
} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
......
openair1/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c
View file @ e1a92ead
......@@ -24,6 +24,7 @@
#include "PHY/NR_UE_ESTIMATION/nr_estimation.h"
#include "PHY/impl_defs_top.h"
#include "executables/softmodem-common.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#define DEBUG_PHY
......@@ -104,15 +105,14 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
{
first_time = 0;
ue->time_sync_cell = 1;
if (ue->mac_enabled==1) {
if (get_softmodem_params()->do_ra) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
//dl_phy_sync_success(ue->Mod_id,frame,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
ue->prach_resources[gNB_id]->sync_frame = frame;
ue->prach_resources[gNB_id]->init_msg1 = 0;
}
else {
} else {
ue->UE_mode[0] = PUSCH;
}
}
......
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
View file @ e1a92ead
......@@ -90,6 +90,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
uint8_t slot);
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t gNB_index,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag);
......
openair1/PHY/NR_UE_ESTIMATION/nr_ue_measurements.c
View file @ e1a92ead
......@@ -30,7 +30,7 @@
* \warning
*/
#include "nr-softmodem-common.h"
#include "executables/softmodem-common.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/phy_extern_nr_ue.h"
#include "common/utils/LOG/log.h"
......@@ -45,25 +45,41 @@
//#define DEBUG_MEAS_UE
//#define DEBUG_RANK_EST
// Returns the pathloss in dBm for the active UL BWP on the selected carrier based on the DL RS associated with the PRACH transmission
// computation according to clause 7.4 (Physical random access channel) of 3GPP TS 38.213 version 16.3.0 Release 16
// Assumptions:
// - PRACH transmission from a UE is not in response to a detection of a PDCCH order by the UE
// Measurement units:
// - referenceSignalPower: dBm/RE (average EPRE of the resources elements that carry secondary synchronization signals in dBm)
int16_t get_nr_PL(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_index){
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
int16_t pathloss;
if (get_softmodem_params()->do_ra){
long referenceSignalPower = ue->nrUE_config.ssb_config.ss_pbch_power;
double rsrp_dBm = 10*log10(ue->measurements.rsrp[gNB_index]) + 30 - ue->rx_total_gain_dB;
pathloss = (int16_t)(10*log10(pow(10, (double)(referenceSignalPower)/10) - pow(10, (double)(rsrp_dBm)/10)));
LOG_D(MAC, "In %s: pathloss %d dBm, UE RX total gain %d dB, referenceSignalPower %ld dBm (%f mW), RSRP %f dBm (%f mW)\n",
__FUNCTION__,
pathloss,
ue->rx_total_gain_dB,
referenceSignalPower,
pow(10, referenceSignalPower/10),
rsrp_dBm,
pow(10, rsrp_dBm/10));
} else {
pathloss = ((int16_t)(((10*ue->rx_total_gain_dB) - dB_fixed_times10(ue->measurements.rsrp[gNB_index]))/10));
}
return pathloss;
/*
if (ue->frame_parms.mode1_flag == 1)
RSoffset = 6;
else
RSoffset = 3;
*/
/* LOG_D(PHY,"get_nr_PL : rsrp %f dBm/RE (%f), eNB power %d dBm/RE\n",
(1.0*dB_fixed_times10(ue->measurements.rsrp[eNB_index])-(10.0*ue->rx_total_gain_dB))/10.0,
10*log10((double)ue->measurements.rsrp[eNB_index]),
ue->frame_parms.pdsch_config_common.referenceSignalPower);*/
return((int16_t)(((10*ue->rx_total_gain_dB) - dB_fixed_times10(ue->measurements.rsrp[gNB_index]))/10));
// dB_fixed_times10(RSoffset*12*ue_g[Mod_id][CC_id]->frame_parms.N_RB_DL) +
//(ue->frame_parms.pdsch_config_common.referenceSignalPower*10))/10));
}
uint32_t get_nr_rx_total_gain_dB (module_id_t Mod_id,uint8_t CC_id)
......@@ -108,7 +124,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
// signal measurements
for (gNB_id = 0; gNB_id < ue->n_connected_eNB; gNB_id++){
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++){
ue->measurements.rx_power_tot[gNB_id] = 0;
......@@ -140,7 +156,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
// filter to remove jitter
if (ue->init_averaging == 0) {
for (gNB_id = 0; gNB_id < ue->n_connected_eNB; gNB_id++)
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++)
ue->measurements.rx_power_avg[gNB_id] = (int)(((k1*((long long int)(ue->measurements.rx_power_avg[gNB_id]))) + (k2*((long long int)(ue->measurements.rx_power_tot[gNB_id])))) >> 10);
ue->measurements.n0_power_avg = (int)(((k1*((long long int) (ue->measurements.n0_power_avg))) + (k2*((long long int) (ue->measurements.n0_power_tot))))>>10);
......@@ -149,7 +165,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
} else {
for (gNB_id = 0; gNB_id < ue->n_connected_eNB; gNB_id++)
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++)
ue->measurements.rx_power_avg[gNB_id] = ue->measurements.rx_power_tot[gNB_id];
ue->measurements.n0_power_avg = ue->measurements.n0_power_tot;
......@@ -157,7 +173,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
}
for (gNB_id = 0; gNB_id < ue->n_connected_eNB; gNB_id++) {
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
ue->measurements.rx_power_avg_dB[gNB_id] = dB_fixed( ue->measurements.rx_power_avg[gNB_id]);
ue->measurements.wideband_cqi_tot[gNB_id] = dB_fixed2(ue->measurements.rx_power_tot[gNB_id], ue->measurements.n0_power_tot);
......@@ -180,74 +196,74 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
#endif
}
// This function implements:
// - SS reference signal received power (SS-RSRP) as per clause 5.1.1 of 3GPP TS 38.215 version 16.3.0 Release 16
// - no Layer 3 filtering implemented (no filterCoefficient provided from RRC)
// Todo:
// - Layer 3 filtering according to clause 5.5.3.2 of 3GPP TS 38.331 version 16.2.0 Release 16
// Measurement units:
// - RSRP: W (dBW)
// - RX Gain dB
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag)
uint8_t gNB_id,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag)
{
int aarx,rb, symbol_offset;
int16_t *rxF;
int aarx;
int nb_re;
int k_start = 55;
int k_end = 183;
unsigned int ssb_offset = ue->frame_parms.first_carrier_offset + ue->frame_parms.ssb_start_subcarrier;
uint8_t l_sss = ue->symbol_offset + 2;
uint16_t Nid_cell = ue->frame_parms.Nid_cell;
uint8_t eNB_offset=0,l,nushift;
uint16_t off,nb_rb;
// NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
if (ssb_offset>= ue->frame_parms.ofdm_symbol_size){
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
unsigned int ssb_offset = ue->frame_parms.first_carrier_offset + ue->frame_parms.ssb_start_subcarrier;
if (ssb_offset>= ue->frame_parms.ofdm_symbol_size) ssb_offset-=ue->frame_parms.ofdm_symbol_size;
symbol_offset = ue->frame_parms.ofdm_symbol_size*((ue->symbol_offset+1)%(ue->frame_parms.symbols_per_slot));
ssb_offset -= ue->frame_parms.ofdm_symbol_size;
ue->measurements.rsrp[eNB_offset] = 0;
}
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
nb_rb = 20;
//} else{
// LOG_E(PHY,"report quantity not supported \n");
//}
ue->measurements.rsrp[gNB_id] = 0;
if (abstraction_flag == 0) {
if (abstraction_flag == 0) {
for (l=0; l<1; l++) {
LOG_D(PHY, "In %s: [UE %d] slot %d l_sss %d ssb_offset %d\n", __FUNCTION__, ue->Mod_id, slot, l_sss, ssb_offset);
LOG_D(PHY,"[UE %d] slot %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, l %d)\n",ue->Mod_id,slot,Nid_cell,nushift,
eNB_offset,l);
nb_re = 0;
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+ssb_offset+nushift)];
off = 0;
for (aarx = 0; aarx < ue->frame_parms.nb_antennas_rx; aarx++) {
if (l==0) {
for (rb=0; rb<nb_rb; rb++) {
int16_t *rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aarx][(l_sss*ue->frame_parms.ofdm_symbol_size) + ssb_offset];
ue->measurements.rsrp[eNB_offset] += (((int32_t)(rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1]));
//printf("rb %d, off %d : %d\n",rb,off,((((int32_t)rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1])));
for(int k = k_start; k < k_end; k++){
off = (off+4) % ue->frame_parms.ofdm_symbol_size;
}
}
}
}
#ifdef DEBUG_MEAS_UE
LOG_I(PHY, "In %s rxF_sss %d %d\n", __FUNCTION__, rxF_sss[k*2], rxF_sss[k*2 + 1]);
#endif
ue->measurements.rsrp[eNB_offset]/=nb_rb;
ue->measurements.rsrp[gNB_id] += (((int32_t)rxF_sss[k*2]*rxF_sss[k*2]) + ((int32_t)rxF_sss[k*2 + 1]*rxF_sss[k*2 + 1]));
} else {
nb_re++;
ue->measurements.rsrp[eNB_offset] = -93 ;
}
}
ue->measurements.rsrp[gNB_id] /= nb_re;
} else {
ue->measurements.rsrp[gNB_id] = -93;
}
if (eNB_offset == 0)
ue->measurements.rsrp_filtered[gNB_id] = ue->measurements.rsrp[gNB_id];
LOG_D(PHY,"[UE %d] slot %d RSRP Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d)\n",
ue->Mod_id,
slot,eNB_offset,
(eNB_offset>0) ? ue->measurements.adj_cell_id[eNB_offset-1] : ue->frame_parms.Nid_cell,
10*log10(ue->measurements.rsrp[eNB_offset])-ue->rx_total_gain_dB,
ue->measurements.rsrp[eNB_offset]);
LOG_D(PHY, "In %s: [UE %d] slot %d SS-RSRP: %3.1f dBm/RE (%d W)\n",
__FUNCTION__,
ue->Mod_id,
slot,
10*log10(ue->measurements.rsrp[gNB_id]) + 30 - ue->rx_total_gain_dB,
ue->measurements.rsrp[gNB_id]);
}
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ e1a92ead
......@@ -81,12 +81,14 @@
void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
uint32_t *z,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t coreset_time_dur,
uint32_t coreset_nbr_rb,
uint8_t reg_bundle_size_L,
uint8_t coreset_interleaver_size_R,
uint8_t n_shift) {
uint8_t n_shift,
uint8_t number_of_candidates,
uint16_t *CCE,
uint8_t *L) {
/*
* This function will do demapping and deinterleaving from llr containing demodulated symbols
* Demapping will regroup in REG and bundles
......@@ -122,35 +124,61 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
| REG 0 (bundle 0) bundle 0 bundle 0
*/
int c=0,r=0;
uint16_t bundle_j=0, f_bundle_j=0,f_reg=0;
uint32_t coreset_C=0;
int c = 0, r = 0;
uint16_t bundle_j = 0, f_bundle_j = 0, f_reg = 0;
uint32_t coreset_C = 0;
uint16_t index_z, index_llr;
int coreset_interleaved = 0;
if (reg_bundle_size_L!=0) { // interleaving will be done only if reg_bundle_size_L != 0
coreset_interleaved=1;
coreset_C = (uint32_t)((coreset_nbr_rb * coreset_time_dur)/ (coreset_interleaver_size_R*reg_bundle_size_L));
if (reg_bundle_size_L != 0) { // interleaving will be done only if reg_bundle_size_L != 0
coreset_interleaved = 1;
coreset_C = (uint32_t) ((coreset_nbr_rb * coreset_time_dur) / (coreset_interleaver_size_R * reg_bundle_size_L));
} else {
reg_bundle_size_L=6;
reg_bundle_size_L = 6;
}
for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) {
if ((reg%reg_bundle_size_L) == 0) {
int f_bundle_j_list[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int reg = 0; reg < ((coreset_nbr_rb * coreset_time_dur)); reg++) {
if ((reg % reg_bundle_size_L) == 0) {
if (r == coreset_interleaver_size_R) {
r=0;
r = 0;
c++;
}
bundle_j = (c*coreset_interleaver_size_R)+r;
f_bundle_j = ((r*coreset_C)+c+n_shift)%((coreset_nbr_rb*coreset_time_dur)/reg_bundle_size_L);
bundle_j = (c * coreset_interleaver_size_R) + r;
f_bundle_j = ((r * coreset_C) + c + n_shift) % ((coreset_nbr_rb * coreset_time_dur) / reg_bundle_size_L);
if (coreset_interleaved == 0) f_bundle_j = bundle_j;
if (coreset_interleaved==0) f_bundle_j=bundle_j;
f_bundle_j_list[reg / 6] = f_bundle_j;
LOG_DNL("[r=%d,c=%d] bundle_j(%d) interleaved at f_bundle_j(%d)\n",r,c,bundle_j,f_bundle_j);
}
if ((reg % reg_bundle_size_L) == 0) r++;
}
// Get cce_list indices by reg_idx in ascending order
int f_bundle_j_list_id = 0;
int f_bundle_j_list_ord[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
f_bundle_j_list_id = CCE[c_id];
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for (int p2 = CCE[c_id]; p2 < CCE[c_id] + L[c_id]; p2++) {
if (f_bundle_j_list[p2] == p) {
f_bundle_j_list_ord[f_bundle_j_list_id] = p;
f_bundle_j_list_id++;
break;
}
}
}
}
for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) {
f_reg = (f_bundle_j*reg_bundle_size_L)+(reg%reg_bundle_size_L);
f_reg = (f_bundle_j_list_ord[reg/6]*reg_bundle_size_L)+(reg%reg_bundle_size_L);
index_z = 9*reg;
index_llr = 9*((uint16_t)floor(f_reg/coreset_time_dur)+((f_reg%coreset_time_dur)*(coreset_nbr_rb)));
......@@ -386,14 +414,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
rxF=NULL;
// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start)
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
}
if ((c_rb >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
if (((c_rb + n_BWP_start) >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
......@@ -406,7 +434,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
//#endif
}
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
#ifdef NR_PDCCH_DCI_DEBUG
......@@ -415,7 +443,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif
}
if ((c_rb > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
if (((c_rb + n_BWP_start) > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
// number of RBs is odd and c_rb is higher than half system bandwidth + 1
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
......@@ -425,7 +453,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif
}
if ((c_rb == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
if (((c_rb + n_BWP_start) == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
// if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC)
// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table)
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
......@@ -760,12 +788,14 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving()\n");
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) pdcch_vars->e_rx,
frame_parms,
rel15->coreset.duration,
n_rb,
rel15->coreset.RegBundleSize,
rel15->coreset.InterleaverSize,
rel15->coreset.ShiftIndex);
rel15->coreset.ShiftIndex,
rel15->number_of_candidates,
rel15->CCE,
rel15->L);
/*
nr_pdcch_unscrambling(rel15->rnti,
frame_parms,
......@@ -889,7 +919,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
n_rnti = rel15->rnti;
if (crc == n_rnti) {
LOG_I(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
LOG_D(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,rel15->dci_format_options[k],CCEind,dci_length,*(unsigned long long*)dci_estimation);
dci_ind->SFN = proc->frame_rx;
dci_ind->slot = proc->nr_slot_rx;
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @ e1a92ead
......@@ -361,7 +361,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
else
Coderate = (float) (harq_process->R) /(float) 2048;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25)
if ((A <=292) || ((A <= NR_MAX_PDSCH_TBS) && (Coderate <= 0.6667)) || Coderate <= 0.25)
{
p_decParams->BG = 2;
kc = 52;
......@@ -391,8 +391,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
// This is a new packet, so compute quantities regarding segmentation
if (A > NR_MAX_PDSCH_TBS)
harq_process->B = A+24;
else
harq_process->B = A+16;
......@@ -531,7 +531,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (harq_process->C == 1){
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
crc_type = CRC24_A;
else
crc_type = CRC16;
......@@ -839,7 +839,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
else
Coderate = (float) (harq_process->R) /(float) 2048;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25)
if ((A <= 292) || ((A <= NR_MAX_PDSCH_TBS) && (Coderate <= 0.6667)) || Coderate <= 0.25)
{
p_decParams->BG = 2;
kc = 52;
......@@ -869,7 +869,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
harq_process->B = A+24;
else
harq_process->B = A+16;
......@@ -1056,7 +1056,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
memset(harq_process->c[r],0,Kr_bytes);
if (harq_process->C == 1){
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
crc_type = CRC24_A;
else
crc_type = CRC16;
......@@ -1359,7 +1359,7 @@ void nr_dlsch_decoding_process(void *arg)
else
Coderate = (float) (harq_process->R) /(float) 2048;
if ((A <=292) || ((A<=3824) && (Coderate <= 0.6667)) || Coderate <= 0.25)
if ((A <= 292) || ((A <= NR_MAX_PDSCH_TBS) && (Coderate <= 0.6667)) || Coderate <= 0.25)
{
p_decParams->BG = 2;
kc = 52;
......@@ -1390,7 +1390,7 @@ void nr_dlsch_decoding_process(void *arg)
harq_process->round =0;
// if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
harq_process->B = A+24;
else
harq_process->B = A+16;
......@@ -1514,7 +1514,7 @@ void nr_dlsch_decoding_process(void *arg)
memset(harq_process->c[r],0,Kr_bytes);
if (harq_process->C == 1){
if (A > 3824)
if (A > NR_MAX_PDSCH_TBS)
crc_type = CRC24_A;
else
crc_type = CRC16;
......
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
View file @ e1a92ead
......@@ -103,7 +103,7 @@ void free_list(NR_UE_SSB *node) {
}
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mode)
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol)
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int ret =-1;
......@@ -202,7 +202,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
char duplex_string[2][4] = {"FDD","TDD"};
char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode, int n_frames)
int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, int n_frames)
{
int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2,
......@@ -299,7 +299,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp);
nr_gold_pbch(ue);
ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss
ret = nr_pbch_detection(proc, ue, 1); // start pbch detection at first symbol after pss
if (ret == 0) {
// sync at symbol ue->symbol_offset
......
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
View file @ e1a92ead
......@@ -35,6 +35,7 @@
#include "PHY/sse_intrin.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/INIT/phy_init.h"
#include "openair1/SCHED_NR_UE/defs.h"
//#define DEBUG_PBCH
//#define DEBUG_PBCH_ENCODING
......@@ -608,23 +609,10 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
dl_indication.module_id = ue->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = proc->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change
rx_ind.rx_indication_body[0].mib_pdu.additional_bits = nr_ue_pbch_vars->xtra_byte;
rx_ind.rx_indication_body[0].mib_pdu.ssb_index = i_ssb; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
rx_ind.number_pdus = 1; //rx_ind.number_pdus++;
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_MIB, gNB_id, ue, NULL, number_pdus);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
......
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
View file @ e1a92ead
......@@ -1172,8 +1172,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
runmode_t mode);
int pbch_initial_symbol);
uint16_t rx_pbch_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id,
......@@ -1453,7 +1452,6 @@ void generate_RIV_tables(void);
*/
int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *phy_vars_ue,
runmode_t mode,
int n_frames);
/*!
......
openair1/PHY/defs_nr_UE.h
View file @ e1a92ead
This diff is collapsed.
openair1/PHY/defs_nr_common.h
View file @ e1a92ead
......@@ -89,7 +89,7 @@
#define NR_MAX_NUM_BWP 4
#define NR_MAX_PDCCH_AGG_LEVEL 16
#define NR_MAX_PDCCH_AGG_LEVEL 16 // 3GPP TS 38.211 V15.8 Section 7.3.2 Table 7.3.2.1-1: Supported PDCCH aggregation levels
#define NR_MAX_CSET_DURATION 3
#define NR_MAX_NB_RBG 18
......@@ -150,6 +150,11 @@ typedef enum {
MOD_QAM256
}nr_mod_t;
typedef enum {
RA_2STEP = 0,
RA_4STEP
} nr_ra_type_e;
typedef struct {
/// Size of first RBG
uint8_t start_size;
......@@ -205,8 +210,12 @@ typedef struct {
uint16_t prach_format;
/// Preamble index for PRACH (0-63)
uint8_t ra_PreambleIndex;
/// RACH MaskIndex
uint8_t ra_RACH_MaskIndex;
/// Preamble Tx Counter
uint8_t RA_PREAMBLE_TRANSMISSION_COUNTER;
/// Preamble Power Ramping Counter
uint8_t RA_PREAMBLE_POWER_RAMPING_COUNTER;
/// 2-step RA power offset
int POWER_OFFSET_2STEP_RA;
/// Target received power at gNB. Baseline is range -202..-60 dBm. Depends on delta preamble, power ramping counter and step.
int ra_PREAMBLE_RECEIVED_TARGET_POWER;
/// PRACH index for TDD (0 ... 6) depending on TDD configuration and prachConfigIndex
......@@ -217,8 +226,10 @@ typedef struct {
uint8_t RA_PREAMBLE_BACKOFF;
///
uint8_t RA_SCALING_FACTOR_BI;
///
uint8_t RA_PCMAX;
/// Indicating whether it is 2-step or 4-step RA
nr_ra_type_e RA_TYPE;
/// UE configured maximum output power
int RA_PCMAX;
/// Corresponding RA-RNTI for UL-grant
uint16_t ra_RNTI;
/// Pointer to Msg3 payload for UL-grant
......
openair1/PHY/phy_extern_nr_ue.h
View file @ e1a92ead
......@@ -25,6 +25,11 @@
#include "PHY/defs_nr_UE.h"
//#include "common/ran_context.h"
#ifdef XFORMS
#include "PHY/TOOLS/nr_phy_scope.h"
extern char do_forms;
#endif
extern char* namepointer_chMag ;
extern char* namepointer_log2;
extern char fmageren_name2[512];
......@@ -109,5 +114,8 @@ extern unsigned short Nb_81_110[8][4];
extern uint16_t hundred_times_log10_NPRB[100];
extern uint8_t alpha_lut[8];
extern uint8_t max_turbo_iterations;
extern double cpuf;
#endif /*__PHY_EXTERN_H__ */
openair1/SCHED_NR_UE/defs.h
View file @ e1a92ead
......@@ -20,6 +20,7 @@
*/
/*
\brief NR UE PHY functions prototypes
\author R. Knopp, F. Kaltenberger
\company EURECOM
\email knopp@eurecom.fr
......@@ -113,16 +114,14 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
@param ue Pointer to UE variables on which to act
@param proc Pointer to proc information
@param gNB_id Local id of eNB on which to act
@param mode calibration/debug mode
@param dlsch_parallel use multithreaded dlsch processing
*/
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
runmode_t mode,
uint8_t dlsch_parallel);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id, uint8_t abstraction_flag, uint8_t do_pdcch_flag, relaying_type_t r_type);
#ifdef UE_SLOT_PARALLELISATION
......@@ -223,7 +222,7 @@ void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
@param
@param
*/
void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id, runmode_t mode);
void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id);
int is_nr_prach_subframe(NR_DL_FRAME_PARMS *frame_parms, uint32_t frame, uint8_t subframe);
......@@ -305,15 +304,6 @@ int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
*/
void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx);
/*! \brief Compute the timing adjustment at UE side from the old TA offset and the new received TA command
@param Mod_id Local UE index on which to act
@param CC_id Component Carrier Index
@param ta_command TA command received from the network
@param mu numerology index (0,1,2..)
*/
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue, int frame_rx, int nr_slot_rx, uint16_t ta_command);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
......@@ -347,6 +337,8 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *phy_vars_ue,
*/
UE_MODE_t get_nrUE_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t gNB_index);
uint8_t get_ra_PreambleIndex(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_id);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param proc Pointer to proc descriptor
......@@ -396,8 +388,34 @@ int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
int is_ssb_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL_FRAME_PARMS *fp);
/*! \brief This function prepares the dl indication to pass to the MAC
@param
@param
@param
@param
*/
void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id);
/*@}*/
/*! \brief This function prepares the dl rx indication
@param
@param
@param
@param
*/
void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t pdu_type,
uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
uint16_t n_pdus);
#endif
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ e1a92ead
......@@ -42,6 +42,9 @@
extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
const char *dl_pdu_type[]={"DCI", "DLSCH", "RA_DLSCH"};
const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"};
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if(scheduled_response != NULL){
......@@ -61,14 +64,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
LOG_D(PHY,"Received %d DL pdus:\n",dl_config->number_pdus);
pdcch_vars->nb_search_space = 0;
for (i = 0; i < dl_config->number_pdus; ++i){
LOG_D(PHY, "In %s: received 1 DL %s PDU of %d total DL PDUs:\n", __FUNCTION__, dl_pdu_type[dl_config->dl_config_list[i].pdu_type - 1], dl_config->number_pdus);
if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI) {
LOG_D(PHY,"FAPI_NR_DL_CONFIG_TYPE_DCI\n");
fapi_nr_dl_config_dci_dl_pdu_rel15_t *pdcch_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
memcpy((void*)&pdcch_vars->pdcch_config[pdcch_vars->nb_search_space],(void*)pdcch_config,sizeof(*pdcch_config));
pdcch_vars->nb_search_space = pdcch_vars->nb_search_space + 1;
......@@ -77,11 +80,9 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
} else {
if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DLSCH){
LOG_D(PHY,"FAPI_NR_DL_CONFIG_TYPE_DLSCH\n");
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
}
else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH){
LOG_D(PHY,"FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH\n");
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_ra[0];
}
else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH){
......@@ -146,6 +147,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
for (i = 0; i < ul_config->number_pdus; ++i){
LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, pucch_resource_id, current_harq_pid, format, gNB_id = 0;
/* PRACH */
//NR_PRACH_RESOURCES_t *prach_resources;
......@@ -241,14 +244,15 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
// prach config pdu
prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
memcpy((void*)&(PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->prach_pdu), (void*)prach_config_pdu, sizeof(fapi_nr_ul_config_prach_pdu));
PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->prach_Config_enabled = 1;
break;
default:
break;
}
}
ul_config->number_pdus = 0;
memset(ul_config, 0, sizeof(fapi_nr_ul_config_request_t));
}
}
return 0;
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ e1a92ead
This diff is collapsed.
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
View file @ e1a92ead
......@@ -202,8 +202,6 @@ void nr_generate_pucch3_4(int32_t **txdataF,
*
*********************************************************************/
static int bwp_id = 1;
bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, bool reset_harq)
{
uint8_t sr_payload = 0;
......@@ -234,6 +232,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_PUCCH_Resource_t *pucch_resource;
uint16_t crnti = mac->crnti;
NR_BWP_Id_t bwp_id = mac->UL_BWP_Id;
/* update current context */
......@@ -762,7 +761,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
number_of_code_word = 1;
}
if (ue->n_connected_eNB > 1) {
if (ue->n_connected_gNB > 1) {
LOG_E(PHY,"PUCCH ACK feedback is not implemented for mutiple gNB cells : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME);
return (0);
}
......@@ -939,6 +938,7 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8
pucch_format_nr_t format_pucch;
int ready_pucch_resource_id = FALSE; /* in the case that it is already given */
NR_PUCCH_Resource_t *pucch_resource;
NR_BWP_Id_t bwp_id = mac->UL_BWP_Id;
/* ini values to unset */
*initial_pucch_id = NB_INITIAL_PUCCH_RESOURCE;
......@@ -1111,6 +1111,8 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8
int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size)
{
int pucch_resource_set_id = 0;
NR_BWP_Id_t bwp_id = mac->DL_BWP_Id;
//long *pucch_max_pl_bits = NULL;
/* from TS 38.331 field maxPayloadMinus1
......
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ e1a92ead
......@@ -1021,7 +1021,6 @@ int main(int argc, char **argv)
phy_procedures_nrUE_RX(UE,
&UE_proc,
0,
normal_txrx,
dlsch_threads);
//printf("dlsim round %d ends\n",round);
......
openair1/SIMULATION/NR_PHY/nr_dummy_functions.c
View file @ e1a92ead
......@@ -7,3 +7,15 @@ int32_t get_uldl_offset(int nr_bandP) { re
NR_IF_Module_t *NR_IF_Module_init(int Mod_id) {return(NULL);}
int dummy_nr_ue_dl_indication(nr_downlink_indication_t *dl_info) { return(0); }
int dummy_nr_ue_ul_indication(nr_uplink_indication_t *ul_info) { return(0); }
void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
uint8_t gNB_id) {}
void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
uint8_t pdu_type,
uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
uint16_t n_pdus) {}
openair1/SIMULATION/NR_PHY/nr_dummy_functions_prach.c
View file @ e1a92ead
......@@ -83,7 +83,6 @@ void nr_get_prach_resources(module_id_t mod_id,
int CC_id,
uint8_t gNB_id,
uint8_t t_id,
uint8_t first_Msg3,
NR_PRACH_RESOURCES_t *prach_resources,
NR_RACH_ConfigDedicated_t * rach_ConfigDedicated){
......@@ -206,9 +205,6 @@ void nr_get_prach_resources(module_id_t mod_id,
AssertFatal(1 == 0,"Unknown messagePowerOffsetGroupB %lu\n", nr_rach_ConfigCommon->groupBconfigured->messagePowerOffsetGroupB);
}
// todo Msg3-DeltaPreamble should be provided from higher layers, otherwise is 0
mac->deltaPreamble_Msg3 = 0;
deltaPreamble_Msg3 = mac->deltaPreamble_Msg3;
}
PLThreshold = prach_resources->RA_PCMAX - nr_rach_ConfigCommon->rach_ConfigGeneric.preambleReceivedTargetPower - deltaPreamble_Msg3 - messagePowerOffsetGroupB;
......
openair1/SIMULATION/NR_PHY/pbchsim.c
View file @ e1a92ead
......@@ -675,7 +675,7 @@ int main(int argc, char **argv)
}
if (UE->is_synchronized == 0) {
UE_nr_rxtx_proc_t proc={0};
ret = nr_initial_sync(&proc, UE, normal_txrx,1);
ret = nr_initial_sync(&proc, UE, 1);
printf("nr_initial_sync1 returns %d\n",ret);
if (ret<0) n_errors++;
}
......
openair1/SIMULATION/NR_PHY/prachsim.c
View file @ e1a92ead
......@@ -671,7 +671,7 @@ int main(int argc, char **argv){
UE_nr_rxtx_proc_t proc={0};
proc.frame_tx = frame;
proc.nr_slot_tx = slot;
nr_ue_prach_procedures(UE,&proc,0,0);
nr_ue_prach_procedures(UE, &proc, 0);
/* tx_lev_dB not used later, no need to set */
//tx_lev_dB = (unsigned int) dB_fixed(tx_lev);
......
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c
View file @ e1a92ead
......@@ -232,7 +232,7 @@ int test_pucch_basic_error(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pr
v_return = -1;
}
ue->n_connected_eNB = 2;
ue->n_connected_gNB = 2;
printf("\n => Test : Error due to PUCCH format with multiple cells not already implemented \n");
......@@ -240,7 +240,7 @@ int test_pucch_basic_error(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pr
v_return = -1;
}
ue->n_connected_eNB = 1;
ue->n_connected_gNB = 1;
return (v_return);
}
......
openair2/LAYER2/MAC/pre_processor.c
View file @ e1a92ead
......@@ -734,7 +734,7 @@ void calculate_max_mcs_min_rb(module_id_t mod_id,
/* find maximum MCS */
while ((phr - *tx_power < 0 || tbs > bytes) && *mcs > 3) {
mcs--;
(*mcs)--;
tbs = get_TBS_UL(*mcs, rb_table[*rb_index]);
*tx_power = estimate_ue_tx_power(tbs * 8, rb_table[*rb_index], 0, Ncp, 0);
}
......
openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c
View file @ e1a92ead
......@@ -82,8 +82,11 @@ uint32_t nr_compute_tbs(uint16_t Qm,
}
}
}
//printf("Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d\n", Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
LOG_D(PHY, "In %s: Ninfo %d nbp_re %d nb_re %d Qm %d, R %d, tbs %d\n", __FUNCTION__, Ninfo, nbp_re, nb_re, Qm, R, nr_tbs);
return nr_tbs;
}
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
View file @ e1a92ead
......@@ -20,7 +20,7 @@
*/
/* \file nr_mac.h
* \brief common MAC data structures, constant, and function prototype
* \brief common MAC data structures and constants
* \author R. Knopp, K.H. HSU, G. Casati
* \date 2019
* \version 0.1
......@@ -37,13 +37,30 @@
#include <stdlib.h>
#include <string.h>
#define TABLE_38213_13_1_NUM_INDEXES 15
#define TABLE_38213_13_2_NUM_INDEXES 14
#define TABLE_38213_13_3_NUM_INDEXES 9
#define TABLE_38213_13_4_NUM_INDEXES 16
#define TABLE_38213_13_5_NUM_INDEXES 9
#define TABLE_38213_13_6_NUM_INDEXES 10
#define TABLE_38213_13_7_NUM_INDEXES 12
#define TABLE_38213_13_8_NUM_INDEXES 8
#define TABLE_38213_13_9_NUM_INDEXES 4
#define TABLE_38213_13_10_NUM_INDEXES 8
#define TABLE_38213_13_11_NUM_INDEXES 16
#define TABLE_38213_13_12_NUM_INDEXES 14
// Definitions for MAC control and data
#define NR_BCCH_DL_SCH 3 // SI
#define NR_BCCH_BCH 5 // MIB
#define CCCH_PAYLOAD_SIZE_MAX 128
#define RAR_PAYLOAD_SIZE_MAX 128
#define MAX_BWP_SIZE 275
typedef enum frequency_range_e {
FR1 = 0,
FR2
} frequency_range_t;
// For both DL/UL-SCH
// Except:
......@@ -339,6 +356,113 @@ typedef struct {
#define NR_MAX_NUM_LCGID 8
#define MAX_RLC_SDU_SUBHEADER_SIZE 3
//===========
// PRACH defs
//===========
// ===============================================
// SSB to RO mapping public defines and structures
// ===============================================
#define MAX_SSB_PER_RO (16) // Maximum number of SSBs that can be mapped to a single RO
#define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot
#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
// PRACH occasion details
typedef struct prach_occasion_info {
uint8_t start_symbol; // 0 - 13 (14 symbols in a slot)
uint8_t fdm; // 0-7 (possible values of msg1-FDM: 1, 2, 4 or 8)
uint8_t slot; // 0 - 159 (maximum number of slots in a 10ms frame - @ 240kHz)
uint8_t frame; // 0 - 15 (maximum number of frames in a 160ms association pattern)
uint8_t mapped_ssb_idx[MAX_SSB_PER_RO]; // List of mapped SSBs
uint8_t nb_mapped_ssb;
uint16_t format; // RO preamble format
} prach_occasion_info_t;
// PRACH occasion slot details
// A PRACH occasion slot is a series of PRACH occasions in time (symbols) and frequency
typedef struct prach_occasion_slot {
prach_occasion_info_t prach_occasion[MAX_TDM][MAX_FDM]; // Starting symbol of each PRACH occasions in a slot
uint8_t nb_of_prach_occasion_in_time;
uint8_t nb_of_prach_occasion_in_freq;
} prach_occasion_slot_t;
//=========
// DCI defs
//=========
typedef enum {
NR_DL_DCI_FORMAT_1_0 = 0,
NR_DL_DCI_FORMAT_1_1,
NR_DL_DCI_FORMAT_2_0,
NR_DL_DCI_FORMAT_2_1,
NR_DL_DCI_FORMAT_2_2,
NR_DL_DCI_FORMAT_2_3,
NR_UL_DCI_FORMAT_0_0,
NR_UL_DCI_FORMAT_0_1
} nr_dci_format_t;
typedef enum {
NR_RNTI_new = 0,
NR_RNTI_C,
NR_RNTI_RA,
NR_RNTI_P,
NR_RNTI_CS,
NR_RNTI_TC,
NR_RNTI_SP_CSI,
NR_RNTI_SI,
NR_RNTI_SFI,
NR_RNTI_INT,
NR_RNTI_TPC_PUSCH,
NR_RNTI_TPC_PUCCH,
NR_RNTI_TPC_SRS,
NR_RNTI_MCS_C,
} nr_rnti_type_t;
typedef enum subcarrier_spacing_e {
scs_15kHz = 0x1,
scs_30kHz = 0x2,
scs_60kHz = 0x4,
scs_120kHz = 0x8,
scs_240kHz = 0x16
} subcarrier_spacing_t;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
bw_20MHz = 0x4,
bw_40MHz = 0x8,
bw_80MHz = 0x16,
bw_100MHz = 0x32
} channel_bandwidth_t;
typedef enum nr_ssb_and_cset_mux_pattern_type_e {
NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=1,
NR_SSB_AND_CSET_MUX_PATTERN_TYPE2,
NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
} nr_ssb_and_cset_mux_pattern_type_t;
typedef enum {
SFN_C_MOD_2_EQ_0,
SFN_C_MOD_2_EQ_1,
SFN_C_IMPOSSIBLE
} SFN_C_TYPE;
typedef struct Type0_PDCCH_CSS_config_s {
int32_t num_rbs;
int32_t num_symbols;
int32_t rb_offset; // Offset from SSB RB0
uint32_t type0_pdcch_ss_mux_pattern;
uint16_t frame;
SFN_C_TYPE sfn_c;
uint32_t n_c;
uint32_t n_0;
uint32_t number_of_search_space_per_slot;
uint32_t first_symbol_index;
uint32_t search_space_duration;
uint32_t ssb_length;
uint32_t ssb_index;
uint32_t cset_start_rb;
} NR_Type0_PDCCH_CSS_config_t;
#endif /*__LAYER2_MAC_H__ */
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @ e1a92ead
......@@ -2380,6 +2380,42 @@ uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB) {
return 4;
}
// Set the transform precoding status according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16:
// - "UE procedure for applying transform precoding on PUSCH"
uint8_t get_transformPrecoding(NR_ServingCellConfigCommon_t *scc,
NR_PUSCH_Config_t *pusch_config,
NR_BWP_Uplink_t *ubwp,
uint8_t *dci_format,
int rnti_type,
uint8_t configuredGrant){
if (configuredGrant) {
if (ubwp->bwp_Dedicated->configuredGrantConfig) {
if (ubwp->bwp_Dedicated->configuredGrantConfig->choice.setup->transformPrecoder) {
return *ubwp->bwp_Dedicated->configuredGrantConfig->choice.setup->transformPrecoder;
}
}
}
if (rnti_type != NR_RNTI_RA) {
if (*dci_format != NR_UL_DCI_FORMAT_0_0) {
if (pusch_config->transformPrecoder != NULL) {
return *pusch_config->transformPrecoder;
}
}
}
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL) {
return 1; // Transformprecoding disabled
} else {
LOG_D(PHY, "MAC_COMMON: Transform Precodig enabled through msg3_transformPrecoder\n");
return 0; // Enabled
}
LOG_E(MAC, "In %s: could not fetch transform precoder status...\n", __FUNCTION__);
return -1;
}
uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
NR_CellGroupConfig_t *secondaryCellGroup,
dci_pdu_rel15_t *dci_pdu,
......@@ -2442,8 +2478,8 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
rbg_size_config = 1;
else
rbg_size_config = 0;
numRBG = getNRBG(NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275),
NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275),
numRBG = getNRBG(NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
rbg_size_config);
if (pusch_Config->resourceAllocation == 0)
dci_pdu->frequency_domain_assignment.nbits = numRBG;
......@@ -2517,16 +2553,8 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
}
}
// Precoding info and number of layers
long transformPrecoder;
if (pusch_Config->transformPrecoder == NULL){
// if transform precoder is null, apply the values from msg3
if(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL)
transformPrecoder = 1;
else
transformPrecoder = 0;
}
else
transformPrecoder = *pusch_Config->transformPrecoder;
long transformPrecoder = get_transformPrecoding(scc, pusch_Config, ubwp, (uint8_t*)&format, rnti_type, 0);
if (pusch_Config->txConfig != NULL){
if (*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook){
if (pusch_antenna_ports > 1) {
......@@ -2637,8 +2665,8 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
size += dci_pdu->bwp_indicator.nbits;
// Freq domain assignment
rbg_size_config = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rbg_Size;
numRBG = getNRBG(NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275),
NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275),
numRBG = getNRBG(NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
rbg_size_config);
if (pdsch_config->resourceAllocation == 0)
dci_pdu->frequency_domain_assignment.nbits = numRBG;
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
View file @ e1a92ead
......@@ -20,13 +20,12 @@
*/
/*! \file mac.h
* \brief MAC data structures, constant, and function prototype
* \brief common MAC function prototypes
* \author Navid Nikaein and Raymond Knopp, WIE-TAI CHEN
* \date Dec. 2019
* \version 0.1
* \company Eurecom
* \email raymond.knopp@eurecom.fr
*/
#ifndef __LAYER2_NR_MAC_COMMON_H__
......@@ -38,128 +37,6 @@
#include "nr_mac.h"
#include "openair1/PHY/impl_defs_nr.h"
#define TABLE_38213_13_1_NUM_INDEXES 15
#define TABLE_38213_13_2_NUM_INDEXES 14
#define TABLE_38213_13_3_NUM_INDEXES 9
#define TABLE_38213_13_4_NUM_INDEXES 16
#define TABLE_38213_13_5_NUM_INDEXES 9
#define TABLE_38213_13_6_NUM_INDEXES 10
#define TABLE_38213_13_7_NUM_INDEXES 12
#define TABLE_38213_13_8_NUM_INDEXES 8
#define TABLE_38213_13_9_NUM_INDEXES 4
#define TABLE_38213_13_10_NUM_INDEXES 8
#define TABLE_38213_13_11_NUM_INDEXES 16
#define TABLE_38213_13_12_NUM_INDEXES 14
// ===============================================
// SSB to RO mapping public defines and structures
// ===============================================
#define MAX_SSB_PER_RO (16) // Maximum number of SSBs that can be mapped to a single RO
#define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot
#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
typedef enum frequency_range_e {
FR1 = 0,
FR2
} frequency_range_t;
// PRACH occasion details
typedef struct prach_occasion_info {
uint8_t start_symbol; // 0 - 13 (14 symbols in a slot)
uint8_t fdm; // 0-7 (possible values of msg1-FDM: 1, 2, 4 or 8)
uint8_t slot; // 0 - 159 (maximum number of slots in a 10ms frame - @ 240kHz)
uint8_t frame; // 0 - 15 (maximum number of frames in a 160ms association pattern)
uint8_t mapped_ssb_idx[MAX_SSB_PER_RO]; // List of mapped SSBs
uint8_t nb_mapped_ssb;
uint16_t format; // RO preamble format
} prach_occasion_info_t;
// PRACH occasion slot details
// A PRACH occasion slot is a series of PRACH occasions in time (symbols) and frequency
typedef struct prach_occasion_slot {
prach_occasion_info_t prach_occasion[MAX_TDM][MAX_FDM]; // Starting symbol of each PRACH occasions in a slot
uint8_t nb_of_prach_occasion_in_time;
uint8_t nb_of_prach_occasion_in_freq;
} prach_occasion_slot_t;
// ========================================
typedef enum {
NR_DL_DCI_FORMAT_1_0 = 0,
NR_DL_DCI_FORMAT_1_1,
NR_DL_DCI_FORMAT_2_0,
NR_DL_DCI_FORMAT_2_1,
NR_DL_DCI_FORMAT_2_2,
NR_DL_DCI_FORMAT_2_3,
NR_UL_DCI_FORMAT_0_0,
NR_UL_DCI_FORMAT_0_1
} nr_dci_format_t;
typedef enum {
NR_RNTI_new = 0,
NR_RNTI_C,
NR_RNTI_RA,
NR_RNTI_P,
NR_RNTI_CS,
NR_RNTI_TC,
NR_RNTI_SP_CSI,
NR_RNTI_SI,
NR_RNTI_SFI,
NR_RNTI_INT,
NR_RNTI_TPC_PUSCH,
NR_RNTI_TPC_PUCCH,
NR_RNTI_TPC_SRS,
NR_RNTI_MCS_C,
} nr_rnti_type_t;
typedef enum subcarrier_spacing_e {
scs_15kHz = 0x1,
scs_30kHz = 0x2,
scs_60kHz = 0x4,
scs_120kHz = 0x8,
scs_240kHz = 0x16
} subcarrier_spacing_t;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
bw_20MHz = 0x4,
bw_40MHz = 0x8,
bw_80MHz = 0x16,
bw_100MHz = 0x32
} channel_bandwidth_t;
typedef enum nr_ssb_and_cset_mux_pattern_type_e {
NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=1,
NR_SSB_AND_CSET_MUX_PATTERN_TYPE2,
NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
} nr_ssb_and_cset_mux_pattern_type_t;
typedef enum {
SFN_C_MOD_2_EQ_0,
SFN_C_MOD_2_EQ_1,
SFN_C_IMPOSSIBLE
} SFN_C_TYPE;
typedef struct Type0_PDCCH_CSS_config_s {
int32_t num_rbs;
int32_t num_symbols;
int32_t rb_offset; // Offset from SSB RB0
uint32_t type0_pdcch_ss_mux_pattern;
uint16_t frame;
SFN_C_TYPE sfn_c;
uint32_t n_c;
uint32_t n_0;
uint32_t number_of_search_space_per_slot;
uint32_t first_symbol_index;
uint32_t search_space_duration;
uint32_t ssb_length;
uint32_t ssb_index;
uint32_t cset_start_rb;
} NR_Type0_PDCCH_CSS_config_t;
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
void get_frame_type(uint16_t nr_bandP, uint8_t scs_index, lte_frame_type_t *current_type);
......@@ -266,4 +143,18 @@ bool set_dl_ptrs_values(NR_PTRS_DownlinkConfig_t *ptrs_config,
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols);
/* \brief Set the transform precoding according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16
@param *pusch_config, pointer to pusch config
@param *ubwp pointer to uplink bwp
@param *dci_format pointer to dci format
@param rnti_type rnti type
@param configuredGrant indicates whether a configured grant was received or not
@returns transformPrecoding value */
uint8_t get_transformPrecoding(NR_ServingCellConfigCommon_t *scc,
NR_PUSCH_Config_t *pusch_config,
NR_BWP_Uplink_t *ubwp,
uint8_t *dci_format,
int rnti_type,
uint8_t configuredGrant);
#endif
openair2/LAYER2/NR_MAC_UE/config_ue.c
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openair2/LAYER2/NR_MAC_UE/mac_defs.h
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openair2/LAYER2/NR_MAC_UE/mac_extern.h
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openair2/LAYER2/NR_MAC_UE/mac_proto.h
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openair2/LAYER2/NR_MAC_UE/mac_vars.c
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openair2/LAYER2/NR_MAC_UE/nr_l1_helpers.c
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openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c 0 → 100644
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openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @ e1a92ead
......@@ -465,8 +465,8 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
const int current_harq_pid = slot % num_slots_per_tdd;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
NR_UE_ret_info_t *retInfo = &sched_ctrl->retInfo[current_harq_pid];
const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
int rbStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int rbStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (harq->round != 0) { /* retransmission */
sched_ctrl->time_domain_allocation = retInfo->time_domain_allocation;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @ e1a92ead
......@@ -532,7 +532,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * 275];
uint16_t rbStart = 0;
while (vrb_map_UL[rbStart]) rbStart++;
const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
uint16_t rbSize = 1;
while (rbStart + rbSize < bwpSize && !vrb_map_UL[rbStart+rbSize])
rbSize++;
......@@ -701,8 +701,8 @@ void nr_schedule_ulsch(module_id_t module_id,
pusch_pdu->handle = 0; //not yet used
/* FAPI: BWP */
pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing;
pusch_pdu->cyclic_prefix = 0;
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
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openair2/RRC/LTE/rrc_eNB.c
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openair2/RRC/NR/MESSAGES/asn1_msg.c
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openair2/RRC/NR/nr_rrc_proto.h
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openair2/RRC/NR/rrc_gNB_nsa.c
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openair2/RRC/NR/rrc_gNB_reconfig.c
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openair2/RRC/NR_UE/rrc_UE.c
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openair2/RRC/NR_UE/rrc_defs.h
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openair2/X2AP/x2ap_eNB_generate_messages.c
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openair3/NGAP/ngap_gNB.c
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openair3/NGAP/ngap_gNB_nas_procedures.c
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targets/RT/USER/lte-ue.c
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