Commit e2254984 authored by Raymond Knopp's avatar Raymond Knopp

Merge branch 'RU-RAU-split' of https://gitlab.eurecom.fr/oai/openairinterface5g into RU-RAU-split

Conflicts:
	openair2/ENB_APP/enb_config.c
parents 6aa0ff09 ad98f5aa
This diff is collapsed.
......@@ -2123,11 +2123,11 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
if (dci_alloc[i].L == (uint8_t)L) {
//#ifdef DEBUG_DCI_ENCODING
#ifdef DEBUG_DCI_ENCODING
LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L,
*(unsigned int*)dci_alloc[i].dci_pdu);
dump_dci(frame_parms,&dci_alloc[i]);
//#endif
#endif
if (dci_alloc[i].firstCCE>=0) {
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
......
......@@ -882,7 +882,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dci_alloc->harq_pid = rel8->harq_process;
dci_alloc->ra_flag = 0;
LOG_I(PHY,"NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n",
LOG_D(PHY,"NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n",
rel8->dci_format,rel8->cce_idx,rel8->aggregation_level,rel8->rnti,rel8->harq_process);
if ((rel8->rnti_type == 2 ) && (rel8->rnti != SI_RNTI) && (rel8->rnti != P_RNTI)) dci_alloc->ra_flag = 1;
......@@ -1065,7 +1065,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
if (dlsch0_harq->round == 0)
dlsch0_harq->status = ACTIVE;
LOG_I(PHY,"DCI 1A: mcs %d, rballoc %x,rv %d, rnti %x\n",rel8->mcs_1,rel8->resource_block_coding,rel8->redundancy_version_1,rel8->rnti);
LOG_D(PHY,"DCI 1A: mcs %d, rballoc %x,rv %d, rnti %x\n",rel8->mcs_1,rel8->resource_block_coding,rel8->redundancy_version_1,rel8->rnti);
break;
case NFAPI_DL_DCI_FORMAT_1:
......@@ -6535,9 +6535,9 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
{
if (rnti == tc_rnti) {
//fix for standalone Contention Resolution Id
pdlsch0_harq->DCINdi = (uint8_t)-1;
LOG_D(PHY,"UE (%x/%d): Format1A DCI: C-RNTI is temporary. Set NDI = %d and to be ignored\n",
rnti,harq_pid,pdlsch0_harq->DCINdi);
pdlsch0_harq->DCINdi = (uint8_t)-1;
LOG_D(PHY,"UE (%x/%d): Format1A DCI: C-RNTI is temporary. Set NDI = %d and to be ignored\n",
rnti,harq_pid,pdlsch0_harq->DCINdi);
}
// DCI has been toggled or this is the first transmission
......
......@@ -43,12 +43,15 @@ const uint8_t lin2alaw_if4p5[65536] = {213, 213, 213, 213, 213, 213, 213, 213, 2
void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
LTE_DL_FRAME_PARMS *fp = &ru->frame_parms;
int32_t **txdataF = ru->common.txdataF_BF;
int32_t **rxdataF = ru->common.rxdataF;
int16_t **prach_rxsigF = ru->prach_rxsigF;
void *tx_buffer = ru->ifbuffer.tx[subframe&1];
void *tx_buffer_prach = ru->ifbuffer.tx_prach;
LTE_DL_FRAME_PARMS *fp = &ru->frame_parms;
int32_t **txdataF = ru->common.txdataF_BF;
int32_t **rxdataF = ru->common.rxdataF;
int16_t **prach_rxsigF = ru->prach_rxsigF;
#ifdef Rel14
int16_t ***prach_rxsigF_br = ru->prach_rxsigF_br;
#endif
void *tx_buffer = ru->ifbuffer.tx[subframe&1];
void *tx_buffer_prach = ru->ifbuffer.tx_prach;
uint16_t symbol_id=0, element_id=0;
......@@ -175,7 +178,8 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
perror("ETHERNET write for IF4p5_PULFFT\n");
}
}
} else if (packet_type == IF4p5_PRACH) {
} else if (packet_type >= IF4p5_PRACH &&
packet_type <= IF4p5_PRACH+4) {
// FIX: hard coded prach samples length
LOG_D(PHY,"IF4p5_PRACH: frame %d, subframe %d\n",frame,subframe);
db_fulllength = PRACH_NUM_SAMPLES;
......@@ -189,13 +193,24 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
}
gen_IF4p5_prach_header(packet_header, frame, subframe);
int16_t *rxF;
#ifdef Rel14
if (packet_type > IF4p5_PRACH)
rxF = &prach_rxsigF_br[packet_type - IF4p5_PRACH - 1][0][0];
else
#else
rxF = &prach_rxsigF[0][0];
#endif
if (eth->flags == ETH_RAW_IF4p5_MODE) {
memcpy((int16_t*)(tx_buffer_prach + MAC_HEADER_SIZE_BYTES + sizeof_IF4p5_header_t),
(&prach_rxsigF[0][0]),
PRACH_BLOCK_SIZE_BYTES);
memcpy((void *)(tx_buffer_prach + MAC_HEADER_SIZE_BYTES + sizeof_IF4p5_header_t),
(void*)rxF,
PRACH_BLOCK_SIZE_BYTES);
} else {
memcpy((int16_t*)(tx_buffer_prach + sizeof_IF4p5_header_t),
(&prach_rxsigF[0][0]),
memcpy((void *)(tx_buffer_prach + sizeof_IF4p5_header_t),
(void *)rxF,
PRACH_BLOCK_SIZE_BYTES);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_IF, 1 );
......@@ -204,7 +219,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
&tx_buffer_prach,
db_fulllength,
1,
IF4p5_PRACH)) < 0) {
packet_type)) < 0) {
perror("ETHERNET write for IF4p5_PRACH\n");
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE_IF, 0 );
......@@ -217,11 +232,14 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
}
void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint32_t *symbol_number) {
LTE_DL_FRAME_PARMS *fp = &ru->frame_parms;
int32_t **txdataF = ru->common.txdataF_BF;
int32_t **rxdataF = ru->common.rxdataF;
int16_t **prach_rxsigF = ru->prach_rxsigF;
void *rx_buffer = ru->ifbuffer.rx;
LTE_DL_FRAME_PARMS *fp = &ru->frame_parms;
int32_t **txdataF = ru->common.txdataF_BF;
int32_t **rxdataF = ru->common.rxdataF;
int16_t **prach_rxsigF = ru->prach_rxsigF;
#ifdef Rel14
int16_t ***prach_rxsigF_br = ru->prach_rxsigF_br;
#endif
void *rx_buffer = ru->ifbuffer.rx;
uint16_t element_id;
uint16_t db_fulllength, db_halflength;
......@@ -308,18 +326,28 @@ void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint
//if (element_id==0) LOG_I(PHY,"recv_if4p5: symbol %d rxdata0 = (%u,%u)\n",*symbol_number,*i,*(i+1));
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_DECOMPR_IF, 0 );
} else if (*packet_type == IF4p5_PRACH) {
} else if (*packet_type >= IF4p5_PRACH &&
*packet_type <= IF4p5_PRACH + 4) {
int16_t *rxF;
#ifdef Rel14
if (*packet_type > IF4p5_PRACH)
rxF = &prach_rxsigF_br[*packet_type - IF4p5_PRACH - 1][0][0];
else
#else
rxF = &prach_rxsigF[0][0];
#endif
// FIX: hard coded prach samples length
db_fulllength = PRACH_NUM_SAMPLES;
if (eth->flags == ETH_RAW_IF4p5_MODE) {
memcpy((&prach_rxsigF[0][0]),
memcpy(rxF,
(int16_t*) (rx_buffer+MAC_HEADER_SIZE_BYTES+sizeof_IF4p5_header_t),
PRACH_BLOCK_SIZE_BYTES);
} else {
memcpy((&prach_rxsigF[0][0]),
memcpy(rxF,
(int16_t*) (rx_buffer+sizeof_IF4p5_header_t),
PRACH_BLOCK_SIZE_BYTES);
}
......
......@@ -39,7 +39,11 @@
#define IF4p5_PULFFT 0x0019
#define IF4p5_PDLFFT 0x0020
#define IF4p5_PRACH 0x0021
#define IF4p5_PULTICK 0x0022
#define IF4p5_PRACH_BR_CE0 0x0021
#define IF4p5_PRACH_BR_CE1 0x0022
#define IF4p5_PRACH_BR_CE2 0x0023
#define IF4p5_PRACH_BR_CE3 0x0024
#define IF4p5_PULTICK 0x0025
struct IF4p5_header {
/// Type
......
......@@ -210,7 +210,7 @@ int generate_pbch(LTE_eNB_PBCH *eNB_pbch,
//#ifdef DEBUG_PBCH
for (i=0; i<(PBCH_A>>3); i++)
LOG_I(PHY,"[PBCH] pbch_data[%d] = %x\n",i,pbch_a[i]);
LOG_D(PHY,"[PBCH] pbch_data[%d] = %x\n",i,pbch_a[i]);
//#endif
......
This diff is collapsed.
......@@ -2074,14 +2074,21 @@ int32_t generate_prach(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,
\brief Process PRACH waveform
@param phy_vars_eNB Pointer to eNB top-level descriptor. If NULL, then this is an RRU
@param ru Pointer to RU top-level descriptor. If NULL, then this is an eNB and we make use of the RU_list
@param preamble_energy_list List of energies for each candidate preamble
@param preamble_delay_list List of delays for each candidate preamble
@param max_preamble most likely preamble
@param max_preamble_energy Estimated Energy of most likely preamble
@param max_preamble_delay Estimated Delay of most likely preamble
@param Nf System frame number
@param tdd_mapindex Index of PRACH resource in Table 5.7.1-4 (TDD)
@param br_flag indicator to act on eMTC PRACH
@returns 0 on success
*/
void rx_prach(PHY_VARS_eNB *phy_vars_eNB,RU_t *ru,uint16_t *preamble_energy_list, uint16_t *preamble_delay_list, uint16_t Nf, uint8_t tdd_mapindex);
void rx_prach(PHY_VARS_eNB *phy_vars_eNB,RU_t *ru,
uint16_t *max_preamble,
uint16_t *max_preamble_energy,
uint16_t *max_preamble_delay,
uint16_t Nf, uint8_t tdd_mapindex,
uint8_t br_flag);
/*!
\brief Helper for MAC, returns number of available PRACH in TDD for a particular configuration index
......@@ -2169,7 +2176,10 @@ double computeRhoB_UE(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
LTE_UE_DLSCH_t *dlsch_ue);
*/
uint8_t get_prach_prb_offset(LTE_DL_FRAME_PARMS *frame_parms, uint8_t tdd_mapindex, uint16_t Nf);
uint8_t get_prach_prb_offset(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t prach_ConfigIndex,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf);
uint8_t ul_subframe2pdcch_alloc_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n);
......
......@@ -288,6 +288,10 @@ typedef struct RU_proc_t_s {
int subframe_tx;
/// subframe to act upon for reception of prach
int subframe_prach;
#ifdef Rel14
/// subframe to act upon for reception of prach BL/CE UEs
int subframe_prach_br;
#endif
/// frame to act upon for reception
int frame_rx;
/// frame to act upon for transmission
......@@ -296,6 +300,10 @@ typedef struct RU_proc_t_s {
int frame_tx_unwrap;
/// frame to act upon for reception of prach
int frame_prach;
#ifdef Rel14
/// frame to act upon for reception of prach
int frame_prach_br;
#endif
/// frame offset for slave RUs (to correct for frame asynchronism at startup)
int frame_offset;
/// \brief Instance count for FH processing thread.
......@@ -303,6 +311,10 @@ typedef struct RU_proc_t_s {
int instance_cnt_FH;
/// \internal This variable is protected by \ref mutex_prach.
int instance_cnt_prach;
#ifdef Rel14
/// \internal This variable is protected by \ref mutex_prach.
int instance_cnt_prach_br;
#endif
/// \internal This variable is protected by \ref mutex_synch.
int instance_cnt_synch;
/// \internal This variable is protected by \ref mutex_eNBs.
......@@ -316,6 +328,10 @@ typedef struct RU_proc_t_s {
pthread_t pthread_FH;
/// pthread structure for RU prach processing thread
pthread_t pthread_prach;
#ifdef Rel14
/// pthread structure for RU prach processing thread BL/CE UEs
pthread_t pthread_prach_br;
#endif
/// pthread struct for RU synch thread
pthread_t pthread_synch;
/// pthread struct for RU RX FEP thread
......@@ -330,6 +346,10 @@ typedef struct RU_proc_t_s {
pthread_attr_t attr_FH;
/// pthread attributes for RU prach
pthread_attr_t attr_prach;
#ifdef Rel14
/// pthread attributes for RU prach BL/CE UEs
pthread_attr_t attr_prach_br;
#endif
/// pthread attributes for RU synch thread
pthread_attr_t attr_synch;
/// pthread attributes for asynchronous RX thread
......@@ -340,6 +360,10 @@ typedef struct RU_proc_t_s {
struct sched_param sched_param_FH;
/// scheduling parameters for RU prach thread
struct sched_param sched_param_prach;
#ifdef Rel14
/// scheduling parameters for RU prach thread BL/CE UEs
struct sched_param sched_param_prach_br;
#endif
/// scheduling parameters for RU synch thread
struct sched_param sched_param_synch;
/// scheduling parameters for asynch_rxtx thread
......@@ -348,6 +372,10 @@ typedef struct RU_proc_t_s {
pthread_cond_t cond_FH;
/// condition variable for RU prach thread
pthread_cond_t cond_prach;
#ifdef Rel14
/// condition variable for RU prach thread BL/CE UEs
pthread_cond_t cond_prach_br;
#endif
/// condition variable for RU synch thread
pthread_cond_t cond_synch;
/// condition variable for asynch RX/TX thread
......@@ -360,6 +388,10 @@ typedef struct RU_proc_t_s {
pthread_mutex_t mutex_FH;
/// mutex for RU prach
pthread_mutex_t mutex_prach;
#ifdef Rel14
/// mutex for RU prach BL/CE UEs
pthread_mutex_t mutex_prach_br;
#endif
/// mutex for RU synch
pthread_mutex_t mutex_synch;
/// mutex for eNB signal
......@@ -390,20 +422,30 @@ typedef struct eNB_proc_t_s {
int subframe_rx;
/// subframe to act upon for PRACH
int subframe_prach;
#ifdef Rel14
/// subframe to act upon for reception of prach BL/CE UEs
int subframe_prach_br;
#endif
/// frame to act upon for reception
int frame_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for PRACH
int frame_prach;
#ifdef Rel14
/// frame to act upon for PRACH BL/CE UEs
int frame_prach_br;
#endif
/// \internal This variable is protected by \ref mutex_td.
int instance_cnt_td;
/// \internal This variable is protected by \ref mutex_te.
int instance_cnt_te;
/// \brief Instance count for FH processing thread.
/// \brief Instance count for rx processing thread.
/// \internal This variable is protected by \ref mutex_prach.
int instance_cnt_prach;
#ifdef Rel14
/// \internal This variable is protected by \ref mutex_prach for BL/CE UEs.
int instance_cnt_prach_br;
#endif
// instance count for over-the-air eNB synchronization
int instance_cnt_synch;
/// \internal This variable is protected by \ref mutex_asynch_rxtx.
......@@ -424,6 +466,10 @@ typedef struct eNB_proc_t_s {
pthread_attr_t attr_single;
/// pthread attributes for prach processing thread
pthread_attr_t attr_prach;
#ifdef Rel14
/// pthread attributes for prach processing thread BL/CE UEs
pthread_attr_t attr_prach_br;
#endif
/// pthread attributes for asynchronous RX thread
pthread_attr_t attr_asynch_rxtx;
/// scheduling parameters for parallel turbo-decoder thread
......@@ -434,6 +480,10 @@ typedef struct eNB_proc_t_s {
struct sched_param sched_param_single;
/// scheduling parameters for prach thread
struct sched_param sched_param_prach;
#ifdef Rel14
/// scheduling parameters for prach thread
struct sched_param sched_param_prach_br;
#endif
/// scheduling parameters for asynch_rxtx thread
struct sched_param sched_param_asynch_rxtx;
/// pthread structure for parallel turbo-decoder thread
......@@ -442,12 +492,20 @@ typedef struct eNB_proc_t_s {
pthread_t pthread_te;
/// pthread structure for PRACH thread
pthread_t pthread_prach;
#ifdef Rel14
/// pthread structure for PRACH thread BL/CE UEs
pthread_t pthread_prach_br;
#endif
/// condition variable for parallel turbo-decoder thread
pthread_cond_t cond_td;
/// condition variable for parallel turbo-encoder thread
pthread_cond_t cond_te;
/// condition variable for PRACH processing thread;
pthread_cond_t cond_prach;
#ifdef Rel14
/// condition variable for PRACH processing thread BL/CE UEs;
pthread_cond_t cond_prach_br;
#endif
/// condition variable for asynch RX/TX thread
pthread_cond_t cond_asynch_rxtx;
/// mutex for parallel turbo-decoder thread
......@@ -456,16 +514,26 @@ typedef struct eNB_proc_t_s {
pthread_mutex_t mutex_te;
/// mutex for PRACH thread
pthread_mutex_t mutex_prach;
#ifdef Rel14
/// mutex for PRACH thread for BL/CE UEs
pthread_mutex_t mutex_prach_br;
#endif
/// mutex for asynch RX/TX thread
pthread_mutex_t mutex_asynch_rxtx;
/// mutex for RU access to eNB processing (PDSCH/PUSCH)
pthread_mutex_t mutex_RU;
/// mutex for RU access to eNB processing (PRACH)
pthread_mutex_t mutex_RU_PRACH;
/// mutex for RU access to eNB processing (PRACH BR)
pthread_mutex_t mutex_RU_PRACH_br;
/// mask for RUs serving eNB (PDSCH/PUSCH)
int RU_mask;
/// mask for RUs serving eNB (PRACH)
int RU_mask_prach;
#ifdef Rel14
/// mask for RUs serving eNB (PRACH)
int RU_mask_prach_br;
#endif
/// parameters for turbo-decoding worker thread
td_params tdp;
/// parameters for turbo-encoding worker thread
......@@ -631,6 +699,8 @@ typedef struct RU_t_s{
int (*wakeup_rxtx)(struct PHY_VARS_eNB_s *eNB,int frame_rx,int subframe_rx);
/// function pointer to wakeup routine in lte-enb.
int (*wakeup_prach_eNB)(struct PHY_VARS_eNB_s *eNB,struct RU_t_s *ru,int frame,int subframe);
/// function pointer to wakeup routine in lte-enb.
int (*wakeup_prach_eNB_br)(struct PHY_VARS_eNB_s *eNB,struct RU_t_s *ru,int frame,int subframe);
/// function pointer to eNB entry routine
void (*eNB_top)(struct PHY_VARS_eNB_s *eNB, int frame_rx, int subframe_rx, char *string);
/// Timing statistics
......@@ -642,6 +712,8 @@ typedef struct RU_t_s{
/// received frequency-domain signal for PRACH (IF4p5 RRU)
int16_t **prach_rxsigF;
/// received frequency-domain signal for PRACH BR (IF4p5 RRU)
int16_t **prach_rxsigF_br[4];
/// sequence number for IF5
uint8_t seqno;
/// initial timestamp used as an offset make first real timestamp 0
......@@ -829,12 +901,23 @@ typedef struct PHY_VARS_eNB_s {
IF_Module_t *if_inst;
UL_IND_t UL_INFO;
pthread_mutex_t UL_INFO_mutex;
/// NFAPI RX ULSCH information
nfapi_rx_indication_pdu_t rx_pdu_list[NFAPI_RX_IND_MAX_PDU];
/// NFAPI RX ULSCH CRC information
nfapi_crc_indication_pdu_t crc_pdu_list[NFAPI_CRC_IND_MAX_PDU];
/// NFAPI PRACH information
nfapi_preamble_pdu_t preamble_list[MAX_NUM_RX_PRACH_PREAMBLES];
#ifdef Rel14
/// NFAPI PRACH information BL/CE UEs
nfapi_preamble_pdu_t preamble_list_br[MAX_NUM_RX_PRACH_PREAMBLES];
#endif
Sched_Rsp_t Sched_INFO;
LTE_eNB_PDCCH pdcch_vars[2];
#ifdef Rel14
LTE_eNB_EPDCCH epdcch_vars[2];
LTE_eNB_MPDCCH mpdcch_vars[2];
LTE_eNB_PRACH prach_vars_br;
#endif
LTE_eNB_COMMON common_vars;
LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX];
LTE_eNB_PBCH pbch;
......@@ -1364,6 +1447,13 @@ typedef struct RRU_config_s {
int prach_FreqOffset[MAX_BANDS_PER_RRU];
/// prach_ConfigIndex for IF4p5
int prach_ConfigIndex[MAX_BANDS_PER_RRU];
#ifdef Rel14
int emtc_prach_CElevel_enable[MAX_BANDS_PER_RRU][4];
/// emtc_prach_FreqOffset for IF4p5 per CE Level
int emtc_prach_FreqOffset[MAX_BANDS_PER_RRU][4];
/// emtc_prach_ConfigIndex for IF4p5 per CE Level
int emtc_prach_ConfigIndex[MAX_BANDS_PER_RRU][4];
#endif
} RRU_config_t;
......
......@@ -56,6 +56,8 @@
#define MAX_MBSFN_AREA 8
#define NB_RX_ANTENNAS_MAX 64
#ifdef OCP_FRAMEWORK
#include "enums.h"
#else
......@@ -99,6 +101,8 @@ typedef struct {
uint8_t prach_FreqOffset;
} PRACH_CONFIG_INFO;
/// PRACH-ConfigSIB or PRACH-Config from 36.331 RRC spec
typedef struct {
/// Parameter: RACH_ROOT_SEQUENCE, see TS 36.211 (5.7.1). \vr{[0..837]}
......@@ -109,6 +113,44 @@ typedef struct {
PRACH_CONFIG_INFO prach_ConfigInfo;
} PRACH_CONFIG_COMMON;
#ifdef Rel14
/// PRACH-eMTC-Config from 36.331 RRC spec
typedef struct {
/// Parameter: High-speed-flag, see TS 36.211 (5.7.2). \vr{[0..1]} 1 corresponds to Restricted set and 0 to Unrestricted set.
uint8_t highSpeedFlag;
/// Parameter: \f$N_\text{CS}\f$, see TS 36.211 (5.7.2). \vr{[0..15]}\n Refer to table 5.7.2-2 for preamble format 0..3 and to table 5.7.2-3 for preamble format 4.
uint8_t zeroCorrelationZoneConfig;
/// Parameter: prach-FrequencyOffset, see TS 36.211 (5.7.1). \vr{[0..94]}\n For TDD the value range is dependent on the value of \ref prach_ConfigIndex.
/// PRACH starting subframe periodicity, expressed in number of subframes available for preamble transmission (PRACH opportunities), see TS 36.211. Value 2 corresponds to 2 subframes, 4 corresponds to 4 subframes and so on. EUTRAN configures the PRACH starting subframe periodicity larger than or equal to the Number of PRACH repetitions per attempt for each CE level (numRepetitionPerPreambleAttempt).
uint8_t prach_starting_subframe_periodicity[4];
/// number of repetitions per preamble attempt per CE level
uint8_t prach_numRepetitionPerPreambleAttempt[4];
/// prach configuration index for each CE level
uint8_t prach_ConfigIndex[4];
/// indicator for CE level activation
uint8_t prach_CElevel_enable[4];
/// prach frequency offset for each CE level
uint8_t prach_FreqOffset[4];
/// indicator for CE level hopping activation
uint8_t prach_hopping_enable[4];
/// indicator for CE level hopping activation
uint8_t prach_hopping_offset[4];
} PRACH_eMTC_CONFIG_INFO;
#endif
/// PRACH-ConfigSIB or PRACH-Config from 36.331 RRC spec
typedef struct {
/// Parameter: RACH_ROOT_SEQUENCE, see TS 36.211 (5.7.1). \vr{[0..837]}
uint16_t rootSequenceIndex;
/// prach_Config_enabled=1 means enabled. \vr{[0..1]}
uint8_t prach_Config_enabled;
/// PRACH Configuration Information
PRACH_eMTC_CONFIG_INFO prach_ConfigInfo;
} PRACH_eMTC_CONFIG_COMMON;
/// Enumeration for parameter \f$N_\text{ANRep}\f$ \ref PUCCH_CONFIG_DEDICATED::repetitionFactor.
typedef enum {
n2=0,
......@@ -546,6 +588,10 @@ typedef struct {
uint8_t nb_antenna_ports_eNB;
/// PRACH_CONFIG
PRACH_CONFIG_COMMON prach_config_common;
#ifdef Rel14
/// PRACH_eMTC_CONFIG
PRACH_eMTC_CONFIG_COMMON prach_emtc_config_common;
#endif
/// PUCCH Config Common (from 36-331 RRC spec)
PUCCH_CONFIG_COMMON pucch_config_common;
/// PDSCH Config Common (from 36-331 RRC spec)
......@@ -1138,13 +1184,19 @@ typedef struct {
/// \brief ?.
/// first index: rx antenna [0..63] (hard coded) \note Hard coded array size indexed by \c nb_antennas_rx.
/// second index: ? [0..ofdm_symbol_size*12[
int16_t *rxsigF[64];
int16_t **rxsigF;
/// \brief local buffer to compute prach_ifft (necessary in case of multiple CCs)
/// first index: rx antenna [0..63] (hard coded) \note Hard coded array size indexed by \c nb_antennas_rx.
/// second index: ? [0..2047] (hard coded)
int16_t *prach_ifft[64];
/// NFAPI PRACH information
nfapi_preamble_pdu_t preamble_list[MAX_NUM_RX_PRACH_PREAMBLES];
int32_t ***prach_ifft;
/// repetition number
#ifdef Rel14
/// indicator of first frame in a group of PRACH repetitions
int first_frame[4];
/// current repetition for each CE level
int repetition_number[4];
#endif
} LTE_eNB_PRACH;
typedef struct {
......@@ -1162,6 +1214,7 @@ typedef struct {
uint8_t *Msg3;
} PRACH_RESOURCES_t;
typedef struct {
/// Downlink Power offset field
uint8_t dl_pow_off;
......
......@@ -199,10 +199,13 @@ void phy_procedures_eNB_S_RX(PHY_VARS_eNB *phy_vars_eNB,eNB_rxtx_proc_t *proc,re
/*! \brief Scheduling for eNB PRACH RX procedures
@param phy_vars_eNB Pointer to eNB variables on which to act
@param proc Pointer to RXn-TXnp4 proc information
@param br_flag indicator for eMTC PRACH
*/
void prach_procedures(PHY_VARS_eNB *eNB);
void prach_procedures(PHY_VARS_eNB *eNB,
#ifdef Rel14
int br_flag
#endif
);
/*! \brief Function to compute subframe type as a function of Frame type and TDD Configuration (implements Table 4.2.2 from 36.211, p.11 from version 8.6) and subframe index.
@param frame_parms Pointer to DL frame parameter descriptor
@param subframe Subframe index
......
This diff is collapsed.
This diff is collapsed.
......@@ -330,7 +330,7 @@ void config_sib2(int Mod_idP,
cfg->emtc_config.prach_catm_zero_correlation_zone_configuration.value = radioResourceConfigCommon_BRP->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig;
cfg->emtc_config.prach_catm_high_speed_flag.value = radioResourceConfigCommon_BRP->prach_Config.prach_ConfigInfo.highSpeedFlag;
struct PRACH_ConfigSIB_v1310 *ext4_prach=radioResourceConfigCommonP->ext4->prach_ConfigCommon_v1310;
struct PRACH_ConfigSIB_v1310 *ext4_prach=radioResourceConfigCommon_BRP->ext4->prach_ConfigCommon_v1310;
PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13;
int i;
......@@ -342,40 +342,44 @@ void config_sib2(int Mod_idP,
switch (prach_ParametersListCE_r13->list.count) {
case 4:
p=prach_ParametersListCE_r13->list.array[3];
cfg->emtc_config.prach_ce_level_3_enable.value = 1;
cfg->emtc_config.prach_ce_level_3_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_3_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_3_enable.value = 1;
cfg->emtc_config.prach_ce_level_3_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_3_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_3_number_of_repetitions_per_attempt.value = p->numRepetitionPerPreambleAttempt_r13;
if (p->prach_StartingSubframe_r13)
cfg->emtc_config.prach_ce_level_3_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_3_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_3_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
cfg->emtc_config.prach_ce_level_3_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_3_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_3_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
case 3:
p=prach_ParametersListCE_r13->list.array[2];
cfg->emtc_config.prach_ce_level_2_enable.value = 1;
cfg->emtc_config.prach_ce_level_2_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_2_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_2_enable.value = 1;
cfg->emtc_config.prach_ce_level_2_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_2_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_2_number_of_repetitions_per_attempt.value = p->numRepetitionPerPreambleAttempt_r13;
if (p->prach_StartingSubframe_r13)
cfg->emtc_config.prach_ce_level_2_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_2_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_2_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
cfg->emtc_config.prach_ce_level_2_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_2_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_2_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
case 2:
p=prach_ParametersListCE_r13->list.array[1];
cfg->emtc_config.prach_ce_level_1_enable.value = 1;
cfg->emtc_config.prach_ce_level_1_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_1_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_1_enable.value = 1;
cfg->emtc_config.prach_ce_level_1_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_1_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.value = p->numRepetitionPerPreambleAttempt_r13;
if (p->prach_StartingSubframe_r13)
cfg->emtc_config.prach_ce_level_1_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_1_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_1_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
cfg->emtc_config.prach_ce_level_1_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_1_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_1_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
case 1:
p=prach_ParametersListCE_r13->list.array[0];
cfg->emtc_config.prach_ce_level_0_enable.value = 1;
cfg->emtc_config.prach_ce_level_0_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_0_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_0_enable.value = 1;
cfg->emtc_config.prach_ce_level_0_configuration_index.value = p->prach_ConfigIndex_r13;
cfg->emtc_config.prach_ce_level_0_frequency_offset.value = p->prach_FreqOffset_r13;
cfg->emtc_config.prach_ce_level_0_number_of_repetitions_per_attempt.value = p->numRepetitionPerPreambleAttempt_r13;
if (p->prach_StartingSubframe_r13)
cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_0_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_0_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value = *p->prach_StartingSubframe_r13;
cfg->emtc_config.prach_ce_level_0_hopping_enable.value = p->prach_HoppingConfig_r13;
cfg->emtc_config.prach_ce_level_0_hopping_offset.value = cfg->rf_config.ul_channel_bandwidth.value-6;
}
struct FreqHoppingParameters_r13 *ext4_freqHoppingParameters = radioResourceConfigCommonP->ext4->freqHoppingParameters_r13;
......
......@@ -824,10 +824,18 @@ typedef struct {
uint8_t generate_rar;
/// Subframe where preamble was received
uint8_t preamble_subframe;
/// Subframe where Msg2 is to be sent
uint8_t Msg2_subframe;
/// Frame where Msg2 is to be sent
uint8_t Msg2_frame;
/// Subframe where Msg3 is to be sent
uint8_t Msg3_subframe;
/// Subframe where Msg3 is to be sent
/// Frame where Msg3 is to be sent
uint8_t Msg3_frame;
/// Subframe where Msg4 is to be sent
uint8_t Msg4_subframe;
/// Frame where Msg4 is to be sent
uint8_t Msg4_frame;
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
uint8_t generate_Msg4;
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
......@@ -846,6 +854,13 @@ typedef struct {
int16_t RRC_timer;
/// Round of Msg3 HARQ
uint8_t msg3_round;
#ifdef Rel14
uint8_t rach_resource_type;
uint8_t msg2_mpdcch_repetition_cnt;
uint8_t msg4_mpdcch_repetition_cnt;
uint8_t msg2_narrowband;
uint8_t msg34_narrowband;
#endif
} RA_TEMPLATE;
......@@ -962,7 +977,7 @@ typedef struct eNB_MAC_INST_s {
/// Ethernet parameters for fronthaul interface
eth_params_t eth_params_s;
///
uint16_t Node_id;
module_id_t Mod_id;
/// frame counter
frame_t frame;
/// subframe counter
......@@ -1030,6 +1045,15 @@ typedef struct eNB_MAC_INST_s {
* UE part
*/
typedef enum {
TYPE0,
TYPE1,
TYPE1A,
TYPE2,
TYPE2A,
TYPEUESPEC
} MPDCCH_TYPES_t;
/*!\brief UE layer 2 status */
typedef enum {
CONNECTION_OK=0,
......
......@@ -313,10 +313,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
#endif
LOG_I(MAC,"[eNB %d][before switch] Frame %d, Subframe %d CC_id %d RA 0 is active, Msg3 in (%d,%d), (%d,%d,%d,%d) UL_pdus %d\n",
module_idP,frameP,subframeP,CC_id,cc[0].RA_template[0].Msg3_frame,cc[0].RA_template[0].Msg3_subframe,
cc[0].RA_template[0].RA_active,cc[0].RA_template[1].RA_active,cc[0].RA_template[2].RA_active,cc[0].RA_template[3].RA_active,
RC.mac[module_idP]->UL_req[0].ul_config_request_body.number_of_pdus);
switch (subframeP) {
case 0:
......@@ -326,9 +323,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// schedule_RA(module_idP,frameP,subframeP,2);
LOG_I(MAC,"Scheduling MIB\n");
LOG_D(MAC,"Scheduling MIB\n");
if ((frameP&3) == 0) schedule_mib(module_idP,frameP,subframeP);
LOG_I(MAC,"NFAPI: number_of_pdus %d, number_of_TX_req %d\n",
LOG_D(MAC,"NFAPI: number_of_pdus %d, number_of_TX_req %d\n",
DL_req[0].dl_config_request_body.number_pdu,
TX_req[0].tx_request_body.number_of_pdus);
if (cc[0].tdd_Config == NULL) { //FDD
......@@ -1026,21 +1023,12 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
LOG_I(MAC,"FrameP %d, subframeP %d : Scheduling CCEs/Msg3\n",frameP,subframeP);
LOG_I(MAC,"[eNB %d][before] Frame %d, Subframe %d CC_id %d RA 0 is active, Msg3 in (%d,%d) (%d,%d,%d,%d) UL_pdus %d\n",
module_idP,frameP,subframeP,CC_id,cc[0].RA_template[0].Msg3_frame,cc[0].RA_template[0].Msg3_subframe,
cc[0].RA_template[0].RA_active,cc[0].RA_template[1].RA_active,cc[0].RA_template[2].RA_active,cc[0].RA_template[3].RA_active,
RC.mac[module_idP]->UL_req[0].ul_config_request_body.number_of_pdus);
// Allocate CCEs and Msg3 for good after scheduling is done
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
allocate_CCEs(module_idP,CC_id,subframeP,0);
check_and_add_msg3(module_idP,frameP,subframeP);
}
LOG_I(MAC,"[eNB %d][after] Frame %d, Subframe %d CC_id 0 RA 0 is active, Msg3 in (%d,%d) (%d,%d,%d,%d) UL_pdus %d\n",
module_idP,frameP,subframeP,cc[0].RA_template[0].Msg3_frame,cc[0].RA_template[0].Msg3_subframe,
cc[0].RA_template[0].RA_active,cc[0].RA_template[1].RA_active,cc[0].RA_template[2].RA_active,cc[0].RA_template[3].RA_active,
RC.mac[module_idP]->UL_req[0].ul_config_request_body.number_of_pdus);
#if defined(FLEXRAN_AGENT_SB_IF)
#ifndef DISABLE_CONT_STATS
//Send subframe trigger to the controller
......
This diff is collapsed.
......@@ -496,12 +496,12 @@ void schedule_mib(module_id_t module_idP,
module_idP,
0); // not used in this case
LOG_I(MAC,"Frame %d, subframe %d: BCH PDU length %d\n",
LOG_D(MAC,"Frame %d, subframe %d: BCH PDU length %d\n",
frameP,subframeP,mib_sdu_length);
if (mib_sdu_length > 0) {
LOG_I(MAC,"Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n",
LOG_D(MAC,"Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n",
frameP,subframeP,dl_req->number_pdu,mib_sdu_length);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
......@@ -513,7 +513,7 @@ void schedule_mib(module_id_t module_idP,
dl_config_pdu->bch_pdu.bch_pdu_rel8.transmission_power = 6000;
dl_req->number_pdu++;
LOG_I(MAC,"eNB->DL_req[0].number_pdu %d (%p)\n",
LOG_D(MAC,"eNB->DL_req[0].number_pdu %d (%p)\n",
dl_req->number_pdu,&dl_req->number_pdu);
// DL request
......@@ -647,7 +647,7 @@ schedule_SI(
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4);
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,SI_RNTI)) {
LOG_I(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n",
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n",
frameP,subframeP);
dl_req->number_dci++;
dl_req->number_pdu++;
......
......@@ -208,6 +208,8 @@ void get_Msg3alloc(COMMON_channels_t *cc,
}
}
void get_Msg3allocret(COMMON_channels_t *cc,
unsigned char current_subframe,
unsigned int current_frame,
......@@ -401,6 +403,67 @@ uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
}
#ifdef Rel14
int get_numnarrowbands(long dl_Bandwidth) {
int nb_tab[6] = {1,2,4,8,12,16};
AssertFatal(dl_Bandwidth<7 || dl_Bandwidth>=0,"dl_Bandwidth not in [0..6]\n");
return(nb_tab[dl_Bandwidth]);
}
int get_numnarrowbandbits(long dl_Bandwidth) {
int nbbits_tab[6] = {0,1,2,3,4,4};
AssertFatal(dl_Bandwidth<7 || dl_Bandwidth>=0,"dl_Bandwidth not in [0..6]\n");
return(nbbits_tab[dl_Bandwidth]);
}
//This implements the frame/subframe condition for first subframe of MPDCCH transmission (Section 9.1.5 36.213, Rel 13/14)
int startSF_fdd_RA_times2[8] = {2,3,4,5,8,10,16,20};
int startSF_tdd_RA[7] = {1,2,4,5,8,10,20};
int mpdcch_sf_condition(eNB_MAC_INST *eNB,int CC_id, frame_t frameP,sub_frame_t subframeP,int rmax,MPDCCH_TYPES_t mpdcch_type) {
struct PRACH_ConfigSIB_v1310 *ext4_prach = eNB->common_channels[CC_id].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310;
int T;
switch (mpdcch_type) {
case TYPE0:
AssertFatal(1==0,"MPDCCH Type 0 not handled yet\n");
break;
case TYPE1:
AssertFatal(1==0,"MPDCCH Type 1 not handled yet\n");
break;
case TYPE1A:
AssertFatal(1==0,"MPDCCH Type 1A not handled yet\n");
break;
case TYPE2: // RAR
AssertFatal(ext4_prach->mpdcch_startSF_CSS_RA_r13!=NULL,
"mpdcch_startSF_CSS_RA_r13 is null\n");
if (eNB->common_channels[CC_id].tdd_Config==NULL) //FDD
T = rmax*startSF_fdd_RA_times2[ext4_prach->mpdcch_startSF_CSS_RA_r13->choice.fdd_r13]>>1;
else //TDD
T = rmax*startSF_tdd_RA[ext4_prach->mpdcch_startSF_CSS_RA_r13->choice.tdd_r13];
break;
case TYPE2A:
AssertFatal(1==0,"MPDCCH Type 2A not handled yet\n");
break;
case TYPEUESPEC:
AssertFatal(1==0,"MPDCCH Type UESPEC not handled yet\n");
break;
default:
return(0);
}
if (((10*frameP) + subframeP)%T == 0) return(1);
else return(0);
}
#endif
//------------------------------------------------------------------------------
void init_ue_sched_info(void)
//------------------------------------------------------------------------------
......@@ -645,7 +708,6 @@ printf("MAC: cannot remove UE rnti %x\n", rntiP);
pCC_id = UE_PCCID(mod_idP,UE_id);
printf("MAC: remove UE %d rnti %x\n", UE_id, rntiP);
LOG_I(MAC,"Removing UE %d from Primary CC_id %d (rnti %x)\n",UE_id,pCC_id, rntiP);
dump_ue_list(UE_list,0);
......@@ -1331,14 +1393,14 @@ int get_nCCE_offset(int *CCE_table,
nb_candidates = (L==4) ? 4 : 2;
nb_candidates = min(nb_candidates,nCCE/L);
printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
// printf("Common DCI nb_candidates %d, L %d\n",nb_candidates,L);
for (m = nb_candidates-1 ; m >=0 ; m--) {
search_space_free = 1;
for (l=0; l<L; l++) {
printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
// printf("CCE_table[%d] %d\n",(m*L)+l,CCE_table[(m*L)+l]);
if (CCE_table[(m*L) + l] == 1) {
search_space_free = 0;
break;
......@@ -1592,7 +1654,7 @@ int allocate_CCEs(int module_idP,
int i,j,idci;
int nCCE=0;
LOG_I(MAC,"Allocate CCEs subframe %d, test %d : (DL %d,UL %d)\n",subframeP,test_onlyP,DL_req->number_dci,HI_DCI0_req->number_of_dci);
LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (DL %d,UL %d)\n",subframeP,test_onlyP,DL_req->number_dci,HI_DCI0_req->number_of_dci);
DL_req->number_pdcch_ofdm_symbols=1;
try_again:
......@@ -1603,7 +1665,7 @@ try_again:
// allocate DL common DCIs first
if ((dl_config_pdu[i].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)&&
(dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti_type==2)) {
LOG_I(MAC,"Trying to allocate COMMON DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
LOG_D(MAC,"Trying to allocate COMMON DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
idci,DL_req->number_dci+HI_DCI0_req->number_of_dci,
DL_req->number_dci,HI_DCI0_req->number_of_dci,
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
......@@ -1627,11 +1689,11 @@ try_again:
subframeP);
if (fCCE == -1) {
if (DL_req->number_pdcch_ofdm_symbols == 3) {
LOG_I(MAC,"subframe %d: Dropping Allocation for RNTI %x\n",
LOG_D(MAC,"subframe %d: Dropping Allocation for RNTI %x\n",
subframeP,dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti);
for (j=0;j<=i;j++){
if (dl_config_pdu[j].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)
LOG_I(MAC,"DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
LOG_D(MAC,"DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
j,DL_req->number_dci+HI_DCI0_req->number_of_dci,
DL_req->number_dci,HI_DCI0_req->number_of_dci,
dl_config_pdu[j].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
......@@ -1652,7 +1714,7 @@ try_again:
LOG_D(MAC,"Allocating at nCCE %d\n",fCCE);
if (test_onlyP == 0) {
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.cce_idx=fCCE;
LOG_I(MAC,"Allocate COMMON DCI CCEs subframe %d, test %d => L %d fCCE %d\n",subframeP,test_onlyP,dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,fCCE);
LOG_D(MAC,"Allocate COMMON DCI CCEs subframe %d, test %d => L %d fCCE %d\n",subframeP,test_onlyP,dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,fCCE);
}
idci++;
}
......@@ -1687,11 +1749,11 @@ try_again:
subframeP);
if (fCCE == -1) {
if (DL_req->number_pdcch_ofdm_symbols == 3) {
LOG_I(MAC,"subframe %d: Dropping Allocation for RNTI %x\n",
LOG_D(MAC,"subframe %d: Dropping Allocation for RNTI %x\n",
subframeP,hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.rnti);
for (j=0;j<=i;j++){
if (hi_dci0_pdu[j].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE)
LOG_I(MAC,"DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
LOG_D(MAC,"DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
j,DL_req->number_dci+HI_DCI0_req->number_of_dci,
DL_req->number_dci,HI_DCI0_req->number_of_dci,
hi_dci0_pdu[j].dci_pdu.dci_pdu_rel8.rnti,
......@@ -1826,7 +1888,7 @@ void SR_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, rnti_t rntiP
if (UE_id != -1) {
if (mac_eNB_get_rrc_status(mod_idP,UE_RNTI(mod_idP,UE_id)) < RRC_CONNECTED)
LOG_I(MAC,"[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d\n",mod_idP,rntiP,frameP,subframeP, UE_id,cc_idP);
LOG_D(MAC,"[eNB %d][SR %x] Frame %d subframeP %d Signaling SR for UE %d on CC_id %d\n",mod_idP,rntiP,frameP,subframeP, UE_id,cc_idP);
UE_list->UE_template[cc_idP][UE_id].ul_SR = 1;
UE_list->UE_template[cc_idP][UE_id].ul_active = TRUE;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SR_INDICATION,1);
......
......@@ -171,6 +171,7 @@ int mac_top_init_eNB()
RC.nb_macrlc_inst*sizeof(eNB_MAC_INST*),RC.nb_macrlc_inst,sizeof(eNB_MAC_INST));
LOG_D(MAC,"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",sizeof(eNB_MAC_INST),RC.nb_macrlc_inst,RC.mac);
bzero(RC.mac[i],sizeof(eNB_MAC_INST));
RC.mac[i]->Mod_id = Mod_id;
for (j=0;j<MAX_NUM_CCs;j++) {
RC.mac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j];
RC.mac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j];
......@@ -187,6 +188,7 @@ int mac_top_init_eNB()
for(Mod_id=0; Mod_id<RC.nb_macrlc_inst; Mod_id++) {
mac = RC.mac[Mod_id];
mac->if_inst = IF_Module_init(Mod_id);
UE_list = &mac->UE_list;
......
......@@ -205,8 +205,15 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, uint8_t cooperation_flag,
@param Mod_id Instance ID of eNB
@param preamble_index index of the received RA request
@param timing_offset Offset in samples of the received PRACH w.r.t. eNB timing. This is used to
@param rnti RA rnti corresponding to this PRACH preamble
@param rach_resource type (0=non BL/CE,1 CE level 0,2 CE level 1, 3 CE level 2,4 CE level 3)
*/
void initiate_ra_proc(module_id_t module_idP,int CC_id,frame_t frameP, sub_frame_t subframeP, uint16_t preamble_index,int16_t timing_offset,uint16_t rnti);
void initiate_ra_proc(module_id_t module_idP,int CC_id,frame_t frameP, sub_frame_t subframeP, uint16_t preamble_index,int16_t timing_offset,uint16_t rnti
#ifdef Rel14
,
uint8_t rach_resource_type
#endif
);
/* \brief Function in eNB to fill RAR pdu when requested by PHY. This provides a single RAR SDU for the moment and returns the t-CRNTI.
@param Mod_id Instance ID of eNB
......
......@@ -129,6 +129,96 @@ unsigned short fill_rar(
return(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti);
}
#ifdef Rel14
//------------------------------------------------------------------------------
unsigned short fill_rar_br(eNB_MAC_INST *eNB,
const int CC_id,
const int ra_idx,
const frame_t frameP,
const sub_frame_t subframeP,
uint8_t* const dlsch_buffer,
const uint8_t ce_level
)
//------------------------------------------------------------------------------
{
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer;
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
int i;
uint8_t nb,rballoc,reps;
uint8_t mcs,TPC,ULdelay,cqireq;
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int input_buffer_length;
AssertFatal(CC_id < MAX_NUM_CCs, "CC_id %u < MAX_NUM_CCs %u", CC_id, MAX_NUM_CCs);
AssertFatal(ra_idx >= 0 && ra_idx < 4, "RA index not in [0..3]\n");
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = cc->RA_template[ra_idx].preamble_index; // Respond to Preamble 0 only for the moment
cc->RA_template[ra_idx].timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(cc->RA_template[ra_idx].timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(cc->RA_template[ra_idx].timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
int N_NB_index;
AssertFatal(1==0,"RAR for BL/CE Still to be finished ...\n");
// Copy the Msg2 narrowband
cc->RA_template[ra_idx].msg34_narrowband = cc->RA_template[ra_idx].msg2_narrowband;
if (ce_level<2) { //CE Level 0,1, CEmodeA
input_buffer_length =6;
N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth);
rar[4] = (uint8_t)(cc->RA_template[ra_idx].rnti>>8);
rar[5] = (uint8_t)(cc->RA_template[ra_idx].rnti&0xff);
//cc->RA_template[ra_idx].timing_offset = 0;
nb = 0;
rballoc = mac_computeRIV(6,1+ra_idx,1); // one PRB only for UL Grant in position 1+ra_idx within Narrowband
rar[1] |= (rballoc&15)<<(4-N_NB_index); // Hopping = 0 (bit 3), 3 MSBs of rballoc
reps = 4;
mcs = 7;
TPC = 3; // no power increase
ULdelay = 0;
cqireq = 0;
rar[2] |= ((mcs&0x8)>>3); // mcs 10
rar[3] = (((mcs&0x7)<<5)) | ((TPC&7)<<2) | ((ULdelay&1)<<1) | (cqireq&1);
}
else { // CE level 2,3 => CEModeB
input_buffer_length =5;
rar[3] = (uint8_t)(cc->RA_template[ra_idx].rnti>>8);
rar[4] = (uint8_t)(cc->RA_template[ra_idx].rnti&0xff);
}
LOG_D(MAC,"[RAPROC] CC_id %d Frame %d Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ra_idx %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
CC_id,
frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
ra_idx,
cc->RA_template[ra_idx].rnti,
rarh->RAPID,cc->RA_template[0].preamble_index,
cc->RA_template[ra_idx].timing_offset);
if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, eNB->Mod_id, 2, 1,
eNB->frame, eNB->subframe, 0, 0);
LOG_D(OPT,"[eNB %d][RAPROC] CC_id %d RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
eNB->Mod_id, CC_id, frameP, cc->RA_template[ra_idx].rnti,
rarh->RAPID, input_buffer_length);
}
return(cc->RA_template[ra_idx].rnti);
}
#endif
//------------------------------------------------------------------------------
uint16_t
ue_process_rar(
......
......@@ -11,20 +11,47 @@ IF_Module_t *if_inst[MAX_IF_MODULES];
Sched_Rsp_t Sched_INFO[MAX_IF_MODULES][MAX_NUM_CCs];
void handle_rach(UL_IND_t *UL_info) {
int i;
if (UL_info->rach_ind.number_of_preambles>0) {
AssertFatal(UL_info->rach_ind.number_of_preambles==1,"More than 1 preamble not supported\n");
UL_info->rach_ind.number_of_preambles=0;
LOG_I(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc\n",UL_info->frame,UL_info->subframe);
LOG_D(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc\n",UL_info->frame,UL_info->subframe);
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->rach_ind.preamble_list[0].preamble_rel8.preamble,
UL_info->rach_ind.preamble_list[0].preamble_rel8.timing_advance,
UL_info->rach_ind.preamble_list[0].preamble_rel8.rnti);
UL_info->rach_ind.preamble_list[0].preamble_rel8.rnti
#ifdef Rel14
,0
#endif
);
}
#ifdef Rel14
if (UL_info->rach_ind_br.number_of_preambles>0) {
AssertFatal(UL_info->rach_ind_br.number_of_preambles<5,"More than 4 preambles not supported\n");
for (i=0;i<UL_info->rach_ind_br.number_of_preambles;i++) {
AssertFatal(UL_info->rach_ind_br.preamble_list[i].preamble_rel13.rach_resource_type>0,
"Got regular PRACH preamble, not BL/CE\n");
LOG_D(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->subframe,
UL_info->rach_ind_br.preamble_list[i].preamble_rel13.rach_resource_type-1);
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->rach_ind_br.preamble_list[i].preamble_rel8.preamble,
UL_info->rach_ind_br.preamble_list[i].preamble_rel8.timing_advance,
UL_info->rach_ind_br.preamble_list[i].preamble_rel8.rnti,
UL_info->rach_ind_br.preamble_list[i].preamble_rel13.rach_resource_type);
}
UL_info->rach_ind.number_of_preambles=0;
}
#endif
}
void handle_ulsch(UL_IND_t *UL_info) {
......@@ -33,7 +60,7 @@ void handle_ulsch(UL_IND_t *UL_info) {
for (i=0;i<UL_info->rx_ind.number_of_pdus;i++) {
LOG_I(MAC,"Frame %d, Subframe %d Calling rx_sdu \n",UL_info->frame,UL_info->subframe);
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
......@@ -50,7 +77,7 @@ void handle_ulsch(UL_IND_t *UL_info) {
for (i=0;i<UL_info->crc_ind.number_of_crcs;i++) {
if (UL_info->crc_ind.crc_pdu_list[i].crc_indication_rel8.crc_flag == 1) { // CRC error indication
LOG_I(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
......@@ -79,7 +106,7 @@ void UL_indication(UL_IND_t *UL_info)
IF_Module_t *ifi = if_inst[module_id];
eNB_MAC_INST *mac = RC.mac[module_id];
LOG_I(PHY,"UL_Indication: frame %d, subframe %d, module_id %d, CC_id %d\n",
LOG_D(PHY,"UL_Indication: frame %d, subframe %d, module_id %d, CC_id %d\n",
UL_info->frame,UL_info->subframe,
module_id,CC_id);
......@@ -124,7 +151,7 @@ void UL_indication(UL_IND_t *UL_info)
module_id,
CC_id);
ifi->schedule_response(sched_info);
LOG_I(PHY,"Schedule_response: frame %d, subframe %d (dl_pdus %d / %p)\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu,
LOG_D(PHY,"Schedule_response: frame %d, subframe %d (dl_pdus %d / %p)\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu,
&sched_info->DL_req->dl_config_request_body.number_pdu);
}
}
......
......@@ -89,6 +89,11 @@ typedef struct{
/// RACH indication list
nfapi_rach_indication_body_t rach_ind;
#ifdef Rel14
/// RACH indication list for BR UEs
nfapi_rach_indication_body_t rach_ind_br;
#endif
/// SRS indication list
nfapi_srs_indication_body_t srs_ind;
......
......@@ -197,7 +197,7 @@ mac_rrc_data_req(
(void*)mib,
carrier->MIB,
24);
LOG_I(RRC,"Encoded MIB for frame %d (%p), bits %lu\n",sfn,carrier->MIB,enc_rval.encoded);
LOG_D(RRC,"Encoded MIB for frame %d (%p), bits %lu\n",sfn,carrier->MIB,enc_rval.encoded);
buffer_pP[0]=carrier->MIB[0];
buffer_pP[1]=carrier->MIB[1];
buffer_pP[2]=carrier->MIB[2];
......
[*]
[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI
[*] Wed Aug 31 12:37:04 2016
[*] Tue Jul 25 20:26:12 2017
[*]
[dumpfile] "/tmp/openair_dump_eNB.vcd"
[dumpfile_mtime] "Wed Aug 31 11:48:14 2016"
[dumpfile_size] 411905827
[dumpfile_mtime] "Tue Jul 25 20:11:55 2017"
[dumpfile_size] 19201475
[savefile] "/home/papillon/openairinterface5g/targets/RT/USER/eNB_usrp.gtkw"
[timestart] 10621768000
[timestart] 29023604000
[size] 1236 578
[pos] 309 0
*-19.793451 29026062100 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
*-20.793451 29026062100 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 386
[signals_width] 262
[sst_expanded] 1
......@@ -23,28 +23,16 @@ variables.trx_tst[63:0]
@28
functions.eNB_thread_rxtx0
@24
variables.frame_number_RX0_eNB[63:0]
variables.subframe_number_RX0_eNB[63:0]
variables.frame_number_TX0_eNB[63:0]
variables.subframe_number_TX0_eNB[63:0]
variables.frame_number_RX0_RU[63:0]
variables.subframe_number_RX0_RU[63:0]
@25
variables.frame_number_TX0_RU[63:0]
@24
variables.subframe_number_TX0_RU[63:0]
@28
functions.phy_procedures_eNb_rx_common0
functions.phy_procedures_eNb_rx_uespec0
functions.phy_procedures_eNb_tx0
functions.eNB_thread_rxtx1
@24
variables.frame_number_RX1_eNB[63:0]
variables.subframe_number_RX1_eNB[63:0]
variables.frame_number_TX1_eNB[63:0]
variables.subframe_number_TX1_eNB[63:0]
@28
functions.phy_procedures_eNb_rx_common1
functions.phy_procedures_eNb_rx_uespec1
@29
functions.phy_procedures_eNb_tx1
@28
functions.phy_enb_sfgen
functions.phy_eNB_slot_fep
functions.phy_enb_prach_rx
@24
variables.dci_info[63:0]
......
......@@ -144,6 +144,9 @@ void init_eNB(int,int);
void stop_eNB(int nb_inst);
void wakeup_prach_eNB(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe);
#ifdef Rel14
void wakeup_prach_eNB_br(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe);
#endif
static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_name) {
......@@ -153,8 +156,12 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
// Common RX procedures subframe n
// if this is IF5 or 3GPP_eNB
if (eNB->RU_list[0]->function < NGFI_RAU_IF4p5) wakeup_prach_eNB(eNB,NULL,proc->frame_rx,proc->subframe_rx);
if (eNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
wakeup_prach_eNB(eNB,NULL,proc->frame_rx,proc->subframe_rx);
#ifdef Rel14
wakeup_prach_eNB_br(eNB,NULL,proc->frame_rx,proc->subframe_rx);
#endif
}
// UE-specific RX processing for subframe n
phy_procedures_eNB_uespec_RX(eNB, proc, no_relay );
......@@ -402,7 +409,7 @@ void wakeup_prach_eNB(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe) {
// check if we have to detect PRACH first
if (is_prach_subframe(fp,frame,subframe)>0) {
LOG_I(PHY,"Triggering prach processing, frame %d, subframe %d\n",frame,subframe);
LOG_D(PHY,"Triggering prach processing, frame %d, subframe %d\n",frame,subframe);
if (proc->instance_cnt_prach == 0) {
LOG_W(PHY,"[eNB] Frame %d Subframe %d, dropping PRACH\n", frame,subframe);
return;
......@@ -432,6 +439,67 @@ void wakeup_prach_eNB(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe) {
}
#ifdef Rel14
void wakeup_prach_eNB_br(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe) {
eNB_proc_t *proc = &eNB->proc;
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
int i;
if (ru!=NULL) {
pthread_mutex_lock(&proc->mutex_RU_PRACH_br);
for (i=0;i<eNB->num_RU;i++) {
if (ru == eNB->RU_list[i]) {
LOG_I(PHY,"frame %d, subframe %d: RU %d for eNB %d signals PRACH BR (mask %x, num_RU %d)\n",frame,subframe,i,eNB->Mod_id,proc->RU_mask_prach_br,eNB->num_RU);
if ((proc->RU_mask_prach_br&(1<<i)) > 0)
LOG_E(PHY,"eNB %d frame %d, subframe %d : previous information (PRACH BR) from RU %d (num_RU %d, mask %x) has not been served yet!\n",
eNB->Mod_id,frame,subframe,ru->idx,eNB->num_RU,proc->RU_mask_prach_br);
proc->RU_mask_prach_br |= (1<<i);
}
}
if (proc->RU_mask_prach_br != (1<<eNB->num_RU)-1) { // not all RUs have provided their information so return
pthread_mutex_unlock(&proc->mutex_RU_PRACH_br);
return(0);
}
else { // all RUs have provided their information so continue on and wakeup eNB processing
proc->RU_mask_prach_br = 0;
pthread_mutex_unlock(&proc->mutex_RU_PRACH_br);
}
}
// check if we have to detect PRACH first
if (is_prach_subframe(fp,frame,subframe)>0) {
LOG_D(PHY,"Triggering prach br processing, frame %d, subframe %d\n",frame,subframe);
if (proc->instance_cnt_prach_br == 0) {
LOG_W(PHY,"[eNB] Frame %d Subframe %d, dropping PRACH BR\n", frame,subframe);
return;
}
// wake up thread for PRACH RX
if (pthread_mutex_lock(&proc->mutex_prach_br) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB PRACH thread %d (IC %d)\n", proc->thread_index, proc->instance_cnt_prach_br);
exit_fun( "error locking mutex_prach" );
return;
}
++proc->instance_cnt_prach_br;
// set timing for prach thread
proc->frame_prach_br = frame;
proc->subframe_prach_br = subframe;
// the thread can now be woken up
if (pthread_cond_signal(&proc->cond_prach_br) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB PRACH BR thread %d\n", proc->thread_index);
exit_fun( "ERROR pthread_cond_signal" );
return;
}
pthread_mutex_unlock( &proc->mutex_prach_br );
}
}
#endif
/*!
* \brief The prach receive thread of eNB.
* \param param is a \ref eNB_proc_t structure which contains the info what to process.
......@@ -457,7 +525,11 @@ static void* eNB_thread_prach( void* param ) {
if (wait_on_condition(&proc->mutex_prach,&proc->cond_prach,&proc->instance_cnt_prach,"eNB_prach_thread") < 0) break;
LOG_D(PHY,"Running eNB prach procedures\n");
prach_procedures(eNB);
prach_procedures(eNB
#ifdef Rel14
,0
#endif
);
if (release_thread(&proc->mutex_prach,&proc->instance_cnt_prach,"eNB_prach_thread") < 0) break;
}
......@@ -468,6 +540,44 @@ static void* eNB_thread_prach( void* param ) {
return &eNB_thread_prach_status;
}
#ifdef Rel14
/*!
* \brief The prach receive thread of eNB for BL/CE UEs.
* \param param is a \ref eNB_proc_t structure which contains the info what to process.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
static void* eNB_thread_prach_br( void* param ) {
static int eNB_thread_prach_status;
PHY_VARS_eNB *eNB= (PHY_VARS_eNB *)param;
eNB_proc_t *proc = &eNB->proc;
// set default return value
eNB_thread_prach_status = 0;
thread_top_init("eNB_thread_prach_br",1,500000L,1000000L,20000000L);
while (!oai_exit) {
if (oai_exit) break;
if (wait_on_condition(&proc->mutex_prach_br,&proc->cond_prach_br,&proc->instance_cnt_prach_br,"eNB_prach_thread_br") < 0) break;
LOG_D(PHY,"Running eNB prach procedures for BL/CE UEs\n");
prach_procedures(eNB,1);
if (release_thread(&proc->mutex_prach_br,&proc->instance_cnt_prach_br,"eNB_prach_thread_br") < 0) break;
}
LOG_I(PHY, "Exiting eNB thread PRACH BR\n");
eNB_thread_prach_status = 0;
return &eNB_thread_prach_status;
}
#endif
extern void init_fep_thread(PHY_VARS_eNB *, pthread_attr_t *);
......@@ -482,6 +592,9 @@ void init_eNB_proc(int inst) {
eNB_proc_t *proc;
eNB_rxtx_proc_t *proc_rxtx;
pthread_attr_t *attr0=NULL,*attr1=NULL,*attr_FH=NULL,*attr_prach=NULL,*attr_asynch=NULL,*attr_single=NULL,*attr_fep=NULL,*attr_td=NULL,*attr_te=NULL,*attr_synch=NULL;
#ifdef Rel14
pthread_attr_t *attr_prach_br=NULL;
#endif
for (CC_id=0; CC_id<RC.nb_CC[inst]; CC_id++) {
eNB = RC.eNB[inst][CC_id];
......@@ -523,10 +636,22 @@ void init_eNB_proc(int inst) {
pthread_attr_init( &proc->attr_te);
pthread_attr_init( &proc_rxtx[0].attr_rxtx);
pthread_attr_init( &proc_rxtx[1].attr_rxtx);
#ifdef Rel14
proc->instance_cnt_prach_br = -1;
proc->RU_mask_prach_br=0;
pthread_mutex_init( &proc->mutex_prach_br, NULL);
pthread_mutex_init( &proc->mutex_RU_PRACH_br,NULL);
pthread_cond_init( &proc->cond_prach_br, NULL);
pthread_attr_init( &proc->attr_prach_br);
#endif
#ifndef DEADLINE_SCHEDULER
attr0 = &proc_rxtx[0].attr_rxtx;
attr1 = &proc_rxtx[1].attr_rxtx;
attr_prach = &proc->attr_prach;
#ifdef Rel14
attr_prach_br = &proc->attr_prach_br;
#endif
attr_asynch = &proc->attr_asynch_rxtx;
attr_single = &proc->attr_single;
attr_td = &proc->attr_td;
......@@ -538,7 +663,9 @@ void init_eNB_proc(int inst) {
pthread_create( &proc_rxtx[1].pthread_rxtx, attr1, eNB_thread_rxtx, &proc_rxtx[1] );
}
pthread_create( &proc->pthread_prach, attr_prach, eNB_thread_prach, eNB );
#ifdef Rel14
pthread_create( &proc->pthread_prach_br, attr_prach_br, eNB_thread_prach_br, eNB );
#endif
char name[16];
if (eNB->single_thread_flag==0) {
snprintf( name, sizeof(name), "RXTX0 %d", i );
......@@ -601,10 +728,18 @@ void kill_eNB_proc(int inst) {
pthread_cond_signal( &proc_rxtx[0].cond_rxtx );
pthread_cond_signal( &proc_rxtx[1].cond_rxtx );
pthread_cond_signal( &proc->cond_prach );
pthread_cond_broadcast(&sync_phy_proc.cond_phy_proc_tx);
pthread_join( proc->pthread_prach, (void**)&status );
pthread_mutex_destroy( &proc->mutex_prach );
pthread_cond_destroy( &proc->cond_prach );
pthread_cond_destroy( &proc->cond_prach );
#ifdef Rel14
pthread_cond_signal( &proc->cond_prach_br );
pthread_join( proc->pthread_prach_br, (void**)&status );
pthread_mutex_destroy( &proc->mutex_prach_br );
pthread_cond_destroy( &proc->cond_prach_br );
#endif
pthread_mutex_destroy(&eNB->UL_INFO_mutex);
int i;
for (i=0;i<2;i++) {
......@@ -721,6 +856,15 @@ void init_eNB_afterRU() {
eNB->frame_parms.nb_antennas_rx = 0;
for (ru_id=0,aa=0;ru_id<eNB->num_RU;ru_id++) {
eNB->frame_parms.nb_antennas_rx += eNB->RU_list[ru_id]->nb_rx;
AssertFatal(eNB->RU_list[ru_id]->common.rxdataF!=NULL,
"RU %d : common.rxdataF is NULL\n",
eNB->RU_list[ru_id]->idx);
AssertFatal(eNB->RU_list[ru_id]->prach_rxsigF!=NULL,
"RU %d : prach_rxsigF is NULL\n",
eNB->RU_list[ru_id]->idx);
for (i=0;i<eNB->RU_list[ru_id]->nb_rx;aa++,i++) {
LOG_I(PHY,"Attaching RU %d antenna %d to eNB antenna %d\n",eNB->RU_list[ru_id]->idx,i,aa);
eNB->prach_vars.rxsigF[aa] = eNB->RU_list[ru_id]->prach_rxsigF[i];
......@@ -747,11 +891,13 @@ void init_eNB_afterRU() {
AssertFatal(RC.ru[ru_id]!=NULL,"ru_id %d is null\n",ru_id);
RC.ru[ru_id]->wakeup_rxtx = wakeup_rxtx;
RC.ru[ru_id]->wakeup_prach_eNB = wakeup_prach_eNB;
RC.ru[ru_id]->eNB_top = eNB_top;
RC.ru[ru_id]->wakeup_rxtx = wakeup_rxtx;
RC.ru[ru_id]->wakeup_prach_eNB = wakeup_prach_eNB;
RC.ru[ru_id]->wakeup_prach_eNB_br = wakeup_prach_eNB_br;
RC.ru[ru_id]->eNB_top = eNB_top;
}
}
void init_eNB(int single_thread_flag,int wait_for_sync) {
int CC_id;
......
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