Fix ul_cqi and tpc filtering.

(cherry picked from commit 120ea0950e1f52c1c5dd1d0dd4f7080e66d7ee93)

# Conflicts:
#	openair2/LAYER2/MAC/eNB_scheduler_primitives.c

openair2/LAYER2/MAC/defs.h

@@ -815,6 +815,7 @@ typedef struct {
   uint16_t      pre_nb_available_rbs[MAX_NUM_CCs];
   unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
   uint16_t      ta_timer;
+  double ta_update_f;
   int16_t       ta_update;
   uint16_t      ul_consecutive_errors;
   int32_t       context_active_timer;
@@ -834,6 +835,7 @@ typedef struct {
   uint8_t       pucch2_snr[NFAPI_CC_MAX];
   uint8_t       pucch3_cqi_update[NFAPI_CC_MAX];
   uint8_t       pucch3_snr[NFAPI_CC_MAX];
+  double        pusch_cqi_f[NFAPI_CC_MAX];
   uint8_t       pusch_cqi[NFAPI_CC_MAX];
   uint8_t       pusch_snr[NFAPI_CC_MAX];
   uint8_t       pusch_snr_avg[NFAPI_CC_MAX];

openair2/LAYER2/MAC/eNB_scheduler_dlsch.c

@@ -1020,6 +1020,7 @@ schedule_ue_spec(module_id_t module_idP,
 
           /* reset ta_update */
           ue_sched_ctrl->ta_update = 31;
+          ue_sched_ctrl->ta_update_f = 31.0;
         } else {
           ta_update = 31;
         }
@@ -2180,6 +2181,7 @@ schedule_ue_spec_br(module_id_t module_idP,
 
           /* Reset ta_update */
           ue_sched_ctl->ta_update = 31;
+          ue_sched_ctl->ta_update_f = 31.0;
         } else {
           ta_update = 31;
         }

openair2/LAYER2/MAC/eNB_scheduler_fairRR.c

@@ -1684,6 +1684,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
 
                     /* reset ta_update */
                     ue_sched_ctl->ta_update = 31;
+                    ue_sched_ctl->ta_update_f = 31.0;
                 } else {
                     ta_update = 31;
                 }
@@ -2369,6 +2370,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
 
           /* reset ta_update */
           ue_sched_ctl->ta_update = 31;
+          ue_sched_ctl->ta_update_f = 31.0;
         } else {
           ta_update = 31;
         }
@@ -2915,6 +2917,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
                 ue_sched_ctl->ta_timer = 20;
                 /* reset ta_update */
                 ue_sched_ctl->ta_update = 31;
+                ue_sched_ctl->ta_update_f = 31.0;
             } else {
                 ta_update = 31;
             }

openair2/LAYER2/MAC/eNB_scheduler_primitives.c

@@ -2647,9 +2647,11 @@ add_new_ue(module_id_t mod_idP,
     /* default slice in case there was something different */
     UE_list->assoc_dl_slice_idx[UE_id] = 0;
     UE_list->assoc_ul_slice_idx[UE_id] = 0;
+    UE_list->UE_sched_ctrl[UE_id].ta_update_f = 31.0;
     UE_list->UE_sched_ctrl[UE_id].ta_update = 31;
-    UE_list->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP]     = (RC.mac[mod_idP]->puSch10xSnr+640)/5;
-    UE_list->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = RC.mac[mod_idP]->puSch10xSnr/10;
+    UE_list->UE_sched_ctrl[UE_id].pusch_cqi_f[cc_idP]     = (eNB->puSch10xSnr+640)/5;
+    UE_list->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP]     = (eNB->puSch10xSnr+640)/5;
+    UE_list->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = eNB->puSch10xSnr/10;
     UE_list->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0;
     UE_list->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0;
     UE_list->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0;

openair2/LAYER2/MAC/eNB_scheduler_ulsch.c

@@ -180,7 +180,8 @@ rx_sdu(const module_id_t enb_mod_idP,
        * lte_est_timing_advance_pusch, maybe it's not necessary?
        * maybe it's even not correct at all?
        */
-      UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4;
+      UE_scheduling_control->ta_update_f = ((double)UE_scheduling_control->ta_update_f * 3 + (double)timing_advance) / 4;
+      UE_scheduling_control->ta_update = (int)UE_scheduling_control->ta_update_f;
       int tmp_snr = (5 * ul_cqi - 640) / 10;
       UE_scheduling_control->pusch_snr[CC_idP] = tmp_snr;
        
@@ -189,7 +190,8 @@ rx_sdu(const module_id_t enb_mod_idP,
         int snr_thres_tpc=30;
         int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP];
         if(abs(diff) < snr_thres_tpc) {
-          UE_scheduling_control->pusch_cqi[CC_idP] = (int)((double)UE_scheduling_control->pusch_cqi[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc));
+          UE_scheduling_control->pusch_cqi_f[CC_idP] = ((double)UE_scheduling_control->pusch_cqi_f[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc));
+          UE_scheduling_control->pusch_cqi[CC_idP] = (int)UE_scheduling_control->pusch_cqi_f[CC_idP];
           UE_scheduling_control->pusch_snr_avg[CC_idP] = (5 * UE_scheduling_control->pusch_cqi[CC_idP] - 640) / 10;
         }
       }

openair2/LAYER2/MAC/mac.h

@@ -986,6 +986,7 @@ typedef struct {
     uint16_t pre_nb_available_rbs[NFAPI_CC_MAX];
     unsigned char rballoc_sub_UE[NFAPI_CC_MAX][N_RBG_MAX];
     uint16_t ta_timer;
+    double ta_update_f;
     int16_t ta_update;
     uint16_t ul_consecutive_errors;
     int32_t context_active_timer;
@@ -1009,6 +1010,7 @@ typedef struct {
     uint8_t pucch2_snr[NFAPI_CC_MAX];
     uint8_t pucch3_cqi_update[NFAPI_CC_MAX];
     uint8_t pucch3_snr[NFAPI_CC_MAX];
+    double  pusch_cqi_f[NFAPI_CC_MAX];
     uint8_t pusch_cqi[NFAPI_CC_MAX];
     uint8_t pusch_snr[NFAPI_CC_MAX];
     uint8_t pusch_snr_avg[NFAPI_CC_MAX];